the transistor having a trench structure in the substrate

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H01L27/10876

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L27/00Devices consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate

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H01L27/10876the transistor having a trench structure in the substrate

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device
- Patent number 11,670,700
- Issue date Jun 6, 2023
- Samsung Electronics Co., Ltd.
- Young-Kwan Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor device having buried gate ele...
- Patent number 11,670,537
- Issue date Jun 6, 2023
- Samsung Electronics Co., Ltd.
- Byung-jae Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device having spacer capping pattern disposed...
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- Samsung Electronics Co., Ltd.
- Inkyoung Heo
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Information Patent Grant
Semiconductor devices and methods of fabricating the same
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- Issue date May 9, 2023
- Samsung Electronics Co., Ltd.
- Myeong-Dong Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory structure having a hexagonal shaped bit line contact dispose...
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- Issue date May 2, 2023
- NANYA TECHNOLOGY CORPORATION
- Yu-Ying Lin
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Information Patent Grant
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- Samsung Electronics Co., Ltd.
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Information Patent Grant
Memory device and forming method thereof
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- Issue date Apr 11, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Shuai Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having buried gates
- Patent number 11,626,409
- Issue date Apr 11, 2023
- Samsung Electronis Co., Ltd.
- Huijung Kim
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Information Patent Grant
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Information Patent Grant
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- G11 - INFORMATION STORAGE
Information Patent Grant
Buried word line structure and manufacturing method thereof
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Information Patent Grant
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Information Patent Grant
Method of fabricating semiconductor device using multipe photolitho...
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
3D integrated circuit device and structure with hybrid bonding
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- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of forming semiconductor memory device comprises a bit line...
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- Janbo Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device and method of fabricating the same
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- Issue date Mar 7, 2023
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- Kyooho Jung
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Information Patent Grant
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Information Patent Grant
Method of preparing semiconductor device with crystalline overlayer
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- Issue date Feb 28, 2023
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Information Patent Grant
Semiconductor device and method of fabricating the same
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Transistors, memory cells and semiconductor constructions
- Patent number 11,594,611
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preparing semiconductor memory device with air gaps betw...
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- NANYA TECHNOLOGY CORPORATION
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Information Patent Grant
Integrated assemblies having shield lines between digit lines, and...
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Memory devices and methods of manufacturing the same
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- Augustin Jinwoo Hong
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Information Patent Grant
Semiconductor structure and manufacturing method thereof
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- Xiang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device including wiring contact plugs
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- Yonghyeok Son
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Information Patent Grant
DRAM memory device having angled structures with sidewalls extendin...
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- Issue date Jan 31, 2023
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Information Patent Grant
3D semiconductor device and structure with single-crystal layers
- Patent number 11,569,117
- Issue date Jan 31, 2023
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Information Patent Grant
Apparatuses including passing word lines comprising a band offset m...
- Patent number 11,569,353
- Issue date Jan 31, 2023
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- Venkata Naveen Kumar Neelapala
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- H01 - BASIC ELECTRIC ELEMENTS
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SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
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SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
- Publication number 20240153873
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- G11 - INFORMATION STORAGE
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SEMICONDUCTOR DEVICE HAVING WORD LINE EMBEDDED IN GATE TRENCH
- Publication number 20240147699
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- Toshiyasu Fujimoto
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20240098978
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- NANYA TECHNOLOGY CORPORATION
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HYBRID MANUFACTURING OF ACCESS TRANSISTORS FOR MEMORY
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- NANYA TECHNOLOGY CORPORATION
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- H01 - BASIC ELECTRIC ELEMENTS
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CONDUCTIVE STRUCTURES
- Publication number 20240074153
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- Daniel Billingsley
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SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEROF
- Publication number 20240074152
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- Publication number 20240057315
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- NANYA TECHNOLOGY CORPORATION
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SEMICONDUCTOR DEVICE WITH PASSING GATE
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- CHANGXIN MEMORY TECHNOLOGIES, INC
- Guangsu SHAO
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- Guangsu SHAO
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- Chieh-Chun YU
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- Publication date Nov 30, 2023
- NANYA TECHNOLOGY CORPORATION
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MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME
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- NANYA TECHNOLOGY CORPORATION
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Information Patent Application
METHOD OF FABRICATING SEMICONDUCTOR DEVICE WITH PROGRAMMBLE FEATURE
- Publication number 20230389272
- Publication date Nov 30, 2023
- NANYA TECHNOLOGY CORPORATION
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- H01 - BASIC ELECTRIC ELEMENTS

the transistor having a trench structure in the substrate

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device

Method of manufacturing semiconductor device having buried gate ele...

Semiconductor memory device having spacer capping pattern disposed...

Semiconductor devices and methods of fabricating the same

Memory structure having a hexagonal shaped bit line contact dispose...

Semiconductor device

Memory device and forming method thereof

Semiconductor devices having buried gates

Method of testing a gap fill for DRAM

3D semiconductor memory device and structure

Buried word line structure and manufacturing method thereof

Semiconductor devices and methods of forming semiconductor devices

Method of fabricating semiconductor device using multipe photolitho...

Method for producing a 3D semiconductor device and structure with s...

Dynamic random access memory and method for manufacturing the dram...

3D integrated circuit device and structure with hybrid bonding

Method of forming semiconductor memory device comprises a bit line...

Semiconductor memory device and method of fabricating the same

Semiconductor memory device and method of fabricating the same

Method of preparing semiconductor device with crystalline overlayer

Semiconductor device and method of fabricating the same

Transistors, memory cells and semiconductor constructions

Method for preparing semiconductor memory device with air gaps betw...

Integrated assemblies having shield lines between digit lines, and...

Memory devices and methods of manufacturing the same

Semiconductor structure and manufacturing method thereof

Semiconductor memory device including wiring contact plugs

DRAM memory device having angled structures with sidewalls extendin...

3D semiconductor device and structure with single-crystal layers

Apparatuses including passing word lines comprising a band offset m...

Patents Applicationslast 30 patents

MEMORY CELL WITH IMPROVED INSULATING STRUCTURE

MEMORY DEVICE HAVING ULTRA-LIGHTLY DOPED REGION

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME

SEMICONDUCTOR DEVICE HAVING WORD LINE EMBEDDED IN GATE TRENCH

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

HYBRID MANUFACTURING OF ACCESS TRANSISTORS FOR MEMORY

SEMICONDUCTOR DEVICE WITH BURIED GATE STRUCTURES AND METHOD FOR PRE...

CONDUCTIVE STRUCTURES

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEROF

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

DEVICES AND METHODS FOR DRAM LEAKAGE REDUCTION

SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR DEVICE HAVING DOUBLE BIT CAPACITY AND METHOD FOR MANU...

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING BURIED GATE ST...

SEMICONDUCTOR DEVICE WITH PASSING GATE

SEMICONDUCTOR STRUCTURE, METHOD FOR FORMING SEMICONDUCTOR STRUCTURE...

SEMICONDUCTOR STRUCTURE AND FORMATION METHOD THEREOF

METHOD FOR PREPARING MEMORY DEVICE WITH MULTILAYERED CAPACITOR DIEL...

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

METHOD OF FABRICATING SEMICONDUCTOR DEVICE WITH VOID-FREE CONDUCTIV...

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

MEMORY DEVICE HAVING CONTROL GATE DIELECTRIC STRUCTURE WITH DIFFERE...

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

SEMICONDUCTOR DEVICE WITH PROGRAMABLE FEATURE

MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME

METHOD OF FABRICATING SEMICONDUCTOR DEVICE WITH PROGRAMMBLE FEATURE

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF