Transfer gates

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G11C2207/005

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C2207/005Transfer gates

Industries

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Patents Grantslast 30 patents

Information Patent Grant
3D memory structure and circuit
- Patent number 12,094,569
- Issue date Sep 17, 2024
- Macronix International Co., Ltd.
- Chung-Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices
- Patent number 12,073,910
- Issue date Aug 27, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for single-ended sense amplifiers
- Patent number 12,051,460
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Tae H. Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory integrated circuit with local amplifier module and local rea...
- Patent number 11,848,045
- Issue date Dec 19, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Weibing Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dram device with multiple voltage domains
- Patent number 11,823,734
- Issue date Nov 21, 2023
- RAMBUS INC.
- Thomas Vogelsang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for internal voltage generating circuits
- Patent number 11,694,742
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Takayori Hamada
- G05 - CONTROLLING REGULATING
Information Patent Grant
Apparatuses and methods for cache operations
- Patent number 11,693,783
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory unit
- Patent number 11,651,816
- Issue date May 16, 2023
- SURECORE LIMITED
- Stefan Cosemans
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power memory device with column and row line switches for speci...
- Patent number 11,631,446
- Issue date Apr 18, 2023
- Chih-Cheng Hsiao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having driver circuits and sense amplifiers
- Patent number 11,605,421
- Issue date Mar 14, 2023
- Micron Technology, Inc.
- Katsuhiro Kitagawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Data replication
- Patent number 11,526,293
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bank to bank data transfer
- Patent number 11,514,957
- Issue date Nov 29, 2022
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device with memory banks and sense amplifier arrays
- Patent number 11,367,467
- Issue date Jun 21, 2022
- SK Hynix Inc.
- Hyung Sik Won
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for operations using compressed and decompr...
- Patent number 11,314,429
- Issue date Apr 26, 2022
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM with local bit line, input/output circuit, and global bit line
- Patent number 11,295,791
- Issue date Apr 5, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Dram data line switching control circuit and minimizing number of d...
- Patent number 11,195,564
- Issue date Dec 7, 2021
- SK hynix Inc.
- Kyeong Pil Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for operations using compressed and decompr...
- Patent number 11,150,824
- Issue date Oct 19, 2021
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses including threshold voltage compensated sense amplifier...
- Patent number 11,152,055
- Issue date Oct 19, 2021
- Micron Technology, Inc.
- Kyuseok Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with bit-lines connected to different sub-arrays throu...
- Patent number 11,133,057
- Issue date Sep 28, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon Jhy Liaw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatuses and methods for cache operations
- Patent number 11,126,557
- Issue date Sep 21, 2021
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM with hierarchical bit lines in monolithic 3D integrated chips
- Patent number 11,114,446
- Issue date Sep 7, 2021
- Intel Corporation
- Yih Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory unit
- Patent number 11,100,978
- Issue date Aug 24, 2021
- SURECORE LIMITED
- Stefan Cosemans
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit line pre-charge circuit that compensates for process, op...
- Patent number 11,087,841
- Issue date Aug 10, 2021
- Unity Semiconductor Corporation
- Chang Hua Siau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FeRAM-DRAM hybrid memory
- Patent number 10,998,046
- Issue date May 4, 2021
- Micron Technology, Inc.
- Kazuhiko Kajigaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Longest element length determination in memory
- Patent number 10,984,841
- Issue date Apr 20, 2021
- Micron Technology, Inc.
- Sanjay Tiwari
- G11 - INFORMATION STORAGE
Information Patent Grant
Operation method of signal receiver, pulse width controller, and el...
- Patent number 10,985,742
- Issue date Apr 20, 2021
- Samsung Electronics Co., Ltd.
- Soomin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Converged memory device and method thereof
- Patent number 10,936,534
- Issue date Mar 2, 2021
- SK Hynix Inc.
- Hyung-Sik Won
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for in-memory operations
- Patent number 10,915,249
- Issue date Feb 9, 2021
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device for switching between different reading modes of a non-volat...
- Patent number 10,861,543
- Issue date Dec 8, 2020
- STMicroelectronics S.r.l.
- Fabio Enrico Carlo Disegni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory read stability enhancement with short segmented bit line arc...
- Patent number 10,854,282
- Issue date Dec 1, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR MEMORY DEVICES
- Publication number 20240371417
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D MEMORY STRUCTURE AND CIRCUIT
- Publication number 20230290392
- Publication date Sep 14, 2023
- Macronix International Co., Ltd.
- Chung-Kuang Chen
- G11 - INFORMATION STORAGE
Information Patent Application
BANK TO BANK DATA TRANSFER
- Publication number 20230070383
- Publication date Mar 9, 2023
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY UNIT
- Publication number 20210350841
- Publication date Nov 11, 2021
- SURECORE LIMITED
- Stefan COSEMANS
- G11 - INFORMATION STORAGE
Information Patent Application
BANK TO BANK DATA TRANSFER
- Publication number 20210020207
- Publication date Jan 21, 2021
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REPLICATION
- Publication number 20210004161
- Publication date Jan 7, 2021
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM WITH LOCAL BIT LINE, INPUT/OUTPUT CIRCUIT, AND GLOBAL BIT LINE
- Publication number 20210005232
- Publication date Jan 7, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR INTERNAL VOLTAGE GENERATING CIRCUITS
- Publication number 20200411075
- Publication date Dec 31, 2020
- Micron Technology, Inc.
- Takayori Hamada
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY UNIT
- Publication number 20200327924
- Publication date Oct 15, 2020
- SURECORE LIMITED
- Stefan COSEMANS
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...
- Publication number 20200251164
- Publication date Aug 6, 2020
- Samsung Electronics Co., Ltd.
- LAVA KUMAR PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OP...
- Publication number 20200251167
- Publication date Aug 6, 2020
- UNITY SEMICONDUCTOR CORPORATION
- Chang Hua Siau
- G11 - INFORMATION STORAGE
Information Patent Application
LONGEST ELEMENT LENGTH DETERMINATION IN MEMORY
- Publication number 20200219544
- Publication date Jul 9, 2020
- Micron Technology, Inc.
- Sanjay Tiwari
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATION METHOD OF SIGNAL RECEIVER, PULSE WIDTH CONTROLLER, AND EL...
- Publication number 20200212903
- Publication date Jul 2, 2020
- Samsung Electronics Co., Ltd.
- Soomin Lee
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR CHARGING A SENSE COMPONENT
- Publication number 20200211623
- Publication date Jul 2, 2020
- Micron Technology, Inc.
- George B. Raad
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE FOR SWITCHING BETWEEN DIFFERENT READING MODES OF A NON-VOLAT...
- Publication number 20200202930
- Publication date Jun 25, 2020
- STMicroelectronics S.r.l
- Fabio Enrico Carlo Disegni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER MEMORY DEVICE WITH COLUMN AND ROW LINE SWITCHES FOR SPECI...
- Publication number 20200194046
- Publication date Jun 18, 2020
- Chih-Cheng Hsiao
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES FOR DECREASING WRITE PULL-UP TIME AND METHODS OF USE
- Publication number 20200194051
- Publication date Jun 18, 2020
- Micron Technology, Inc.
- Shinichi Takayama
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS
- Publication number 20200150864
- Publication date May 14, 2020
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20200075092
- Publication date Mar 5, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM INPUT/OUTPUT
- Publication number 20200005837
- Publication date Jan 2, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Application
FERAM-DRAM HYBRID MEMORY
- Publication number 20190362790
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Kazuhiko Kajigaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS TO SELECTIVELY PERFORM LOGICAL OPERATIONS
- Publication number 20190362759
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Daniel B. Penney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUSES AND METHODS FOR OPERATIONS USING COMPRESSED AND DECOMPR...
- Publication number 20190354303
- Publication date Nov 21, 2019
- Micron Technology, Inc.
- Jeremiah J. Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION METHOD FOR SUPPRESSING FLOATING GATE (FG) COUPLING
- Publication number 20190221271
- Publication date Jul 18, 2019
- WINBOND ELECTRONICS CORP.
- Naoaki Sudo
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE PUMP CIRCUIT WITH LOW REVERSE CURRENT AND LOW PEAK CURRENT
- Publication number 20190147922
- Publication date May 16, 2019
- EMEMORY TECHNOLOGY INC.
- Wu-Chang Chang
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...
- Publication number 20190147944
- Publication date May 16, 2019
- Samsung Electronics Co., Ltd.
- LAVA KUMAR PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY APPARATUS AND OPERATING METHOD OF THE SEMICOND...
- Publication number 20190115079
- Publication date Apr 18, 2019
- SK HYNIX INC.
- Jin Su PARK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20190108874
- Publication date Apr 11, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE DATA RATE MEMORY
- Publication number 20190103155
- Publication date Apr 4, 2019
- SURECORE LIMITED
- Stefan COSEMANS
- G11 - INFORMATION STORAGE
Information Patent Application
INVERT OPERATIONS USING SENSING CIRCUITRY
- Publication number 20190088292
- Publication date Mar 21, 2019
- Micron Technology, Inc.
- Glen E. Hush
- G11 - INFORMATION STORAGE

Transfer gates

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

3D memory structure and circuit

Semiconductor memory devices

Apparatuses and methods for single-ended sense amplifiers

Memory integrated circuit with local amplifier module and local rea...

Dram device with multiple voltage domains

Apparatuses and methods for internal voltage generating circuits

Apparatuses and methods for cache operations

Memory unit

Low power memory device with column and row line switches for speci...

Semiconductor device having driver circuits and sense amplifiers

Data replication

Bank to bank data transfer

Semiconductor device with memory banks and sense amplifier arrays

Apparatuses and methods for operations using compressed and decompr...

SRAM with local bit line, input/output circuit, and global bit line

Dram data line switching control circuit and minimizing number of d...

Apparatuses and methods for operations using compressed and decompr...

Apparatuses including threshold voltage compensated sense amplifier...

Memory array with bit-lines connected to different sub-arrays throu...

Apparatuses and methods for cache operations

SRAM with hierarchical bit lines in monolithic 3D integrated chips

Memory unit

Global bit line pre-charge circuit that compensates for process, op...

FeRAM-DRAM hybrid memory

Longest element length determination in memory

Operation method of signal receiver, pulse width controller, and el...

Converged memory device and method thereof

Apparatuses and methods for in-memory operations

Device for switching between different reading modes of a non-volat...

Memory read stability enhancement with short segmented bit line arc...

Patents Applicationslast 30 patents

SEMICONDUCTOR MEMORY DEVICES

3D MEMORY STRUCTURE AND CIRCUIT

BANK TO BANK DATA TRANSFER

MEMORY UNIT

BANK TO BANK DATA TRANSFER

DATA REPLICATION

SRAM WITH LOCAL BIT LINE, INPUT/OUTPUT CIRCUIT, AND GLOBAL BIT LINE

APPARATUSES AND METHODS FOR INTERNAL VOLTAGE GENERATING CIRCUITS

MEMORY UNIT

STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...

GLOBAL BIT LINE PRE-CHARGE CIRCUIT THAT COMPENSATES FOR PROCESS, OP...

LONGEST ELEMENT LENGTH DETERMINATION IN MEMORY

OPERATION METHOD OF SIGNAL RECEIVER, PULSE WIDTH CONTROLLER, AND EL...

TECHNIQUES FOR CHARGING A SENSE COMPONENT

DEVICE FOR SWITCHING BETWEEN DIFFERENT READING MODES OF A NON-VOLAT...

LOW POWER MEMORY DEVICE WITH COLUMN AND ROW LINE SWITCHES FOR SPECI...

APPARATUSES FOR DECREASING WRITE PULL-UP TIME AND METHODS OF USE

APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

SRAM INPUT/OUTPUT

FERAM-DRAM HYBRID MEMORY

APPARATUSES AND METHODS TO SELECTIVELY PERFORM LOGICAL OPERATIONS

APPARATUSES AND METHODS FOR OPERATIONS USING COMPRESSED AND DECOMPR...

OPERATION METHOD FOR SUPPRESSING FLOATING GATE (FG) COUPLING

CHARGE PUMP CIRCUIT WITH LOW REVERSE CURRENT AND LOW PEAK CURRENT

STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...

SEMICONDUCTOR MEMORY APPARATUS AND OPERATING METHOD OF THE SEMICOND...

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

MULTIPLE DATA RATE MEMORY

INVERT OPERATIONS USING SENSING CIRCUITRY