using a plurality of serially connected access transistors, each having a storage capacitor

Industry

CPC
G11C11/4045

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/4045using a plurality of serially connected access transistors, each having a storage capacitor

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 12,112,794
- Issue date Oct 8, 2024
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 12,014,770
- Issue date Jun 18, 2024
- R&D3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with improved driver operation and methods to operate...
- Patent number 11,996,139
- Issue date May 28, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Heterogeneous memory system
- Patent number 11,935,575
- Issue date Mar 19, 2024
- Meta Platforms Technologies, LLC
- Syed Shakib Sarwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 11,900,990
- Issue date Feb 13, 2024
- R&D3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiplexors under an array of memory cells
- Patent number 11,804,260
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 11,783,891
- Issue date Oct 10, 2023
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Common mode compensation for non-linear polar material based differ...
- Patent number 11,729,991
- Issue date Aug 15, 2023
- Kepler Computing Inc.
- Rajeev Kumar Dokania
- G11 - INFORMATION STORAGE
Information Patent Grant
Common mode compensation for multi-element non-linear polar materia...
- Patent number 11,696,450
- Issue date Jul 4, 2023
- Kepler Computing Inc.
- Rajeev Kumar Dokania
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional dynamic random-access memory array
- Patent number 11,690,210
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Vladimir Machkaoutsan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 11,501,826
- Issue date Nov 15, 2022
- R&D3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit including tracking circuit
- Patent number 11,443,786
- Issue date Sep 13, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiplexors under an array of memory cells
- Patent number 11,386,948
- Issue date Jul 12, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Grant
Event counters for memory operations
- Patent number 11,335,408
- Issue date May 17, 2022
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Compute-in-memory (CIM) cell circuits employing capacitive storage...
- Patent number 11,322,199
- Issue date May 3, 2022
- QUALCOMM Incorporated
- Xia Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 11,195,574
- Issue date Dec 7, 2021
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Compute-in-memory (CIM) employing low-power CIM circuits employing...
- Patent number 11,176,991
- Issue date Nov 16, 2021
- QUALCOMM Incorporated
- Khaja Ahmad Shaik
- G11 - INFORMATION STORAGE
Information Patent Grant
Read operations based on a dynamic reference
- Patent number 11,056,178
- Issue date Jul 6, 2021
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 11,049,553
- Issue date Jun 29, 2021
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential compute-in-memory bitcell
- Patent number 11,024,358
- Issue date Jun 1, 2021
- QUALCOMM Incorporated
- Ankit Srivastava
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit including tracking circuit
- Patent number 11,017,825
- Issue date May 25, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Event counters for memory operations
- Patent number 10,950,308
- Issue date Mar 16, 2021
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line structure for two-transistor static random access memory
- Patent number 10,825,508
- Issue date Nov 3, 2020
- Powerchip Semiconductor Manufacturing Corporation
- Pei-Hsiu Tseng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 10,796,749
- Issue date Oct 6, 2020
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit device incorporating time-to-transition signal n...
- Patent number 10,796,748
- Issue date Oct 6, 2020
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory processing based on combining output currents
- Patent number 10,777,251
- Issue date Sep 15, 2020
- Facebook, Inc.
- Ahmad Byagowi
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for writing nonvolatile 3D NAND flash memory...
- Patent number 10,720,215
- Issue date Jul 21, 2020
- Fu-Chang Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Event counters for memory operations
- Patent number 10,714,185
- Issue date Jul 14, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having variable impedance memory cells and time-to-tr...
- Patent number 10,629,256
- Issue date Apr 21, 2020
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit having tracking circuit including series-connected t...
- Patent number 10,553,265
- Issue date Feb 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
IN-MEMORY COMPUTING (IMC) MEMORY DEVICE AND IN-MEMORY COMPUTING METHOD
- Publication number 20250149083
- Publication date May 8, 2025
- Macronix International Co., Ltd.
- Yu-Yu LIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH A TRANSISTOR ABOVE VERTICALLY STACKED MEMORY CELLS
- Publication number 20240389309
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Kamal M. KARDA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE WITH IMPROVED DRIVER OPERATION AND METHODS TO OPERATE...
- Publication number 20240265963
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...
- Publication number 20240127884
- Publication date Apr 18, 2024
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
ARRANGEMENTS FOR MEMORY WITH ONE ACCESS TRANSISTOR FOR MULTIPLE CAP...
- Publication number 20240107749
- Publication date Mar 28, 2024
- Intel Corporation
- Abhishek A. Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY CIRCUIT
- Publication number 20240079048
- Publication date Mar 7, 2024
- Invention And Collaboration Laboratory Pte. Ltd.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH IMPROVED DRIVER OPERATION AND METHODS TO OPERATE...
- Publication number 20240013831
- Publication date Jan 11, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
NOR GATE BASED LOCAL ACCESS LINE DESELECT SIGNAL GENERATION
- Publication number 20230343384
- Publication date Oct 26, 2023
- Intel Corporation
- Yasir Mohsin Husain
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-to-Tr...
- Publication number 20230253033
- Publication date Aug 10, 2023
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...
- Publication number 20230059170
- Publication date Feb 23, 2023
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...
- Publication number 20220293165
- Publication date Sep 15, 2022
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLEXORS UNDER AN ARRAY OF MEMORY CELLS
- Publication number 20220277784
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Yuan He
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTE-IN-MEMORY (CIM) CELL CIRCUITS EMPLOYING CAPACITIVE STORAGE...
- Publication number 20220115059
- Publication date Apr 14, 2022
- QUALCOMM Incorporated
- Xia Li
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL CHARGE SHARING FOR COMPUTE-IN-MEMORY (CIM) CELL
- Publication number 20220108742
- Publication date Apr 7, 2022
- QUALCOMM Incorporated
- Xia LI
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...
- Publication number 20210287734
- Publication date Sep 16, 2021
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
EVENT COUNTERS FOR MEMORY OPERATIONS
- Publication number 20210202005
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...
- Publication number 20210082490
- Publication date Mar 18, 2021
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING VARIABLE IMPEDANCE MEMORY CELLS AND TIME-TO-TR...
- Publication number 20200388323
- Publication date Dec 10, 2020
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
EVENT COUNTERS FOR MEMORY OPERATIONS
- Publication number 20200342944
- Publication date Oct 29, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL DYNAMIC RANDOM-ACCESS MEMORY ARRAY
- Publication number 20200212041
- Publication date Jul 2, 2020
- Vladimir Machkaoutsan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE HAVING VARIABLE IMPEDANCE MEMORY CELLS AND TIME-TO-TR...
- Publication number 20200194053
- Publication date Jun 18, 2020
- R&D 3 LLC
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Application
EVENT COUNTERS FOR MEMORY OPERATIONS
- Publication number 20200135276
- Publication date Apr 30, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT
- Publication number 20190096457
- Publication date Mar 28, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF OPERATING TRACKING CIRCUIT
- Publication number 20180204609
- Publication date Jul 19, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMROY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20180166117
- Publication date Jun 14, 2018
- SK HYNIX INC.
- Hae-Rang CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20180082733
- Publication date Mar 22, 2018
- Toshiba Memory Corporation
- Chika TANAKA
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURATION FOR POWER REDUCTION IN DRAM
- Publication number 20140325136
- Publication date Oct 30, 2014
- Andre Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION FOR POWER REDUCTION IN DRAM
- Publication number 20140006700
- Publication date Jan 2, 2014
- Andre Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE
- Publication number 20120182791
- Publication date Jul 19, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Jun Koyama
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH SWITCH ELEMENT
- Publication number 20070268744
- Publication date Nov 22, 2007
- SPANSION LLC
- Masao Taguchi
- G11 - INFORMATION STORAGE

using a plurality of serially connected access transistors, each having a storage capacitor

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory device having variable impedance memory cells and time-to-tr...

Memory device having variable impedance memory cells and time-to-tr...

Memory device with improved driver operation and methods to operate...

Heterogeneous memory system

Memory device having variable impedance memory cells and time-to-tr...

Multiplexors under an array of memory cells

Memory device having variable impedance memory cells and time-to-tr...

Common mode compensation for non-linear polar material based differ...

Common mode compensation for multi-element non-linear polar materia...

Three-dimensional dynamic random-access memory array

Memory device having variable impedance memory cells and time-to-tr...

Memory circuit including tracking circuit

Multiplexors under an array of memory cells

Event counters for memory operations

Compute-in-memory (CIM) cell circuits employing capacitive storage...

Memory device having variable impedance memory cells and time-to-tr...

Compute-in-memory (CIM) employing low-power CIM circuits employing...

Read operations based on a dynamic reference

Memory device having variable impedance memory cells and time-to-tr...

Differential compute-in-memory bitcell

Memory circuit including tracking circuit

Event counters for memory operations

Bit line structure for two-transistor static random access memory

Memory device having variable impedance memory cells and time-to-tr...

Method and circuit device incorporating time-to-transition signal n...

In-memory processing based on combining output currents

Methods and apparatus for writing nonvolatile 3D NAND flash memory...

Event counters for memory operations

Memory device having variable impedance memory cells and time-to-tr...

Memory circuit having tracking circuit including series-connected t...

Patents Applicationslast 30 patents

IN-MEMORY COMPUTING (IMC) MEMORY DEVICE AND IN-MEMORY COMPUTING METHOD

MEMORY DEVICE WITH A TRANSISTOR ABOVE VERTICALLY STACKED MEMORY CELLS

MEMORY DEVICE WITH IMPROVED DRIVER OPERATION AND METHODS TO OPERATE...

Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...

ARRANGEMENTS FOR MEMORY WITH ONE ACCESS TRANSISTOR FOR MULTIPLE CAP...

MEMORY ARRAY CIRCUIT

MEMORY DEVICE WITH IMPROVED DRIVER OPERATION AND METHODS TO OPERATE...

NOR GATE BASED LOCAL ACCESS LINE DESELECT SIGNAL GENERATION

Memory Device Having Variable Impedance Memory Cells and Time-to-Tr...

Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...

Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...

MULTIPLEXORS UNDER AN ARRAY OF MEMORY CELLS

COMPUTE-IN-MEMORY (CIM) CELL CIRCUITS EMPLOYING CAPACITIVE STORAGE...

DIFFERENTIAL CHARGE SHARING FOR COMPUTE-IN-MEMORY (CIM) CELL

Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...

EVENT COUNTERS FOR MEMORY OPERATIONS

Memory Device Having Variable Impedance Memory Cells and Time-To-Tr...

MEMORY DEVICE HAVING VARIABLE IMPEDANCE MEMORY CELLS AND TIME-TO-TR...

EVENT COUNTERS FOR MEMORY OPERATIONS

THREE-DIMENSIONAL DYNAMIC RANDOM-ACCESS MEMORY ARRAY

MEMORY DEVICE HAVING VARIABLE IMPEDANCE MEMORY CELLS AND TIME-TO-TR...

EVENT COUNTERS FOR MEMORY OPERATIONS

MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT

METHOD OF OPERATING TRACKING CIRCUIT

MEMROY DEVICE AND OPERATING METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

CONFIGURATION FOR POWER REDUCTION IN DRAM

CONFIGURATION FOR POWER REDUCTION IN DRAM

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE

MEMORY SYSTEM WITH SWITCH ELEMENT