using a tapped delay line

Industry

CPC
H03K5/15046

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass

Current Industry

H03K5/15046using a tapped delay line

Industries

Patents Grantslast 30 patents

Information Patent Grant
Measurement, calibration and tuning of memory bus duty cycle
- Patent number 11,128,286
- Issue date Sep 21, 2021
- Western Digital Technologies, Inc.
- Shlomo Naidorf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronising devices using clock signal delay comparison
- Patent number 10,680,793
- Issue date Jun 9, 2020
- Imagination Technologies Limited
- Ravichandra Giriyappa
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Measurement, calibration and tuning of memory bus duty cycle
- Patent number 10,622,982
- Issue date Apr 14, 2020
- Western Digital Technologies, Inc.
- Shlomo Naidorf
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for meeting setup and hold times of a control signal with r...
- Patent number 10,382,025
- Issue date Aug 13, 2019
- Texas Instruments Incorporated
- Robert Callaghan Taft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quadrature clock generating mechanism of communication system trans...
- Patent number 10,374,588
- Issue date Aug 6, 2019
- Mediatek Inc.
- Po-Chun Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-phase clock generator
- Patent number 10,305,459
- Issue date May 28, 2019
- Micron Technology, Inc.
- Yantao Ma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Broadband envelope tracking
- Patent number 10,250,194
- Issue date Apr 2, 2019
- Analog Devices Global
- Patrick Pratt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous N pulse burst generator
- Patent number 10,200,021
- Issue date Feb 5, 2019
- Anritsu Company
- Donald Anthony Bradley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay line with short recovery time
- Patent number 10,177,751
- Issue date Jan 8, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Muhammad Nummer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital to analog conversion using semi-digital FIR filter
- Patent number 9,900,017
- Issue date Feb 20, 2018
- Apple Inc.
- Brian D. Clark
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data transmitter, data receiver and smart device using the same
- Patent number 9,749,126
- Issue date Aug 29, 2017
- Industry-Academic Cooperation Foundation, Yonsei University
- Tae Wook Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for multi-rate clock generation
- Patent number 9,602,115
- Issue date Mar 21, 2017
- MOTOROLA SOLUTIONS, INC.
- Mark Rozental
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 8,754,687
- Issue date Jun 17, 2014
- Conversant Intellectual Property Management Inc.
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 8,558,593
- Issue date Oct 15, 2013
- MOSAID Technologies Incorporated
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase adjusting device and camera
- Patent number 8,520,792
- Issue date Aug 27, 2013
- Nikon Corporation
- Daiki Ito
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ring oscillator
- Patent number 8,378,754
- Issue date Feb 19, 2013
- Advantest Corporation
- Kazuhiro Yamamoto
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 8,283,959
- Issue date Oct 9, 2012
- MOSAID Technologies Incorporated
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay circuit
- Patent number 8,269,553
- Issue date Sep 18, 2012
- Advantest Corporation
- Kazuhiro Yamamoto
- G01 - MEASURING TESTING
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 7,746,136
- Issue date Jun 29, 2010
- MOSAID Technologies Incorporated
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method to reduce jitter
- Patent number 7,599,458
- Issue date Oct 6, 2009
- Hewlett-Packard Development Company, L.P.
- Samuel D. Naffziger
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 7,456,666
- Issue date Nov 25, 2008
- Mosaid Technologies, Inc.
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interpolation of signals from a delay line
- Patent number 7,412,477
- Issue date Aug 12, 2008
- Xilinx, Inc.
- John K. Jennings
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 7,116,141
- Issue date Oct 3, 2006
- Mosaid Technologies Incorporated
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT, MULTIPLEXER, DEM...
- Patent number 6,882,211
- Issue date Apr 19, 2005
- Seiko Epson Corporation
- Minoru Kozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interpolating circuit, DLL circuit and semiconductor integrated cir...
- Patent number 6,674,314
- Issue date Jan 6, 2004
- Elpida Memory, Inc.
- Yasuhiro Takai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-doubling delay locked loop
- Patent number 6,441,659
- Issue date Aug 27, 2002
- Mosaid Technologies Incorporated
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Tunable pulse generator based on a wave pipeline
- Patent number 5,920,222
- Issue date Jul 6, 1999
- International Business Machines Corporation
- Steven M. Eustis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulse skew control
- Patent number 5,684,424
- Issue date Nov 4, 1997
- SGS-Thomson Microelectronics Ltd.
- Stephen Felix
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock re-timing apparatus with cascaded delay stages
- Patent number 5,663,767
- Issue date Sep 2, 1997
- Thomson Consumer Electronics, Inc.
- Mark Francis Rumreich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Series terminated clock deskewing apparatus
- Patent number 5,661,427
- Issue date Aug 26, 1997
- Micro Linear Corporation
- Ken McBride
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Synchronising Devices Using Clock Signal Delay Comparison
- Publication number 20200259631
- Publication date Aug 13, 2020
- Imagination Technologies Limited
- Ravichandra Giriyappa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-PHASE CLOCK GENERATOR
- Publication number 20180367130
- Publication date Dec 20, 2018
- Micron Technology, Inc.
- Yantao Ma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
QUADRATURE CLOCK GENERATING MECHANISM OF COMMUNICATION SYSTEM TRANS...
- Publication number 20180123575
- Publication date May 3, 2018
- MEDIATEK INC.
- Po-Chun Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BROADBAND ENVELOPE TRACKING
- Publication number 20170141736
- Publication date May 18, 2017
- ANALOG DEVICES GLOBAL
- Patrick Pratt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Frequency-Doubling Delay Locked Loop
- Publication number 20140009196
- Publication date Jan 9, 2014
- MOSAID TECHNOLOGIES INCORPORATED
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FREQUENCY-DOUBLING DELAY LOCKED LOOP
- Publication number 20130015898
- Publication date Jan 17, 2013
- MOSAID TECHNOLOGIES INCORPORATED
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE ADJUSTING DEVICE AND CAMERA
- Publication number 20120213309
- Publication date Aug 23, 2012
- Nikon Corporation
- Daiki Ito
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RING OSCILLATOR
- Publication number 20100327983
- Publication date Dec 30, 2010
- Advantest Corporation
- Kazuhiro Yamamoto
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY CIRCUIT
- Publication number 20100259435
- Publication date Oct 14, 2010
- Advantest Corporation
- Kazuhiro Yamamoto
- G04 - HOROLOGY
Information Patent Application
Frequency-Doubling Delay Locked Loop
- Publication number 20100225370
- Publication date Sep 9, 2010
- MOSAID TECHNOLOGIES INCORPORATED
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT FOR GENERATING OVERLAPPING SIGNALS
- Publication number 20090179677
- Publication date Jul 16, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Marcin Augustyniak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Frequency-doubling delay locked loop
- Publication number 20090039931
- Publication date Feb 12, 2009
- MOSAID Technologies, Inc.
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGNAL TRANSMITTING CIRCUIT
- Publication number 20070170971
- Publication date Jul 26, 2007
- HON HAI Precision Industry CO., LTD.
- YING-TSO LAI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Frequency-doubling delay locked loop
- Publication number 20060261866
- Publication date Nov 23, 2006
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method to reduce jitter
- Publication number 20060083341
- Publication date Apr 20, 2006
- P-cards
- Samuel D. Naffziger
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock signal distribution network and method
- Publication number 20050047445
- Publication date Mar 3, 2005
- Dmitrii Yu Stepanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Output circuit, input circuit, electronic circuit, multiplexer, dem...
- Publication number 20040008073
- Publication date Jan 15, 2004
- Minoru Kozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Interpolating circuit, DLL circuit and semiconductor integrated cir...
- Publication number 20030052718
- Publication date Mar 20, 2003
- ELPIDA MEMORY, INC.
- Yasuhiro Takai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Frequency-doubling delay locked loop
- Publication number 20030042947
- Publication date Mar 6, 2003
- Paul W. Demone
- H03 - BASIC ELECTRONIC CIRCUITRY

using a tapped delay line

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Measurement, calibration and tuning of memory bus duty cycle

Synchronising devices using clock signal delay comparison

Measurement, calibration and tuning of memory bus duty cycle

Circuit for meeting setup and hold times of a control signal with r...

Quadrature clock generating mechanism of communication system trans...

Multi-phase clock generator

Broadband envelope tracking

Synchronous N pulse burst generator

Delay line with short recovery time

Digital to analog conversion using semi-digital FIR filter

Data transmitter, data receiver and smart device using the same

Method and apparatus for multi-rate clock generation

Frequency-doubling delay locked loop

Frequency-doubling delay locked loop

Phase adjusting device and camera

Ring oscillator

Frequency-doubling delay locked loop

Delay circuit

Frequency-doubling delay locked loop

System and method to reduce jitter

Frequency-doubling delay locked loop

Interpolation of signals from a delay line

Frequency-doubling delay locked loop

OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT, MULTIPLEXER, DEM...

Interpolating circuit, DLL circuit and semiconductor integrated cir...

Frequency-doubling delay locked loop

Tunable pulse generator based on a wave pipeline

Pulse skew control

Clock re-timing apparatus with cascaded delay stages

Series terminated clock deskewing apparatus

Patents Applicationslast 30 patents

Synchronising Devices Using Clock Signal Delay Comparison

MULTI-PHASE CLOCK GENERATOR

QUADRATURE CLOCK GENERATING MECHANISM OF COMMUNICATION SYSTEM TRANS...

BROADBAND ENVELOPE TRACKING

Frequency-Doubling Delay Locked Loop

FREQUENCY-DOUBLING DELAY LOCKED LOOP

PHASE ADJUSTING DEVICE AND CAMERA

RING OSCILLATOR

DELAY CIRCUIT

Frequency-Doubling Delay Locked Loop

CIRCUIT FOR GENERATING OVERLAPPING SIGNALS

Frequency-doubling delay locked loop

SIGNAL TRANSMITTING CIRCUIT

Frequency-doubling delay locked loop

System and method to reduce jitter

Clock signal distribution network and method

Output circuit, input circuit, electronic circuit, multiplexer, dem...

Interpolating circuit, DLL circuit and semiconductor integrated cir...

Frequency-doubling delay locked loop