using associative or pseudo-associative address translation means

Industry

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G06F12/1027

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/1027using associative or pseudo-associative address translation means

Industries

Patents Grantslast 30 patents

Information Patent Grant
Validating address space context switches by loading an alternative...
- Patent number 12,174,750
- Issue date Dec 24, 2024
- International Business Machines Corporation
- Idan Horowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access
- Patent number 12,174,743
- Issue date Dec 24, 2024
- ARM Limited
- Graeme Leslie Ingram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stride-based prefetcher circuits for prefetching next stride(s) int...
- Patent number 12,164,429
- Issue date Dec 10, 2024
- QUALCOMM Incorporated
- Suryanarayana Murthy Durbhakula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for setting indicator data to indicate whethe...
- Patent number 12,164,436
- Issue date Dec 10, 2024
- ARM Limited
- Andrew Brookfield Swaine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic tuning of larger pages during runtime
- Patent number 12,147,352
- Issue date Nov 19, 2024
- International Business Machines Corporation
- Naijie Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global virtual address space across operating system domains
- Patent number 12,141,055
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for inflight data forwarding and invalidation...
- Patent number 12,141,073
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Filtering remote data synchronization barrier (DSB) instruction exe...
- Patent number 12,135,652
- Issue date Nov 5, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validation of store coherence relative to page translation invalida...
- Patent number 12,130,749
- Issue date Oct 29, 2024
- International Business Machines Corporation
- Shakti Kapoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware support for optimizing huge memory page selection
- Patent number 12,130,750
- Issue date Oct 29, 2024
- NVIDIA Corporation
- Aninda Manocha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 12,130,740
- Issue date Oct 29, 2024
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressing translation lookaside buffer (TLB) tags using a TLB met...
- Patent number 12,130,751
- Issue date Oct 29, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Servicing CPU demand requests with inflight prefetches
- Patent number 12,124,374
- Issue date Oct 22, 2024
- Texas Instruments Incorporated
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware translation request retry mechanism
- Patent number 12,124,381
- Issue date Oct 22, 2024
- ATI Technologies ULC
- Edwin Pang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing
- Patent number 12,118,412
- Issue date Oct 15, 2024
- IOTech Systems Limited
- Stephen Osselton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method for selectively dropping software prefetc...
- Patent number 12,111,772
- Issue date Oct 8, 2024
- Intel Corporation
- Wim Heirman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer entry allocation system and method
- Patent number 12,105,634
- Issue date Oct 1, 2024
- ATI Technologies ULC
- Edwin Pang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching address translation information
- Patent number 12,099,450
- Issue date Sep 24, 2024
- ARM Limited
- Richard Jared Cooper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command processing circuitry maintaining a linked list defining ent...
- Patent number 12,099,456
- Issue date Sep 24, 2024
- ARM Limited
- Guanghui Geng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Typed store buffers for hardening store forwarding
- Patent number 12,093,182
- Issue date Sep 17, 2024
- Intel Corporation
- Michael Lemay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process dedicated in-memory translation lookaside buffers (TLBs) (m...
- Patent number 12,093,186
- Issue date Sep 17, 2024
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor that prevents speculative execution across translation co...
- Patent number 12,086,245
- Issue date Sep 10, 2024
- Ventana Micro Systems Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for storing data and tags in different memory arrays
- Patent number 12,079,135
- Issue date Sep 3, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PC-based instruction group permissions
- Patent number 12,079,142
- Issue date Sep 3, 2024
- Apple Inc.
- Jeffry E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing translation lookaside buffer searches for splintered pages
- Patent number 12,079,140
- Issue date Sep 3, 2024
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page table hooks to memory types
- Patent number 12,066,951
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Samuel E. Bradshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for storing L2P table, system, device, and medium
- Patent number 12,061,557
- Issue date Aug 13, 2024
- INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD
- Qinglu Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache management operations using streaming engine
- Patent number 12,050,914
- Issue date Jul 30, 2024
- Texas Instruments Incorporated
- Joseph Raymond Michael Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device and method of updating translation lookaside buff...
- Patent number 12,038,850
- Issue date Jul 16, 2024
- Rebellions Inc.
- Chang-Hyo Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical memory address omission or obfuscation within an execution...
- Patent number 12,032,472
- Issue date Jul 9, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TRANSLATION LOOKASIDE BUFFER PROBING PREVENTION
- Publication number 20250004950
- Publication date Jan 2, 2025
- SiFive, Inc.
- Bradley Gene Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVICING CPU DEMAND REQUESTS WITH INFLIGHT PREFETCHES
- Publication number 20240419602
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING AND USING A TRANSLATION TABLE THAT ASSOCIATES ATTRIBUTE...
- Publication number 20240419604
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Gabriel Zvi BenHanokh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE TABLE HOOKS TO MEMORY TYPES
- Publication number 20240403225
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Samuel E. Bradshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE
- Publication number 20240385840
- Publication date Nov 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Raymond Michael Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Range Based Memory Hints for Prefetcher, Cache and Memory C...
- Publication number 20240385966
- Publication date Nov 21, 2024
- Google LLC
- Xinliang David Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DEVICE AND METHOD OF UPDATING TRANSLATION LOOKASIDE BUFF...
- Publication number 20240378157
- Publication date Nov 14, 2024
- Rebellions Inc.
- Chang-Hyo Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR INFLIGHT DATA FORWARDING AND INVALIDATION...
- Publication number 20240362166
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE ACCESS FREQUENCY TRACKING
- Publication number 20240354216
- Publication date Oct 24, 2024
- ARM Limited
- Matthew Lucien Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTELLIGENT CONTENT MIGRATION WITH BORROWED MEMORY
- Publication number 20240345957
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Kenneth Marion Curewitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM CACHE SYSTEM AND OPERATING METHOD OF THE SAME
- Publication number 20240345964
- Publication date Oct 17, 2024
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- William Jinho Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adaptive Configuration of Address Translation Cache
- Publication number 20240345963
- Publication date Oct 17, 2024
- MELLANOX TECHNOLOGIES, LTD.
- Gal Shalom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor, Address Translation Method and Apparatus, Storage Medium...
- Publication number 20240330202
- Publication date Oct 3, 2024
- Huawei Technologies Co., Ltd
- Wei Pan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION IN A MULTI-NODE COMPUTING SYSTEM
- Publication number 20240330201
- Publication date Oct 3, 2024
- Samsung Electronics Co., Ltd.
- Alan Gara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FILTERING REMOTE DATA SYNCHRONIZATION BARRIER (DSB) INSTRUCTION EXE...
- Publication number 20240320157
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FILTERING REMOTE DATA SYNCHRONIZATION BARRIER (DSB) INSTRUCTION EXE...
- Publication number 20240320160
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERY LARGE ADDRESS SPACE USING EXTENDED PAGE TABLES
- Publication number 20240311289
- Publication date Sep 19, 2024
- Samsung Electronics Co., Ltd.
- David Lombard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE
- Publication number 20240311311
- Publication date Sep 19, 2024
- Li-Te Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE SUPPORT FOR OPTIMIZING HUGE MEMORY PAGE SELECTION
- Publication number 20240303201
- Publication date Sep 12, 2024
- NVIDIA Corporation
- Aninda Manocha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT INPUT/OUTPUT MEMORY MANAGEMENT UNIT
- Publication number 20240296128
- Publication date Sep 5, 2024
- ADVANCED MICRO DEVICES, INC.
- Wei Sheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER SOFTWARE MONITOR
- Publication number 20240289280
- Publication date Aug 29, 2024
- Rockwell Collins, Inc.
- John M. Connelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Processing System of Enhanced Efficiency and Method Thereof
- Publication number 20240281382
- Publication date Aug 22, 2024
- MEDIATEK INC.
- En-Shou Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER EXPANSION FOR RANDOM WRITE OPERATIONS
- Publication number 20240281383
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Ritesh Tiwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL MEMORY ADDRESS OMISSION OR OBFUSCATION WITHIN AN EXECUTION...
- Publication number 20240273009
- Publication date Aug 15, 2024
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPLOITING VIRTUAL ADDRESS (VA) SPATIAL LOCALITY USING TRANSLATION...
- Publication number 20240273035
- Publication date Aug 15, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSING TRANSLATION LOOKASIDE BUFFER (TLB) TAGS USING A TLB MET...
- Publication number 20240273034
- Publication date Aug 15, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSING TRANSLATION LOOKASIDE BUFFER (TLB) TAGS USING A TLB MET...
- Publication number 20240273036
- Publication date Aug 15, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPLOITING VIRTUAL ADDRESS (VA) SPATIAL LOCALITY USING TRANSLATION...
- Publication number 20240273033
- Publication date Aug 15, 2024
- QUALCOMM Incorporated
- Adrian Montero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPOSE A TENSOR WITH A SINGLE TRANSPOSE BUFFER
- Publication number 20240264948
- Publication date Aug 8, 2024
- META PLATFORMS, INC.
- Janam Kumarbhai Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING RETIRED PAGES HISTORY FOR INSTRUCTION TRANSLATION LOOKASIDE B...
- Publication number 20240264949
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- Ajay Kumar Rathee
- G06 - COMPUTING CALCULATING COUNTING

using associative or pseudo-associative address translation means

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Validating address space context switches by loading an alternative...

Memory access

Stride-based prefetcher circuits for prefetching next stride(s) int...

Apparatus and methods for setting indicator data to indicate whethe...

Dynamic tuning of larger pages during runtime

Global virtual address space across operating system domains

Methods and apparatus for inflight data forwarding and invalidation...

Filtering remote data synchronization barrier (DSB) instruction exe...

Validation of store coherence relative to page translation invalida...

Hardware support for optimizing huge memory page selection

Apparatuses and methods for a processor architecture

Compressing translation lookaside buffer (TLB) tags using a TLB met...

Servicing CPU demand requests with inflight prefetches

Hardware translation request retry mechanism

Data processing

Device, system and method for selectively dropping software prefetc...

Translation lookaside buffer entry allocation system and method

Caching address translation information

Command processing circuitry maintaining a linked list defining ent...

Typed store buffers for hardening store forwarding

Process dedicated in-memory translation lookaside buffers (TLBs) (m...

Processor that prevents speculative execution across translation co...

Techniques for storing data and tags in different memory arrays

PC-based instruction group permissions

Reducing translation lookaside buffer searches for splintered pages

Page table hooks to memory types

Method for storing L2P table, system, device, and medium

Cache management operations using streaming engine

Processing device and method of updating translation lookaside buff...

Physical memory address omission or obfuscation within an execution...

Patents Applicationslast 30 patents

TRANSLATION LOOKASIDE BUFFER PROBING PREVENTION

SERVICING CPU DEMAND REQUESTS WITH INFLIGHT PREFETCHES

GENERATING AND USING A TRANSLATION TABLE THAT ASSOCIATES ATTRIBUTE...

PAGE TABLE HOOKS TO MEMORY TYPES

CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE

Address Range Based Memory Hints for Prefetcher, Cache and Memory C...

PROCESSING DEVICE AND METHOD OF UPDATING TRANSLATION LOOKASIDE BUFF...

METHODS AND APPARATUS FOR INFLIGHT DATA FORWARDING AND INVALIDATION...

PAGE ACCESS FREQUENCY TRACKING

INTELLIGENT CONTENT MIGRATION WITH BORROWED MEMORY

DRAM CACHE SYSTEM AND OPERATING METHOD OF THE SAME

Adaptive Configuration of Address Translation Cache

Processor, Address Translation Method and Apparatus, Storage Medium...

ADDRESS TRANSLATION IN A MULTI-NODE COMPUTING SYSTEM

FILTERING REMOTE DATA SYNCHRONIZATION BARRIER (DSB) INSTRUCTION EXE...

FILTERING REMOTE DATA SYNCHRONIZATION BARRIER (DSB) INSTRUCTION EXE...

VERY LARGE ADDRESS SPACE USING EXTENDED PAGE TABLES

ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE

HARDWARE SUPPORT FOR OPTIMIZING HUGE MEMORY PAGE SELECTION

EFFICIENT INPUT/OUTPUT MEMORY MANAGEMENT UNIT

TRANSLATION LOOKASIDE BUFFER SOFTWARE MONITOR

Memory Processing System of Enhanced Efficiency and Method Thereof

BUFFER EXPANSION FOR RANDOM WRITE OPERATIONS

PHYSICAL MEMORY ADDRESS OMISSION OR OBFUSCATION WITHIN AN EXECUTION...

EXPLOITING VIRTUAL ADDRESS (VA) SPATIAL LOCALITY USING TRANSLATION...

COMPRESSING TRANSLATION LOOKASIDE BUFFER (TLB) TAGS USING A TLB MET...

COMPRESSING TRANSLATION LOOKASIDE BUFFER (TLB) TAGS USING A TLB MET...

EXPLOITING VIRTUAL ADDRESS (VA) SPATIAL LOCALITY USING TRANSLATION...

TRANSPOSE A TENSOR WITH A SINGLE TRANSPOSE BUFFER

USING RETIRED PAGES HISTORY FOR INSTRUCTION TRANSLATION LOOKASIDE B...