using compression techniques

Industry

CPC
G01R31/31921

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Parent Industries

GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31921using compression techniques

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method of testing electronic circuits and corresponding circuit
- Patent number 11,762,019
- Issue date Sep 19, 2023
- STMicroelectronics S.r.l.
- David Vincenzoni
- G01 - MEASURING TESTING
Information Patent Grant
Programmable scan chain debug technique
- Patent number 11,754,624
- Issue date Sep 12, 2023
- Seagate Technology LLC
- Bharat Londhe
- G01 - MEASURING TESTING
Information Patent Grant
Method of testing electronic circuits and corresponding circuit
- Patent number 11,500,021
- Issue date Nov 15, 2022
- STMicroelectronics S.r.l.
- David Vincenzoni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Suspect resolution for scan chain defect diagnosis
- Patent number 11,423,202
- Issue date Aug 23, 2022
- SIEMENS INDUSTRY SOFTWARE INC.
- Grzegorz Mrugalski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart and efficient protocol logic analyzer configured within autom...
- Patent number 10,955,461
- Issue date Mar 23, 2021
- Advantest Corporation
- Linden Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test scheduling and test access in test compression environment
- Patent number 10,955,460
- Issue date Mar 23, 2021
- Mentor Graphics Corporation
- Mark Kassab
- G01 - MEASURING TESTING
Information Patent Grant
Frequent pattern mining method and apparatus
- Patent number 10,872,394
- Issue date Dec 22, 2020
- Daegu Gyeongbuk Institute of Science & Technology
- Min Soo Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-field self-test controller for safety critical automotive use cases
- Patent number 10,481,202
- Issue date Nov 19, 2019
- QUALCOMM Incorporated
- Arvind Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and scan test method including writing and rea...
- Patent number 10,295,597
- Issue date May 21, 2019
- Renesas Electronics Corporation
- Yoichi Maeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for construction of a highly efficient and predic...
- Patent number 9,817,069
- Issue date Nov 14, 2017
- Cadence Design Systems, Inc.
- Steev Wilcox
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for improving efficiency of sequential test compr...
- Patent number 9,817,068
- Issue date Nov 14, 2017
- Cadence Design Systems, Inc.
- Vivek Chickermane
- G01 - MEASURING TESTING
Information Patent Grant
Parallel test device and method
- Patent number 9,638,751
- Issue date May 2, 2017
- SK hynix Inc.
- Min Chang Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for improving efficiency of XOR-based test compre...
- Patent number 9,606,179
- Issue date Mar 28, 2017
- Cadence Design Systems, Inc.
- Paul Alexander Cunningham
- G01 - MEASURING TESTING
Information Patent Grant
Parallel test device and method
- Patent number 9,423,456
- Issue date Aug 23, 2016
- SK hynix Inc.
- Min Chang Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Localizing fault flop in circuit by using modified test pattern
- Patent number 9,329,235
- Issue date May 3, 2016
- Synopsys, Inc.
- Parthajit Bhattacharya
- G01 - MEASURING TESTING
Information Patent Grant
Continuous application and decompression of test patterns and selec...
- Patent number 9,134,370
- Issue date Sep 15, 2015
- Mentor Graphics Corporation
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Grant
Cost estimation for device testing
- Patent number 8,769,361
- Issue date Jul 1, 2014
- Advantest (Singapore) Pte Ltd
- Andrew S. Hildebrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital system and a method for error detection thereof
- Patent number 8,560,932
- Issue date Oct 15, 2013
- NXP B.V.
- Richard Petrus Kleihorst
- G01 - MEASURING TESTING
Information Patent Grant
Compression based on deterministic vector clustering of incompatibl...
- Patent number 8,347,159
- Issue date Jan 1, 2013
- Mentor Graphics Corporation
- Grzegorz Mrugalski
- G01 - MEASURING TESTING
Information Patent Grant
Chip and system utilizing the same
- Patent number 8,098,178
- Issue date Jan 17, 2012
- Mediatek Inc.
- Yi-Chiuan Wang
- G01 - MEASURING TESTING
Information Patent Grant
Low power decompression of test cubes
- Patent number 8,046,653
- Issue date Oct 25, 2011
- Mentor Graphics Corporation
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Grant
System and method for adaptive nonlinear test vector compression
- Patent number 7,975,194
- Issue date Jul 5, 2011
- International Business Machines Corporation
- Samuel I. Ward
- G01 - MEASURING TESTING
Information Patent Grant
Fault diagnosis of compressed test responses
- Patent number 7,962,820
- Issue date Jun 14, 2011
- Mentor Graphics Corporation
- Janusz Rajski
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip testing circuit
- Patent number 7,940,588
- Issue date May 10, 2011
- Etron Technology, Inc.
- Der-Min Yuan
- G11 - INFORMATION STORAGE
Information Patent Grant
Compressing test responses using a compactor
- Patent number 7,890,827
- Issue date Feb 15, 2011
- Mentor Graphics Corporation
- Janusz Rajski
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power decompression of test cubes
- Patent number 7,797,603
- Issue date Sep 14, 2010
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Grant
Compressing test responses using a compactor
- Patent number 7,743,302
- Issue date Jun 22, 2010
- Janusz Rajski
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating, from a test cube set, a generator configured...
- Patent number 7,610,540
- Issue date Oct 27, 2009
- NEC Laboratories America, Inc.
- Kedarnath Balakrishnan
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for testing logic circuit designs
- Patent number 7,610,539
- Issue date Oct 27, 2009
- NEC Laboratories America, Inc.
- Kedarnath Balakrishnan
- G01 - MEASURING TESTING
Information Patent Grant
Test apparatus and method for testing a circuit unit
- Patent number 7,574,643
- Issue date Aug 11, 2009
- Infineon Technologies AG
- Stefan Gollmer
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF TESTING ELECTRONIC CIRCUITS AND CORRESPONDING CIRCUIT
- Publication number 20230031516
- Publication date Feb 2, 2023
- STMicroelectronics S.r.l
- David Vincenzoni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SUSPECT RESOLUTION FOR SCAN CHAIN DEFECT DIAGNOSIS
- Publication number 20220065932
- Publication date Mar 3, 2022
- Mentor Graphics Corporation
- Grzegorz Mrugalski
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF TESTING ELECTRONIC CIRCUITS AND CORRESPONDING CIRCUIT
- Publication number 20210165043
- Publication date Jun 3, 2021
- STMicroelectronics S.r.l
- David Vincenzoni
- G01 - MEASURING TESTING
Information Patent Application
SMART AND EFFICIENT PROTOCOL LOGIC ANALYZER CONFIGURED WITHIN AUTOM...
- Publication number 20190353696
- Publication date Nov 21, 2019
- Advantest Corporation
- Linden HSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-FIELD SELF-TEST CONTROLLER FOR SAFETY CRITICAL AUTOMOTIVE USE CASES
- Publication number 20180231609
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Arvind JAIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE AND SCAN TEST METHOD
- Publication number 20180059183
- Publication date Mar 1, 2018
- RENESAS ELECTRONICS CORPORATION
- Yoichi MAEDA
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND METHOD FOR GENERATING INPUT CONTROL SIGNALS OF A SERIALI...
- Publication number 20150036783
- Publication date Feb 5, 2015
- Industrial Technology Research Institute
- Chen-An Chen
- G01 - MEASURING TESTING
Information Patent Application
Localizing Fault Flop in Circuit by Using Modified Test Pattern
- Publication number 20140281777
- Publication date Sep 18, 2014
- Synopsys, Inc.
- Parthajit Bhattacharya
- G01 - MEASURING TESTING
Information Patent Application
CONTINUOUS APPLICATION AND DECOMPRESSION OF TEST PATTERNS AND SELEC...
- Publication number 20140006888
- Publication date Jan 2, 2014
- Mentor Graphics Corporation
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
TEST MODULE, TEST APPARATUS AND TEST METHOD
- Publication number 20110282615
- Publication date Nov 17, 2011
- Advantest Corporation
- Akio MORIKAWA
- G01 - MEASURING TESTING
Information Patent Application
TEST APPARATUS, TEST MODULE AND TEST METHOD
- Publication number 20110283153
- Publication date Nov 17, 2011
- Advantest Corporation
- Akio MORIKAWA
- G01 - MEASURING TESTING
Information Patent Application
Low Power Decompression Of Test Cubes
- Publication number 20100306609
- Publication date Dec 2, 2010
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
COMPRESSING TEST RESPONSES USING A COMPACTOR
- Publication number 20100257417
- Publication date Oct 7, 2010
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
Compression Based On Deterministic Vector Clustering Of Incompatibl...
- Publication number 20100229060
- Publication date Sep 9, 2010
- GRZEGORZ MRUGALSKI
- G01 - MEASURING TESTING
Information Patent Application
CHIP TESTING CIRCUIT
- Publication number 20100171509
- Publication date Jul 8, 2010
- Der-Min YUAN
- G01 - MEASURING TESTING
Information Patent Application
CHIP AND SYSTEM UTILIZING THE SAME
- Publication number 20090279636
- Publication date Nov 12, 2009
- MEDIATEK INC.
- Yi-Chiuan Wang
- G01 - MEASURING TESTING
Information Patent Application
FAULT DIAGNOSIS OF COMPRESSED TEST RESPONSES
- Publication number 20090249147
- Publication date Oct 1, 2009
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TESTING LOGIC CIRCUIT DESIGNS
- Publication number 20090119563
- Publication date May 7, 2009
- NEC Laboratories America, Inc.
- Kedarnath Balakrishnan
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TESTING LOGIC CIRCUIT DESIGNS
- Publication number 20090119556
- Publication date May 7, 2009
- NEC Laboratories America, Inc.
- Kedarnath Balakrishnan
- G01 - MEASURING TESTING
Information Patent Application
COMPRESSION AND DECOMPRESSION OF STIMULUS AND RESPONSE WAVEFORMS IN...
- Publication number 20090113266
- Publication date Apr 30, 2009
- SAMPLIFY SYSTEMS, INC.
- Albert W. Wegener
- G01 - MEASURING TESTING
Information Patent Application
Systems and Methods for Scan Chain Testing Using Analog Signals
- Publication number 20090039897
- Publication date Feb 12, 2009
- VIA Technologies, Inc.
- David Fong
- G01 - MEASURING TESTING
Information Patent Application
System and Method for Adaptive Nonlinear Test Vector Compression
- Publication number 20080263418
- Publication date Oct 23, 2008
- Samuel I. Ward
- G01 - MEASURING TESTING
Information Patent Application
Compressing test responses using a compactor
- Publication number 20080133987
- Publication date Jun 5, 2008
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
COMPRESSION AND DECOMPRESSION OF STIMULUS AND RESPONSE WAVEFORMS IN...
- Publication number 20080126903
- Publication date May 29, 2008
- SAMPLIFY SYSTEMS, INC.
- Albert W. Wegener
- G01 - MEASURING TESTING
Information Patent Application
Low power decompression of test cubes
- Publication number 20080052586
- Publication date Feb 28, 2008
- Janusz Rajski
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit device, diagnosis method and diagnosis circuit f...
- Publication number 20070220389
- Publication date Sep 20, 2007
- Hitachi, Ltd.
- Tsutomu Sato
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Testing Logic Circuit Designs
- Publication number 20070113129
- Publication date May 17, 2007
- NEC Laboratories America, Inc.
- Kedarnath Balakrishnan
- G01 - MEASURING TESTING
Information Patent Application
Compressed logic sample storage
- Publication number 20070100568
- Publication date May 3, 2007
- Steven K. Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated circuit tester with software-scaleable channels
- Publication number 20070061640
- Publication date Mar 15, 2007
- Brian J. Arkin
- G01 - MEASURING TESTING
Information Patent Application
Data compression
- Publication number 20070011514
- Publication date Jan 11, 2007
- KONIKLIJKE PHILIPS ELECTRONICS
- Hendrikus Petrus Elisabeth Vranken
- G01 - MEASURING TESTING

using compression techniques

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of testing electronic circuits and corresponding circuit

Programmable scan chain debug technique

Method of testing electronic circuits and corresponding circuit

Suspect resolution for scan chain defect diagnosis

Smart and efficient protocol logic analyzer configured within autom...

Test scheduling and test access in test compression environment

Frequent pattern mining method and apparatus

In-field self-test controller for safety critical automotive use cases

Semiconductor device and scan test method including writing and rea...

Method and system for construction of a highly efficient and predic...

Method and system for improving efficiency of sequential test compr...

Parallel test device and method

Method and system for improving efficiency of XOR-based test compre...

Parallel test device and method

Localizing fault flop in circuit by using modified test pattern

Continuous application and decompression of test patterns and selec...

Cost estimation for device testing

Digital system and a method for error detection thereof

Compression based on deterministic vector clustering of incompatibl...

Chip and system utilizing the same

Low power decompression of test cubes

System and method for adaptive nonlinear test vector compression

Fault diagnosis of compressed test responses

Chip testing circuit

Compressing test responses using a compactor

Low power decompression of test cubes

Compressing test responses using a compactor

Method for generating, from a test cube set, a generator configured...

Method and apparatus for testing logic circuit designs

Test apparatus and method for testing a circuit unit

Patents Applicationslast 30 patents

METHOD OF TESTING ELECTRONIC CIRCUITS AND CORRESPONDING CIRCUIT

SUSPECT RESOLUTION FOR SCAN CHAIN DEFECT DIAGNOSIS

METHOD OF TESTING ELECTRONIC CIRCUITS AND CORRESPONDING CIRCUIT

SMART AND EFFICIENT PROTOCOL LOGIC ANALYZER CONFIGURED WITHIN AUTOM...

IN-FIELD SELF-TEST CONTROLLER FOR SAFETY CRITICAL AUTOMOTIVE USE CASES

SEMICONDUCTOR DEVICE AND SCAN TEST METHOD

DEVICE AND METHOD FOR GENERATING INPUT CONTROL SIGNALS OF A SERIALI...

Localizing Fault Flop in Circuit by Using Modified Test Pattern

CONTINUOUS APPLICATION AND DECOMPRESSION OF TEST PATTERNS AND SELEC...

TEST MODULE, TEST APPARATUS AND TEST METHOD

TEST APPARATUS, TEST MODULE AND TEST METHOD

Low Power Decompression Of Test Cubes

COMPRESSING TEST RESPONSES USING A COMPACTOR

Compression Based On Deterministic Vector Clustering Of Incompatibl...

CHIP TESTING CIRCUIT

CHIP AND SYSTEM UTILIZING THE SAME

FAULT DIAGNOSIS OF COMPRESSED TEST RESPONSES

METHOD AND APPARATUS FOR TESTING LOGIC CIRCUIT DESIGNS

METHOD AND APPARATUS FOR TESTING LOGIC CIRCUIT DESIGNS

COMPRESSION AND DECOMPRESSION OF STIMULUS AND RESPONSE WAVEFORMS IN...

Systems and Methods for Scan Chain Testing Using Analog Signals

System and Method for Adaptive Nonlinear Test Vector Compression

Compressing test responses using a compactor

COMPRESSION AND DECOMPRESSION OF STIMULUS AND RESPONSE WAVEFORMS IN...

Low power decompression of test cubes

Integrated circuit device, diagnosis method and diagnosis circuit f...

Method and Apparatus for Testing Logic Circuit Designs

Compressed logic sample storage

Integrated circuit tester with software-scaleable channels

Data compression