using error correcting codes [ECC] or parity check

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G11C29/42

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/42using error correcting codes [ECC] or parity check

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device and method of operating semiconductor m...
- Patent number 12,170,533
- Issue date Dec 17, 2024
- Samsung Electronics Co., Ltd.
- Sungrae Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for initializing memory error correction
- Patent number 12,170,122
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
One-time programmable memory device and semiconductor memory device...
- Patent number 12,165,726
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing memory array operational information in non-volatile subarrays
- Patent number 12,158,826
- Issue date Dec 3, 2024
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of reprogramming data in nonvolatile memory device, method o...
- Patent number 12,154,646
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Junyeong Seok
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,148,491
- Issue date Nov 19, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with read error handling
- Patent number 12,148,493
- Issue date Nov 19, 2024
- Yangtze Memory Technologies Co., Ltd.
- Boxuan Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and methods of operating semiconductor...
- Patent number 12,148,494
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Kiheung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Detect whether die or channel is defective to confirm temperature data
- Patent number 12,148,495
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system for detecting an erro...
- Patent number 12,148,492
- Issue date Nov 19, 2024
- SK hynix Inc.
- Yeong Han Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Health scan for content addressable memory
- Patent number 12,142,334
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction in a memory device having an error correction code...
- Patent number 12,142,333
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Grant
Address fault detection
- Patent number 12,142,335
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Steffen Buch
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits, systems, and methods for ECC fault detection
- Patent number 12,135,624
- Issue date Nov 5, 2024
- Renesas Electronics Corporation
- Mohamed Soubhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices and methods of operating semiconductor...
- Patent number 12,136,463
- Issue date Nov 5, 2024
- Samsung Electronics Co., Ltd.
- Kiheung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
RAM test with parity error detection and handling
- Patent number 12,130,700
- Issue date Oct 29, 2024
- Hamilton Sundstrand Corporation
- Qiuming Leng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmission failure feedback schemes for reducing crosstalk
- Patent number 12,124,329
- Issue date Oct 22, 2024
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for correcting an error in data transmission o...
- Patent number 12,125,549
- Issue date Oct 22, 2024
- MIMIRIP LLC
- In Jong Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-level error correcting code with sharing of check-bits
- Patent number 12,126,358
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection circuit, method and apparatus for data path, and compute...
- Patent number 12,119,072
- Issue date Oct 15, 2024
- Horizon Journey (Hangzhou) Artificial Intelligence Technology Co., Ltd.
- Jing Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Binary to ternary convertor for multilevel memory
- Patent number 12,119,064
- Issue date Oct 15, 2024
- Intel Corporation
- Pawel Tomkiewicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for determining memory cell data states
- Patent number 12,112,819
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Sheyang Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory repair method and apparatus based on error code tracking
- Patent number 12,111,723
- Issue date Oct 8, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable error correction codeword packing to support bit error rat...
- Patent number 12,106,815
- Issue date Oct 1, 2024
- Intel Coproration
- Ravi Motwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular error correction code circuitry
- Patent number 12,094,551
- Issue date Sep 17, 2024
- Intel Corporation
- Hwa Chaw Law
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacity-expanding memory control component
- Patent number 12,095,480
- Issue date Sep 17, 2024
- Astera Labs, Inc.
- Enrique Musoll
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
HYBRID MEMORY SYSTEM WITH CONFIGURABLE ERROR THRESHOLDS AND FAILURE...
- Publication number 20240419557
- Publication date Dec 19, 2024
- Netlist, Inc.
- Scott H. Milton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420790
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATIO...
- Publication number 20240412802
- Publication date Dec 12, 2024
- MimirIP LLC
- Kyung Whan KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...
- Publication number 20240404616
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20240386983
- Publication date Nov 21, 2024
- Lodestar Licensing Group LLC
- Keisuke Fujishiro
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS
- Publication number 20240388311
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20240363186
- Publication date Oct 31, 2024
- KIOXIA Corporation
- Naomi TAKEDA
- G11 - INFORMATION STORAGE
Information Patent Application
RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES
- Publication number 20240362112
- Publication date Oct 31, 2024
- The Boeing Company
- Mark Joseph Clemen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL CELL DATA ENCODING
- Publication number 20240363184
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM
- Publication number 20240363185
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Deping He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES
- Publication number 20240363193
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Pranam Shetty
- G11 - INFORMATION STORAGE
Information Patent Application
APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...
- Publication number 20240355405
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240354210
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Eung-Bo SHIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND/ADDRESS CHANNEL ERROR DETECTION
- Publication number 20240355407
- Publication date Oct 24, 2024
- Rambus Inc.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Application
CENTRALIZED ERROR CORRECTION CIRCUIT
- Publication number 20240347123
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Taeksang Song
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240338215
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Dong Uk LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...
- Publication number 20240339168
- Publication date Oct 10, 2024
- Samsung Electronics Co., Ltd.
- Sunghye Cho
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS
- Publication number 20240339169
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hiroki NOGUCHI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR
- Publication number 20240331795
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...
- Publication number 20240311239
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312550
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...
- Publication number 20240312547
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY AND ELECTRONIC DEVICE
- Publication number 20240312549
- Publication date Sep 19, 2024
- GigaDevice Semiconductor Inc.
- Jianxin LI
- G11 - INFORMATION STORAGE
Information Patent Application
HYBRID MEMORY SYSTEM WITH INCREASED BANDWIDTH
- Publication number 20240304271
- Publication date Sep 12, 2024
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Application
RAM TEST WITH PARITY ERROR DETECTION AND HANDLING
- Publication number 20240296087
- Publication date Sep 5, 2024
- HAMILTON SUNDSTRAND CORPORATION
- Qiuming Leng
- G11 - INFORMATION STORAGE
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

using error correcting codes [ECC] or parity check

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor memory device and method of operating semiconductor m...

Techniques for initializing memory error correction

One-time programmable memory device and semiconductor memory device...

Storing memory array operational information in non-volatile subarrays

Method of reprogramming data in nonvolatile memory device, method o...

Methods and apparatus for read-modify-write support in multi-banked...

Processing-in-memory (PIM) devices

Memory controller with read error handling

Semiconductor memory devices and methods of operating semiconductor...

Detect whether die or channel is defective to confirm temperature data

Semiconductor device and semiconductor system for detecting an erro...

Victim cache with dynamic allocation of entries

Health scan for content addressable memory

Atomic operations and histogram operations in a cache pipeline

Error correction in a memory device having an error correction code...

Address fault detection

Circuits, systems, and methods for ECC fault detection

Semiconductor memory devices and methods of operating semiconductor...

RAM test with parity error detection and handling

Transmission failure feedback schemes for reducing crosstalk

Apparatus and method for correcting an error in data transmission o...

Two-level error correcting code with sharing of check-bits

Protection circuit, method and apparatus for data path, and compute...

Binary to ternary convertor for multilevel memory

Apparatus for determining memory cell data states

Memory repair method and apparatus based on error code tracking

Methods and apparatus for eviction in dual datapath victim cache sy...

Variable error correction codeword packing to support bit error rat...

Modular error correction code circuitry

Capacity-expanding memory control component

Patents Applicationslast 30 patents

HYBRID MEMORY SYSTEM WITH CONFIGURABLE ERROR THRESHOLDS AND FAILURE...

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

SELF-CALIBRATION IN A MEMORY DEVICE

MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATIO...

TECHNIQUES FOR DETECTING A STATE OF A BUS

SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

MEMORY SYSTEM

RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES

MULTI-LEVEL CELL DATA ENCODING

TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM

PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES

APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

COMMAND/ADDRESS CHANNEL ERROR DETECTION

CENTRALIZED ERROR CORRECTION CIRCUIT

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR

DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

APPARATUSES, SYSTEMS, AND METHODS FOR STORING ERROR INFORMATION AND...

NON-VOLATILE MEMORY AND ELECTRONIC DEVICE

HYBRID MEMORY SYSTEM WITH INCREASED BANDWIDTH

RAM TEST WITH PARITY ERROR DETECTION AND HANDLING

VICTIM CACHE WITH WRITE MISS MERGING