using error correcting codes [ECC] or parity check

Industry

CPC
G11C29/42

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/42using error correcting codes [ECC] or parity check

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Patents Grantslast 30 patents

Information Patent Grant
In-situ detection of anomalies in integrated circuits using machine...
- Patent number 12,307,747
- Issue date May 20, 2025
- Intel Corporation
- Sriram R. Vangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices that support enhanced data recovery op...
- Patent number 12,308,082
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Seungjun Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Media scan in memory systems
- Patent number 12,300,336
- Issue date May 13, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing memory testing using error correction code values
- Patent number 12,300,339
- Issue date May 13, 2025
- Micron Technology, Inc.
- Kok Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including a sub-controller and operating method of th...
- Patent number 12,300,341
- Issue date May 13, 2025
- SK Hynix Inc.
- Jong Joo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting memory power consumption
- Patent number 12,300,340
- Issue date May 13, 2025
- Microsoft Technology Licensing, LLC
- Ori Laslo
- G11 - INFORMATION STORAGE
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage devices and methods of operating storage devices
- Patent number 12,288,590
- Issue date Apr 29, 2025
- Samsung Electronics Co., Ltd.
- Eun Chu Oh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having an improved ECC architecture
- Patent number 12,288,591
- Issue date Apr 29, 2025
- Micron Technology, Inc.
- Christophe Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit retiring to mitigate bit errors
- Patent number 12,283,333
- Issue date Apr 22, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND data placement schema
- Patent number 12,277,979
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Carminantonio Manganelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for improving ECC operation of memories
- Patent number 12,266,410
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Christophe Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die-based high and low priority error queues
- Patent number 12,260,927
- Issue date Mar 25, 2025
- Kioxia Corporation
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with serial and parallel testing structure for sensin...
- Patent number 12,254,938
- Issue date Mar 18, 2025
- Alberto Troia
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 12,254,929
- Issue date Mar 18, 2025
- Kioxia Corporation
- Masanobu Shirakawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, memory system and operation method of memory system
- Patent number 12,249,386
- Issue date Mar 11, 2025
- SK Hynix Inc.
- Munseon Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM assist error correction mechanism for DDR SDRAM interface
- Patent number 12,242,344
- Issue date Mar 4, 2025
- Samsung Electronics Co., Ltd.
- Dimin Niu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage system and method for proactive die retirement by fatal wor...
- Patent number 12,243,605
- Issue date Mar 4, 2025
- SanDisk Technologies, Inc.
- Xuan Tian
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, memory system and method of controlling semic...
- Patent number 12,243,606
- Issue date Mar 4, 2025
- AP Memory Technology Corporation
- Hsin-Nan Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated voltage demarcation (VDM) adjustment for memory device
- Patent number 12,243,577
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Yi-Min Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for improving radiation tolerance of memory
- Patent number 12,237,032
- Issue date Feb 25, 2025
- Board of Trustees of the University of Alabama, for and on behalf of the Univ...
- Biswajit Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrity check device for safety sensitive data and electronic dev...
- Patent number 12,229,001
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Dongsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and memory with configurable metadata portion
- Patent number 12,230,347
- Issue date Feb 18, 2025
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point memory read technique to mitigate drift errors
- Patent number 12,230,346
- Issue date Feb 18, 2025
- Intel Corporation
- Hemant P. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and memory system performing error corr...
- Patent number 12,224,026
- Issue date Feb 11, 2025
- SK Hynix Inc.
- Hong Ki Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for tracking word line accesses
- Patent number 12,217,813
- Issue date Feb 4, 2025
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Remapping bad blocks in a memory sub-system
- Patent number 12,217,814
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Amit Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTERFACE READ AFTER WRITE
- Publication number 20250165191
- Publication date May 22, 2025
- Micron Technology, Inc.
- Yue Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IN-LINE ECC PROTECTION
- Publication number 20250165393
- Publication date May 22, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Denis Roland BEAUDOIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION FOR SRAM USED IN A SAFETY-CRITICAL DOMAIN
- Publication number 20250157561
- Publication date May 15, 2025
- ADVANCED MICRO DEVICES, INC.
- Uma Sankara Rao Balla
- G11 - INFORMATION STORAGE
Information Patent Application
STUCK BITS ENCODING AND DECODING ON A STORAGE DEVICE
- Publication number 20250157562
- Publication date May 15, 2025
- Western Digital Technologies, Inc.
- ROBERT MATEESCU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING TRIPLE ADJACENT ERROR DETECTION, MEMOR...
- Publication number 20250149105
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Kijun LEE
- G11 - INFORMATION STORAGE
Information Patent Application
AUTOMATED VOLTAGE DEMARCATION (VDM) ADJUSTMENT FOR MEMORY DEVICE
- Publication number 20250149079
- Publication date May 8, 2025
- Micron Technology, Inc.
- Yi-Min Lin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH STAGGERED ACCESS
- Publication number 20250147875
- Publication date May 8, 2025
- Rambus Inc.
- Torsten Partsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and device for correcting errors in resistive memories
- Publication number 20250131971
- Publication date Apr 24, 2025
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Valentin GHERMAN
- G11 - INFORMATION STORAGE
Information Patent Application
STORING MEMORY ARRAY OPERATIONAL INFORMATION IN NON-VOLATILE SUBARRAYS
- Publication number 20250130908
- Publication date Apr 24, 2025
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING FUNCTIONALITY OF MEMORY CONTROLLERS USING A LOOPBACK MODE...
- Publication number 20250131970
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Massimo Sutera
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR TRACKING WORD LINE ACCESSES
- Publication number 20250131972
- Publication date Apr 24, 2025
- Lodestar Licensing Group LLC
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ERROR CORRECTION CODING WITH MULTIPLE HASH GROUPINGS AND...
- Publication number 20250124997
- Publication date Apr 17, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Katherine H. CHIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INCLUDING ERROR CORRECTION CIRCUIT
- Publication number 20250118387
- Publication date Apr 10, 2025
- SK HYNIX INC.
- Mun Seon JANG
- G11 - INFORMATION STORAGE
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METADATA STORAGE AT A MEMORY DEVICE
- Publication number 20250118388
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND MEMORY WITH CONFIGURABLE METADATA PORTION
- Publication number 20250111885
- Publication date Apr 3, 2025
- QUALCOMM Incorporated
- Jungwon Suh
- G11 - INFORMATION STORAGE
Information Patent Application
HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY
- Publication number 20250111884
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND AN OPERATING METHOD THEREOF
- Publication number 20250104788
- Publication date Mar 27, 2025
- Yangtze Memory Technologies Co., Ltd.
- Shuai ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL DROP COMPENSATED MEMORY
- Publication number 20250087289
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
CRYPTOGRAPHIC KEY MANAGEMENT
- Publication number 20250086329
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Juane Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING
- Publication number 20250086051
- Publication date Mar 13, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE DSP GENERATION OF READ THRESHOLDS FOR GAUSSIAN AND NON-GAU...
- Publication number 20250087288
- Publication date Mar 13, 2025
- Beijing Tenafe Electronic Technology Co., Ltd.
- Yingquan Wu
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INITIALIZING MEMORY ERROR CORRECTION
- Publication number 20250078948
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250078946
- Publication date Mar 6, 2025
- RENESAS ELECTRONICS CORPORATION
- Tomohiro MIURA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20250078947
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Sung-Rae KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE CONFIGURED TO STORE PARITY DATA AND METHOD OF...
- Publication number 20250069628
- Publication date Feb 27, 2025
- SK HYNIX INC.
- Byoung Sung YOU
- G06 - COMPUTING CALCULATING COUNTING

using error correcting codes [ECC] or parity check

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

In-situ detection of anomalies in integrated circuits using machine...

Semiconductor memory devices that support enhanced data recovery op...

Media scan in memory systems

Performing memory testing using error correction code values

Memory system including a sub-controller and operating method of th...

Adjusting memory power consumption

Write merging on stores with different privilege levels

Storage devices and methods of operating storage devices

Memory device having an improved ECC architecture

Bit retiring to mitigate bit errors

NAND data placement schema

Hybrid victim cache and write miss buffer with fence operation

Methods and systems for improving ECC operation of memories

Methods and apparatus for multi-banked victim cache with dual datapath

Die-based high and low priority error queues

Memory device with serial and parallel testing structure for sensin...

Semiconductor memory device

Memory, memory system and operation method of memory system

DRAM assist error correction mechanism for DDR SDRAM interface

Storage system and method for proactive die retirement by fatal wor...

Semiconductor device, memory system and method of controlling semic...

Automated voltage demarcation (VDM) adjustment for memory device

Systems and methods for improving radiation tolerance of memory

Integrity check device for safety sensitive data and electronic dev...

System and memory with configurable metadata portion

Cross-point memory read technique to mitigate drift errors

Semiconductor memory device and memory system performing error corr...

Apparatuses and methods for tracking word line accesses

Atomic compare and swap in a coherent cache system

Remapping bad blocks in a memory sub-system

Patents Applicationslast 30 patents

INTERFACE READ AFTER WRITE

METHOD AND SYSTEM FOR IN-LINE ECC PROTECTION

ERROR DETECTION FOR SRAM USED IN A SAFETY-CRITICAL DOMAIN

STUCK BITS ENCODING AND DECODING ON A STORAGE DEVICE

MEMORY DEVICE FOR SUPPORTING TRIPLE ADJACENT ERROR DETECTION, MEMOR...

AUTOMATED VOLTAGE DEMARCATION (VDM) ADJUSTMENT FOR MEMORY DEVICE

MEMORY DEVICE WITH STAGGERED ACCESS

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

Method and device for correcting errors in resistive memories

STORING MEMORY ARRAY OPERATIONAL INFORMATION IN NON-VOLATILE SUBARRAYS

EXTENDING FUNCTIONALITY OF MEMORY CONTROLLERS USING A LOOPBACK MODE...

APPARATUSES AND METHODS FOR TRACKING WORD LINE ACCESSES

METHOD FOR ERROR CORRECTION CODING WITH MULTIPLE HASH GROUPINGS AND...

MEMORY INCLUDING ERROR CORRECTION CIRCUIT

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

METADATA STORAGE AT A MEMORY DEVICE

SYSTEM AND MEMORY WITH CONFIGURABLE METADATA PORTION

HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY

MEMORY SYSTEM AND AN OPERATING METHOD THEREOF

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

SIGNAL DROP COMPENSATED MEMORY

CRYPTOGRAPHIC KEY MANAGEMENT

MEMORY REPAIR METHOD AND APPARATUS BASED ON ERROR CODE TRACKING

ADAPTIVE DSP GENERATION OF READ THRESHOLDS FOR GAUSSIAN AND NON-GAU...

TECHNIQUES FOR INITIALIZING MEMORY ERROR CORRECTION

MEMORY DEVICE

MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

SEMICONDUCTOR DEVICE CONFIGURED TO STORE PARITY DATA AND METHOD OF...