using error correcting codes [ECC] or parity check

Industry

CPC
G11C29/42

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/42using error correcting codes [ECC] or parity check

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Method and system for in-line ECC protection
- Patent number 12,204,443
- Issue date Jan 21, 2025
- Texas Instruments Incorporated
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and memory system including the same
- Patent number 12,205,661
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor circuit including latch circuit for error correction
- Patent number 12,199,613
- Issue date Jan 14, 2025
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Lui Sakai
- G11 - INFORMATION STORAGE
Information Patent Grant
Metadata storage at a memory device
- Patent number 12,198,776
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive DSP generation of read thresholds for gaussian and non-gau...
- Patent number 12,190,975
- Issue date Jan 7, 2025
- Beijing Tenafe Electronic Technology Co., Ltd.
- Yingquan Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and memory system including the same
- Patent number 12,190,995
- Issue date Jan 7, 2025
- Samsung Electronics Co., Ltd.
- Byunghoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Early detection of single bit error on address and data
- Patent number 12,191,885
- Issue date Jan 7, 2025
- Synopsys, Inc.
- Karthik Thucanakkenpalayam Sundararajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for checking data, electronic device, and storage...
- Patent number 12,190,976
- Issue date Jan 7, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jia Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Cryptographic key management
- Patent number 12,182,318
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Juane Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of reducing logic for multi-bit error correcting...
- Patent number 12,181,968
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal drop compensated memory
- Patent number 12,176,052
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device configured to store parity data and method of...
- Patent number 12,176,056
- Issue date Dec 24, 2024
- SK hynix Inc.
- Byoung Sung You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and method of operating semiconductor m...
- Patent number 12,170,533
- Issue date Dec 17, 2024
- Samsung Electronics Co., Ltd.
- Sungrae Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for initializing memory error correction
- Patent number 12,170,122
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
One-time programmable memory device and semiconductor memory device...
- Patent number 12,165,726
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing memory array operational information in non-volatile subarrays
- Patent number 12,158,826
- Issue date Dec 3, 2024
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of reprogramming data in nonvolatile memory device, method o...
- Patent number 12,154,646
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Junyeong Seok
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,148,491
- Issue date Nov 19, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with read error handling
- Patent number 12,148,493
- Issue date Nov 19, 2024
- Yangtze Memory Technologies Co., Ltd.
- Boxuan Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and methods of operating semiconductor...
- Patent number 12,148,494
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Kiheung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Detect whether die or channel is defective to confirm temperature data
- Patent number 12,148,495
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system for detecting an erro...
- Patent number 12,148,492
- Issue date Nov 19, 2024
- SK hynix Inc.
- Yeong Han Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Health scan for content addressable memory
- Patent number 12,142,334
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction in a memory device having an error correction code...
- Patent number 12,142,333
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SYSTEM AND OPERATION METHOD THEREOF, AND READABLE STORAGE ME...
- Publication number 20250014653
- Publication date Jan 9, 2025
- Yangtze Memory Technologies Co., Ltd.
- Teng ZHOU
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CORRECTING AN ERROR IN DATA TRANSMISSION O...
- Publication number 20250014666
- Publication date Jan 9, 2025
- MimirIP LLC
- In Jong JANG
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE DETERMINING DETERIORATION WORDLINE, AND METHOD OF OP...
- Publication number 20250014664
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Minji Cho
- G11 - INFORMATION STORAGE
Information Patent Application
TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE
- Publication number 20250014665
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Ivo Thomas Wambeke
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK
- Publication number 20250013530
- Publication date Jan 9, 2025
- Lodestar Licensing Group, LLC
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR TESTING ERROR CORRECTION CODE (ECC) LOGIC O...
- Publication number 20240428876
- Publication date Dec 26, 2024
- QUALCOMM Incorporated
- Sateeshkumar INJARAPU
- G11 - INFORMATION STORAGE
Information Patent Application
HYBRID MEMORY SYSTEM WITH CONFIGURABLE ERROR THRESHOLDS AND FAILURE...
- Publication number 20240419557
- Publication date Dec 19, 2024
- Netlist, Inc.
- Scott H. Milton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-CALIBRATION IN A MEMORY DEVICE
- Publication number 20240420790
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Jennifer E. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATIO...
- Publication number 20240412802
- Publication date Dec 12, 2024
- MimirIP LLC
- Kyung Whan KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...
- Publication number 20240404616
- Publication date Dec 5, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20240386983
- Publication date Nov 21, 2024
- Lodestar Licensing Group LLC
- Keisuke Fujishiro
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS
- Publication number 20240388311
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20240363186
- Publication date Oct 31, 2024
- KIOXIA Corporation
- Naomi TAKEDA
- G11 - INFORMATION STORAGE
Information Patent Application
RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES
- Publication number 20240362112
- Publication date Oct 31, 2024
- The Boeing Company
- Mark Joseph Clemen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL CELL DATA ENCODING
- Publication number 20240363184
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM
- Publication number 20240363185
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Deping He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES
- Publication number 20240363193
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Pranam Shetty
- G11 - INFORMATION STORAGE
Information Patent Application
APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...
- Publication number 20240355405
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240354210
- Publication date Oct 24, 2024
- SK HYNIX INC.
- Eung-Bo SHIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND/ADDRESS CHANNEL ERROR DETECTION
- Publication number 20240355407
- Publication date Oct 24, 2024
- Rambus Inc.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Application
CENTRALIZED ERROR CORRECTION CIRCUIT
- Publication number 20240347123
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Taeksang Song
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME
- Publication number 20240338215
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Dong Uk LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...
- Publication number 20240339168
- Publication date Oct 10, 2024
- Samsung Electronics Co., Ltd.
- Sunghye Cho
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS
- Publication number 20240339169
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hiroki NOGUCHI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR
- Publication number 20240331795
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...
- Publication number 20240311239
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING

using error correcting codes [ECC] or parity check

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and system for in-line ECC protection

Memory device and memory system including the same

Methods and apparatus to reduce bank pressure using aggressive writ...

Semiconductor circuit including latch circuit for error correction

Metadata storage at a memory device

Adaptive DSP generation of read thresholds for gaussian and non-gau...

Memory device and memory system including the same

Early detection of single bit error on address and data

Fully pipelined read-modify-write support

Method and device for checking data, electronic device, and storage...

Cryptographic key management

Methods and apparatus for allocation in a victim cache system

System and method of reducing logic for multi-bit error correcting...

Signal drop compensated memory

Semiconductor device configured to store parity data and method of...

Semiconductor memory device and method of operating semiconductor m...

Techniques for initializing memory error correction

One-time programmable memory device and semiconductor memory device...

Storing memory array operational information in non-volatile subarrays

Method of reprogramming data in nonvolatile memory device, method o...

Methods and apparatus for read-modify-write support in multi-banked...

Processing-in-memory (PIM) devices

Memory controller with read error handling

Semiconductor memory devices and methods of operating semiconductor...

Detect whether die or channel is defective to confirm temperature data

Semiconductor device and semiconductor system for detecting an erro...

Health scan for content addressable memory

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Error correction in a memory device having an error correction code...

Patents Applicationslast 30 patents

MEMORY SYSTEM AND OPERATION METHOD THEREOF, AND READABLE STORAGE ME...

APPARATUS AND METHOD FOR CORRECTING AN ERROR IN DATA TRANSMISSION O...

STORAGE DEVICE DETERMINING DETERIORATION WORDLINE, AND METHOD OF OP...

TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE

TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK

SYSTEMS AND METHODS FOR TESTING ERROR CORRECTION CODE (ECC) LOGIC O...

HYBRID MEMORY SYSTEM WITH CONFIGURABLE ERROR THRESHOLDS AND FAILURE...

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

SELF-CALIBRATION IN A MEMORY DEVICE

MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATIO...

TECHNIQUES FOR DETECTING A STATE OF A BUS

SEMICONDUCTOR DEVICES FOR DETECTING DEFECTS IN ERROR CORRECTION CIR...

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

MEMORY SYSTEM

RADIATION INDUCED ERROR DETECTION IN SOLID-STATE DEVICES

MULTI-LEVEL CELL DATA ENCODING

TECHNIQUES FOR RETIRING BLOCKS OF A MEMORY SYSTEM

PRESERVING BLOCKS EXPERIENCING PROGRAM FAILURE IN MEMORY DEVICES

APPRATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READING...

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

COMMAND/ADDRESS CHANNEL ERROR DETECTION

CENTRALIZED ERROR CORRECTION CIRCUIT

MEMORY SYSTEM AND DATA PROCESSING SYSTEM INCLUDING THE SAME

MEMORY SYSTEMS HAVING MEMORY DEVICES THEREIN WITH ENHANCED ERROR CO...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MEMORY REPAIR

DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...