using selective deposition of single crystal silicon

Industry

CPC
H01L21/76294

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Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Current Industry

H01L21/76294using selective deposition of single crystal silicon

Industries

Patents Grantslast 30 patents

Information Patent Grant
Super junction power device and method of making the same
- Patent number 12,154,943
- Issue date Nov 26, 2024
- SiEn (QingDao) Integrated Circuits Co., Ltd
- Min-Hwa Chi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor device
- Patent number 11,764,285
- Issue date Sep 19, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial silicon within horizontal access devices in vertical thre...
- Patent number 11,469,232
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Si-Woo Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 11,411,097
- Issue date Aug 9, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device substrate formed by additive process
- Patent number 11,404,270
- Issue date Aug 2, 2022
- Texas Instruments Incorporated
- Benjamin Stassen Cook
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure having porous semiconductor layer for RF de...
- Patent number 11,164,740
- Issue date Nov 2, 2021
- Newport Fab, LLC
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI substrate
- Patent number 11,158,534
- Issue date Oct 26, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable hardmask for overlayer metrology contrast
- Patent number 11,121,024
- Issue date Sep 14, 2021
- International Business Machines Corporation
- Ekmini A. De Silva
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Manufacturing method of semiconductor device
- Patent number 10,825,914
- Issue date Nov 3, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin structure and method for manufacturing the same
- Patent number 10,636,911
- Issue date Apr 28, 2020
- NANYA TECHNOLOGY CORPORATION
- Teng-Yen Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable hardmask for overlayer metrology contrast
- Patent number 10,622,248
- Issue date Apr 14, 2020
- International Business Machines Corporation
- Ekmini A. De Silva
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Process to form SOI substrate
- Patent number 10,304,723
- Issue date May 28, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming zig-zag trench structure to prevent aspect ratio trapping d...
- Patent number 9,947,532
- Issue date Apr 17, 2018
- GLOBALFOUNDRIES Inc.
- Judson R. Holt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device and method of manufacturing the same
- Patent number 9,099,527
- Issue date Aug 4, 2015
- SK Hynix Inc.
- Hyun Seung Yoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing an SOI wafer
- Patent number 6,559,035
- Issue date May 6, 2003
- STMicroelectronics S.r.l.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS circuit with all-around dielectrically insulated source-drain...
- Patent number 6,404,034
- Issue date Jun 11, 2002
- Infineon Technologies AG
- Dietrich Widmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of making semiconductor device having regions of insulating...
- Patent number 6,350,659
- Issue date Feb 26, 2002
- Agere Systems Guardian Corp.
- Chun-Ting Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing a CMOS circuit with all-around dielectric...
- Patent number 6,124,156
- Issue date Sep 26, 2000
- Infineon Technologies AG
- Dietrich Widmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming large area or selective area SOI
- Patent number 5,976,959
- Issue date Nov 2, 1999
- Industrial Technology Research Institute
- Jammy Chin-Ming Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced isolation scheme for deep submicron technology
- Patent number 5,950,097
- Issue date Sep 7, 1999
- Advanced Micro Devices, Inc.
- Kuang-Yeh Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming SOI structure
- Patent number 5,948,162
- Issue date Sep 7, 1999
- Rohm Co., Ltd.
- Tomofumi Nakamura
- C30 - CRYSTAL GROWTH
Information Patent Grant
Isolation method for semiconductor device using selective epitaxial...
- Patent number 5,926,721
- Issue date Jul 20, 1999
- Samsung Electronics, Co., Ltd.
- Sug-hun Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate of the silicon on insulator type for the production of tr...
- Patent number 5,897,939
- Issue date Apr 27, 1999
- Commissariat a l'Energie Atomique
- Simon Deleonibus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor device and semiconductor device
- Patent number 5,854,509
- Issue date Dec 29, 1998
- Mitsubishi Denki Kabushiki Kaisha
- Tatsuya Kunikiyo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing high quality silicon surface for selective epit...
- Patent number 5,780,343
- Issue date Jul 14, 1998
- National Semiconductor Corporation
- Rashid Bashir
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation layer of semiconductor device and method for fabricating...
- Patent number 5,773,351
- Issue date Jun 30, 1998
- Lg Semicon Co., Ltd.
- Jong Moon Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming isolated regions in a semiconductor device
- Patent number 5,668,043
- Issue date Sep 16, 1997
- Hyundai Electronics Industries Co., Ltd.
- Sang Hoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sub-micron diffusion area isolation with Si-SEG for a DRAM array
- Patent number 5,600,161
- Issue date Feb 4, 1997
- Micron Technology, Inc.
- Fernando Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structure having at least one CMOS-NAND gate and...
- Patent number 5,559,353
- Issue date Sep 24, 1996
- Siemens Aktiengesellschaft
- Lothar Risch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Advanced isolation scheme for deep submicron technology
- Patent number 5,554,562
- Issue date Sep 10, 1996
- Advanced Micro Devices, Inc.
- Kuang-Yeh Chang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MICROELECTRONIC DEVICE SUBSTRATE FORMED BY ADDITIVE PROCESS
- Publication number 20220336217
- Publication date Oct 20, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Benjamin Stassen Cook
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20220320315
- Publication date Oct 6, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL SILICON WITHIN HORIZONTAL ACCESS DEVICES IN VERTICAL THRE...
- Publication number 20220254784
- Publication date Aug 11, 2022
- Micron Technology, Inc.
- Si-Woo Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming a Semiconductor Structure Having a Porous Semico...
- Publication number 20210375618
- Publication date Dec 2, 2021
- NEWPORT FAB, LLC DBA JAZZ SEMICONDUCTOR
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure Having Porous Semiconductor Layer for RF De...
- Publication number 20210111019
- Publication date Apr 15, 2021
- Newport Fab, LLC dba Jazz Semiconductor.
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20210043752
- Publication date Feb 11, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20200161468
- Publication date May 21, 2020
- NANYA TECHNOLOGY CORPORATION
- Teng-Yen HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNABLE HARDMASK FOR OVERLAYER METROLOGY CONTRAST
- Publication number 20190371651
- Publication date Dec 5, 2019
- International Business Machines Corporation
- Ekmini A. De Silva
- B82 - NANO-TECHNOLOGY
Information Patent Application
SOI SUBSTRATE
- Publication number 20190259655
- Publication date Aug 22, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNABLE HARDMASK FOR OVERLAYER METROLOGY CONTRAST
- Publication number 20190206722
- Publication date Jul 4, 2019
- International Business Machines Corporation
- Ekmini A. De Silva
- B82 - NANO-TECHNOLOGY
Information Patent Application
PROCESS TO FORM SOI SUBSTRATE
- Publication number 20190157138
- Publication date May 23, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20190148513
- Publication date May 16, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Chuan Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20150099338
- Publication date Apr 9, 2015
- SK HYNIX INC.
- Hyun Seung YOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20130009235
- Publication date Jan 10, 2013
- SK HYNIX INC.
- Hyun Seung YOO
- G11 - INFORMATION STORAGE
Information Patent Application
Method for manufacturing an SOI wafer
- Publication number 20020094665
- Publication date Jul 18, 2002
- STMicroelectronics S.r.I.
- Flavio Villa
- H01 - BASIC ELECTRIC ELEMENTS

using selective deposition of single crystal silicon

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Super junction power device and method of making the same

Method of manufacturing semiconductor device

Epitaxial silicon within horizontal access devices in vertical thre...

Semiconductor device

Microelectronic device substrate formed by additive process

Semiconductor structure having porous semiconductor layer for RF de...

SOI substrate

Tunable hardmask for overlayer metrology contrast

Manufacturing method of semiconductor device

Fin structure and method for manufacturing the same

Tunable hardmask for overlayer metrology contrast

Process to form SOI substrate

Forming zig-zag trench structure to prevent aspect ratio trapping d...

Non-volatile memory device and method of manufacturing the same

Method for manufacturing an SOI wafer

CMOS circuit with all-around dielectrically insulated source-drain...

Process of making semiconductor device having regions of insulating...

Process for manufacturing a CMOS circuit with all-around dielectric...

Method for forming large area or selective area SOI

Advanced isolation scheme for deep submicron technology

Method for forming SOI structure

Isolation method for semiconductor device using selective epitaxial...

Substrate of the silicon on insulator type for the production of tr...

Method of fabricating semiconductor device and semiconductor device

Method of producing high quality silicon surface for selective epit...

Isolation layer of semiconductor device and method for fabricating...

Method for forming isolated regions in a semiconductor device

Sub-micron diffusion area isolation with Si-SEG for a DRAM array

Integrated circuit structure having at least one CMOS-NAND gate and...

Advanced isolation scheme for deep submicron technology

Patents Applicationslast 30 patents

MICROELECTRONIC DEVICE SUBSTRATE FORMED BY ADDITIVE PROCESS

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

EPITAXIAL SILICON WITHIN HORIZONTAL ACCESS DEVICES IN VERTICAL THRE...

Method for Forming a Semiconductor Structure Having a Porous Semico...

Semiconductor Structure Having Porous Semiconductor Layer for RF De...

SEMICONDUCTOR DEVICE

FIN STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

TUNABLE HARDMASK FOR OVERLAYER METROLOGY CONTRAST

SOI SUBSTRATE

TUNABLE HARDMASK FOR OVERLAYER METROLOGY CONTRAST

PROCESS TO FORM SOI SUBSTRATE

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Method for manufacturing an SOI wafer