using single parity bit

Industry

CPC
H03M13/098

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Parent Industries

HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

Current Industry

H03M13/098using single parity bit

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Iterative error correction in memory systems
- Patent number 12,244,324
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multicore, multibank, fully concurrent coherence controller
- Patent number 12,223,165
- Issue date Feb 11, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction method, error correction circuit and electronic de...
- Patent number 12,224,768
- Issue date Feb 11, 2025
- Etron Technology, Inc.
- Ho-Yin Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Virtual network pre-arbitration for deadlock avoidance and enhanced...
- Patent number 12,182,398
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code circuit, memory device including error correc...
- Patent number 12,176,919
- Issue date Dec 24, 2024
- Samsung Electronics Co., Ltd.
- Sung-Rae Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,148,491
- Issue date Nov 19, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-cycle byte correcting and multi-byte detecting error code
- Patent number 12,149,259
- Issue date Nov 19, 2024
- NVIDIA Corporation
- Michael Brendan Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,081,237
- Issue date Sep 3, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive credit-based replenishment threshold used for transaction...
- Patent number 12,079,471
- Issue date Sep 3, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 12,052,035
- Issue date Jul 30, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic frozen bits and error detection for polar codes
- Patent number 12,034,534
- Issue date Jul 9, 2024
- QUALCOMM Incorporated
- Changlong Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward error correction coding using a tree structure
- Patent number 12,034,456
- Issue date Jul 9, 2024
- Ciena Corporation
- Shahab Oveis Gharan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Syndrome calculation for error detection and error correction
- Patent number 12,009,837
- Issue date Jun 11, 2024
- Kioxia Corporation
- Hironori Uchikawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Command address fault detection
- Patent number 12,009,835
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G11 - INFORMATION STORAGE
Information Patent Grant
Deferred error code correction with improved effective data bandwid...
- Patent number 12,001,281
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing-in-memory (PIM) devices
- Patent number 11,996,157
- Issue date May 28, 2024
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward error correction coding using a tree structure
- Patent number 11,984,911
- Issue date May 14, 2024
- Ciena Corporation
- Shahab Oveis Gharan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Communication throughput despite periodic blockages
- Patent number 11,955,990
- Issue date Apr 9, 2024
- Hughes Network Systems, LLC
- Victor Liau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel system to calculate low density parity check
- Patent number 11,949,430
- Issue date Apr 2, 2024
- SK Hynix Inc.
- Fan Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Iterative error correction in memory systems
- Patent number 11,949,428
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for encoding and decoding polar code
- Patent number 11,936,400
- Issue date Mar 19, 2024
- Samsung Electronics Co., Ltd.
- Kwonjong Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Iterative decoder with a dynamic maximum stop condition
- Patent number 11,923,867
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flash memory apparatus and storage management method for flash memory
- Patent number 11,916,569
- Issue date Feb 27, 2024
- Silicon Motion, Inc.
- Tsung-Chieh Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication throughput despite periodic blockages
- Patent number 11,916,573
- Issue date Feb 27, 2024
- Hughes Network Systems, LLC
- Victor Liau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Codeword format for data storage
- Patent number 11,916,570
- Issue date Feb 27, 2024
- Texas Instruments Incorporated
- Dominik Stefan Gerl
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system
- Patent number 11,909,415
- Issue date Feb 20, 2024
- Kioxia Corporation
- Masahiro Kiyooka
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-processor bridge with cache allocate awareness
- Patent number 11,907,528
- Issue date Feb 20, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correlation-based hardware sequence for layered decoding
- Patent number 11,863,201
- Issue date Jan 2, 2024
- QUALCOMM Incorporated
- Nian Guo
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20250060873
- Publication date Feb 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20240413840
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMMAND ADDRESS FAULT DETECTION
- Publication number 20240322841
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Aaron P. BOEHM
- G11 - INFORMATION STORAGE
Information Patent Application
DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...
- Publication number 20240311239
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS
- Publication number 20240184446
- Publication date Jun 6, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY
- Publication number 20240154624
- Publication date May 9, 2024
- SILICON MOTION, INC.
- Tsung-Chieh Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...
- Publication number 20240086065
- Publication date Mar 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL SYSTEM TO CALCULATE LOW DENSITY PARITY CHECK
- Publication number 20240080046
- Publication date Mar 7, 2024
- SK HYNIX INC.
- Fan ZHANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ITERATIVE DECODER WITH A DYNAMIC MAXIMUM STOP CONDITION
- Publication number 20240063819
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMMAND ADDRESS FAULT DETECTION
- Publication number 20240030940
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Aaron P. BOEHM
- G11 - INFORMATION STORAGE
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20230418469
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20230384931
- Publication date Nov 30, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION METHOD, ERROR CORRECTION CIRCUIT AND ELECTRONIC DE...
- Publication number 20230387938
- Publication date Nov 30, 2023
- ETRON TECHNOLOGY, INC.
- Ho-Yin CHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR TRANSMITTING DATA CONCURRENTLY WITH A PULS...
- Publication number 20230378977
- Publication date Nov 23, 2023
- ALLEGRO MICROSYSTEMS, LLC
- Solène Bastien
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VIRTUAL NETWORK PRE-ARBITRATION FOR DEADLOCK AVOIDANCE AND ENHANCED...
- Publication number 20230325078
- Publication date Oct 12, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORRELATION-BASED HARDWARE SEQUENCE FOR LAYERED DECODING
- Publication number 20230318624
- Publication date Oct 5, 2023
- QUALCOMM Incorporated
- Nian Guo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMMUNICATION THROUGHPUT DESPITE PERIODIC BLOCKAGES
- Publication number 20230283300
- Publication date Sep 7, 2023
- Hughes Network Systems, LLC
- Victor Liau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20230231573
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR GENERATING BURST ERROR CORRECTION CODE, DEVICE FOR GENER...
- Publication number 20230216525
- Publication date Jul 6, 2023
- Research & Business Foundation Sungkyunkwan University
- Sang-Hyo KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION CODE CIRCUIT, MEMORY DEVICE INCLUDING ERROR CORREC...
- Publication number 20230163786
- Publication date May 25, 2023
- Samsung Electronics Co., Ltd.
- Sung-Rae KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR DECODING ENCODED MESSAGES IN A WIRELESS COMM...
- Publication number 20230140205
- Publication date May 4, 2023
- AT&T INTELLECTUAL PROPERTY I, L.P.
- Sairamesh Nammi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY SYSTEM
- Publication number 20230096401
- Publication date Mar 30, 2023
- KIOXIA Corporation
- Masahiro KIYOOKA
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE-CYCLE BYTE CORRECTING AND MULTI-BYTE DETECTING ERROR CODE
- Publication number 20230089736
- Publication date Mar 23, 2023
- NVIDIA Corporation
- Michael Brendan Sullivan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNDROME CALCULATION FOR ERROR DETECTION AND ERROR CORRECTION
- Publication number 20230089702
- Publication date Mar 23, 2023
- KIOXIA Corporation
- Hironori UCHIKAWA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Forward Error Correction Coding Using a Tree Structure
- Publication number 20230017120
- Publication date Jan 19, 2023
- CIENA CORPORATION
- Shahab OVEIS GHARAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE METADATA
- Publication number 20230009642
- Publication date Jan 12, 2023
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ENCODING AND DECODING POLAR CODE
- Publication number 20220393791
- Publication date Dec 8, 2022
- Samsung Electronics Co., Ltd.
- Kwonjong LEE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multi-Rate ECC Parity For Fast SLC Read
- Publication number 20220385303
- Publication date Dec 1, 2022
- Western Digital Technologies, Inc.
- Dudy David AVRAHAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE AND CONTROL METHOD FOR STORAGE DEVICE
- Publication number 20220385304
- Publication date Dec 1, 2022
- Fujitsu Limited
- Atsushi Miki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CREDIT AWARE CENTRAL ARBITRATION FOR MULTI-ENDPOINT, MULTI-CORE SYSTEM
- Publication number 20220374356
- Publication date Nov 24, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING

using single parity bit

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Iterative error correction in memory systems

Multicore, multibank, fully concurrent coherence controller

Error correction method, error correction circuit and electronic de...

Virtual network pre-arbitration for deadlock avoidance and enhanced...

Error correction code circuit, memory device including error correc...

Multicore shared cache operation engine

Processing-in-memory (PIM) devices

Single-cycle byte correcting and multi-byte detecting error code

Configurable cache for coherent system

Processing-in-memory (PIM) devices

Adaptive credit-based replenishment threshold used for transaction...

Processing-in-memory (PIM) devices

Dynamic frozen bits and error detection for polar codes

Forward error correction coding using a tree structure

Syndrome calculation for error detection and error correction

Command address fault detection

Deferred error code correction with improved effective data bandwid...

Processing-in-memory (PIM) devices

Forward error correction coding using a tree structure

Communication throughput despite periodic blockages

Parallel system to calculate low density parity check

Iterative error correction in memory systems

Method and apparatus for encoding and decoding polar code

Iterative decoder with a dynamic maximum stop condition

Flash memory apparatus and storage management method for flash memory

Communication throughput despite periodic blockages

Codeword format for data storage

Memory system

Multi-processor bridge with cache allocate awareness

Correlation-based hardware sequence for layered decoding

Patents Applicationslast 30 patents

CONFIGURABLE CACHE FOR COHERENT SYSTEM

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

COMMAND ADDRESS FAULT DETECTION

DEFERRED ERROR CODE CORRECTION WITH IMPROVED EFFECTIVE DATA BANDWID...

MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS

FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY

DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...

PARALLEL SYSTEM TO CALCULATE LOW DENSITY PARITY CHECK

ITERATIVE DECODER WITH A DYNAMIC MAXIMUM STOP CONDITION

COMMAND ADDRESS FAULT DETECTION

MULTICORE SHARED CACHE OPERATION ENGINE

CONFIGURABLE CACHE FOR COHERENT SYSTEM

ERROR CORRECTION METHOD, ERROR CORRECTION CIRCUIT AND ELECTRONIC DE...

METHOD AND APPARATUS FOR TRANSMITTING DATA CONCURRENTLY WITH A PULS...

VIRTUAL NETWORK PRE-ARBITRATION FOR DEADLOCK AVOIDANCE AND ENHANCED...

CORRELATION-BASED HARDWARE SEQUENCE FOR LAYERED DECODING

COMMUNICATION THROUGHPUT DESPITE PERIODIC BLOCKAGES

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

METHOD FOR GENERATING BURST ERROR CORRECTION CODE, DEVICE FOR GENER...

ERROR CORRECTION CODE CIRCUIT, MEMORY DEVICE INCLUDING ERROR CORREC...

SYSTEM AND METHOD FOR DECODING ENCODED MESSAGES IN A WIRELESS COMM...

MEMORY SYSTEM

SINGLE-CYCLE BYTE CORRECTING AND MULTI-BYTE DETECTING ERROR CODE

SYNDROME CALCULATION FOR ERROR DETECTION AND ERROR CORRECTION

Forward Error Correction Coding Using a Tree Structure

PROGRAMMABLE METADATA

METHOD AND APPARATUS FOR ENCODING AND DECODING POLAR CODE

Multi-Rate ECC Parity For Fast SLC Read

STORAGE DEVICE AND CONTROL METHOD FOR STORAGE DEVICE

CREDIT AWARE CENTRAL ARBITRATION FOR MULTI-ENDPOINT, MULTI-CORE SYSTEM