Utilizing process equivalents or options

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CPC
Y10S438/98

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S438/00Semiconductor device manufacturing: process

Current Industry

Y10S438/98Utilizing process equivalents or options

Industries

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,929,190
- Issue date Mar 27, 2018
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,508,620
- Issue date Nov 29, 2016
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,395,584
- Issue date Jul 19, 2016
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,224,667
- Issue date Dec 29, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming a CMOS structure having gate insulation films of...
- Patent number 9,111,909
- Issue date Aug 18, 2015
- Tessera Advanced Technologies, Inc.
- Nozomu Matsuzaki
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,069,215
- Issue date Jun 30, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...
- Patent number 9,053,966
- Issue date Jun 9, 2015
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method of fabricating the same
- Patent number 9,052,551
- Issue date Jun 9, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Grant
Method for manufacturing semiconductor device
- Patent number 9,034,709
- Issue date May 19, 2015
- Asahi Kasei Microdevices Corporation
- Shogo Katsuki
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Array substrate and manufacturing method thereof, display device
- Patent number 9,024,288
- Issue date May 5, 2015
- BOE Technology Group Co., Ltd.
- Tuo Sun
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Asymmetrical bidirectional protection component
- Patent number 8,975,661
- Issue date Mar 10, 2015
- STMicroelectronics (Tours) SAS
- Benjamin Morillon
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
8969847
- Patent number 8,969,847
- Issue date Mar 3, 2015
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Quantum dot-polymer nanocomposite for optical sensing
- Patent number 8,969,470
- Issue date Mar 3, 2015
- The Mitre Corporation
- Sichu Li
- B82 - NANO-TECHNOLOGY
Information Patent Grant
8933498
- Patent number 8,933,498
- Issue date Jan 13, 2015
- G02 - OPTICS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,872,220
- Issue date Oct 28, 2014
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-aligned multi-dielectric-layer lift off process for laser diod...
- Patent number 8,728,842
- Issue date May 20, 2014
- Soraa Laser Diode, Inc.
- James W. Raring
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of forming a CMOS structure having gate insulation films of...
- Patent number 8,674,419
- Issue date Mar 18, 2014
- Renesas Electronics Corporation
- Nozomu Matsuzaki
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Semiconductor device and method for manufacturing the same
- Patent number 8,546,210
- Issue date Oct 1, 2013
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiaki Yamamoto
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 8,415,679
- Issue date Apr 9, 2013
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,410,519
- Issue date Apr 2, 2013
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of producing image display unit
- Patent number 8,409,886
- Issue date Apr 2, 2013
- Sony Corporation
- Toshiaki Iwafuchi
- G02 - OPTICS
Information Patent Grant
Method of fabricating semiconductor device comprises a photoresist...
- Patent number 8,232,199
- Issue date Jul 31, 2012
- Samsung Electronics Co., Ltd.
- Won Song
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming a high capacitance diode
- Patent number 8,222,115
- Issue date Jul 17, 2012
- Semiconductor Components Industries, LLC
- David D. Marreiro
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for manufacturing semiconductor device having a dual gate in...
- Patent number 8,187,942
- Issue date May 29, 2012
- Hynix Semiconductor Inc.
- Young Bang Lee
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 8,173,520
- Issue date May 8, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Self-aligned multi-dielectric-layer lift off process for laser diod...
- Patent number 8,143,148
- Issue date Mar 27, 2012
- Soraa, Inc.
- James W. Raring
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of forming a high capacitance diode and structure therefor
- Patent number 8,143,701
- Issue date Mar 27, 2012
- Semiconductor Components Industries, LLC
- David D. Marreiro
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for forming integrated circuits with aligned (100) NMOS and...
- Patent number 8,138,035
- Issue date Mar 20, 2012
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method for manufacturing the same
- Patent number 8,133,770
- Issue date Mar 13, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Yasuhiko Takemura
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Two terminal multi-channel ESD device and method therefor
- Patent number 8,110,448
- Issue date Feb 7, 2012
- Semiconductor Components Industries, LLC
- Ali Salih
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING A CMOS STRUCTURE HAVING GATE INSULATION FILMS OF...
- Publication number 20140252495
- Publication date Sep 11, 2014
- RENESAS ELECTRONICS CORPORATION
- Nozomu MATSUZAKI
- B82 - NANO-TECHNOLOGY
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20140139762
- Publication date May 22, 2014
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE
- Publication number 20140091280
- Publication date Apr 3, 2014
- BOE TECHNOLOGY GROUP CO., LTD.
- Tuo Sun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20140035057
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20130214434
- Publication date Aug 22, 2013
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20120211874
- Publication date Aug 23, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20120175710
- Publication date Jul 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
Self-Aligned Multi-Dielectric-Layer Lift Off Process for Laser Diod...
- Publication number 20120178198
- Publication date Jul 12, 2012
- SORAA, INC.
- James W. Raring
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD OF FORMING A HIGH CAPACITANCE DIODE
- Publication number 20120142171
- Publication date Jun 7, 2012
- David D. Marreiro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20120120336
- Publication date May 17, 2012
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
ASYMMETRICAL BIDIRECTIONAL PROTECTION COMPONENT
- Publication number 20120061803
- Publication date Mar 15, 2012
- STMicroelectronics (Tours) SAS
- Benjamin Morillon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND FABRICATION SYSTEM O...
- Publication number 20120003761
- Publication date Jan 5, 2012
- Won Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20110312111
- Publication date Dec 22, 2011
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20110159771
- Publication date Jun 30, 2011
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...
- Publication number 20110151651
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20110111541
- Publication date May 12, 2011
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Yasuhiko TAKEMURA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NONVOLATILE MEMORY DEVICE AND FABRICATION METHOD
- Publication number 20110059585
- Publication date Mar 10, 2011
- Samsung Electronics Co., Ltd.
- Woon-Kyung LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A CMOS STRUCTURE HAVING GATE INSULATION FILMS OF...
- Publication number 20110012180
- Publication date Jan 20, 2011
- Renesas Technology Corp.
- Nozomu Matsuzaki
- B82 - NANO-TECHNOLOGY
Information Patent Application
TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
- Publication number 20100311211
- Publication date Dec 9, 2010
- Ali Salih
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING A DUAL GATE IN...
- Publication number 20100261325
- Publication date Oct 14, 2010
- Hynix Semiconductor Inc.
- Young Bang LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Single-Level Electrically Erasable and Programma...
- Publication number 20100240181
- Publication date Sep 23, 2010
- UNITED MICROELECTRONICS CORP
- Rong-Ching CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20100237354
- Publication date Sep 23, 2010
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Yoshiaki YAMAMOTO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
- Publication number 20100090306
- Publication date Apr 15, 2010
- Ali Salih
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A HIGH CAPACITANCE DIODE AND STRUCTURE THEREFOR
- Publication number 20100072573
- Publication date Mar 25, 2010
- David D. Marreiro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20090322698
- Publication date Dec 31, 2009
- Semiconductor Energy Laboratory Co., Ltd.
- Yoshiharu Hirakata
- G02 - OPTICS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20090275196
- Publication date Nov 5, 2009
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTIFUSE ELEMENTS
- Publication number 20090224325
- Publication date Sep 10, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Won Gi Min
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Integrated Circuit Device and Method of Manufacturing...
- Publication number 20090209078
- Publication date Aug 20, 2009
- RENESAS TECHNOLOGY CORP.
- Hideki YASUOKA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SUCH A SEMICONDU...
- Publication number 20090166799
- Publication date Jul 2, 2009
- Koninklijke Philips Electronics N.V.
- Josine Johanna Gerarda Petra Loo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR
- Publication number 20090162988
- Publication date Jun 25, 2009
- Thomas Keena
- H01 - BASIC ELECTRIC ELEMENTS

Utilizing process equivalents or options

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and method of fabricating the same

Semiconductor device and manufacturing method thereof

Method of forming a CMOS structure having gate insulation films of...

Semiconductor device and method of fabricating the same

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...

Semiconductor device and method of fabricating the same

Method for manufacturing semiconductor device

Array substrate and manufacturing method thereof, display device

Asymmetrical bidirectional protection component

8969847

Quantum dot-polymer nanocomposite for optical sensing

8933498

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Self-aligned multi-dielectric-layer lift off process for laser diod...

Method of forming a CMOS structure having gate insulation films of...

Semiconductor device and method for manufacturing the same

Semiconductor device and manufacturing method thereof

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Method of producing image display unit

Method of fabricating semiconductor device comprises a photoresist...

Method of forming a high capacitance diode

Method for manufacturing semiconductor device having a dual gate in...

Semiconductor device and manufacturing method thereof

Self-aligned multi-dielectric-layer lift off process for laser diod...

Method of forming a high capacitance diode and structure therefor

Method for forming integrated circuits with aligned (100) NMOS and...

Semiconductor device and method for manufacturing the same

Two terminal multi-channel ESD device and method therefor

Patents Applicationslast 30 patents

METHOD OF FORMING A CMOS STRUCTURE HAVING GATE INSULATION FILMS OF...

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

Self-Aligned Multi-Dielectric-Layer Lift Off Process for Laser Diod...

METHOD OF FORMING A HIGH CAPACITANCE DIODE

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

ASYMMETRICAL BIDIRECTIONAL PROTECTION COMPONENT

METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND FABRICATION SYSTEM O...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

NONVOLATILE MEMORY DEVICE AND FABRICATION METHOD

METHOD OF FORMING A CMOS STRUCTURE HAVING GATE INSULATION FILMS OF...

TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING A DUAL GATE IN...

Method for Forming Single-Level Electrically Erasable and Programma...

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

TWO TERMINAL MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR

METHOD OF FORMING A HIGH CAPACITANCE DIODE AND STRUCTURE THEREFOR

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

ANTIFUSE ELEMENTS

Semiconductor Integrated Circuit Device and Method of Manufacturing...

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SUCH A SEMICONDU...

METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR