wherein the sub-matrices have column and row weights greater than one

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CPC
H03M13/1168

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HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

Current Industry

H03M13/1168wherein the sub-matrices have column and row weights greater than one

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Patents Grantslast 30 patents

Information Patent Grant
Data processing device and data processing method
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Shift values for quasi-cyclic LDPC codes
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- Telefonaktiebolaget LM Ericsson (publ)
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Information Patent Grant
Rate matching methods for LDPC codes
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Information Patent Grant
Shift values for quasi-cyclic LDPC codes
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- Issue date Nov 29, 2022
- Telefonaktiebolaget LM Ericsson (publ)
- Sara Sandberg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hard decoding methods in data storage devices
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- Issue date Nov 29, 2022
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Error correction circuit of semiconductor memory device and semicon...
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Method and device for energy-efficient decoders
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Parameter estimation with machine learning for flash channel
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Parallel bit interleaver
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Erasure code calculation method
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Information Patent Grant
Device and method for generating a multi-kernel polar code
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Information Patent Grant
Storage controller for correcting error, storage device including t...
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error-correction encoding method and device, and decoding method an...
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- Norifumi Kamiya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for quasi-cyclic low-density parity-check
- Patent number 11,159,178
- Issue date Oct 26, 2021
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- Liguang Li
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
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PARALLEL BIT INTERLEAVER
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DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
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QUASI-CYCLIC LDPC CODING AND DECODING METHOD AND APPARATUS, AND LDP...
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- H04 - ELECTRIC COMMUNICATION TECHNIQUE
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DECODING DEVICE AND OPERATING METHOD THEREOF
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METHOD AND DEVICE FOR ENERGY-EFFICIENT DECODERS
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CYCLIC REDUNDANCY CHECK, CRC,DECODING USING THE INVERSE CRC GENERAT...
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- Huawei Technologies Co., Ltd
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ERASURE CODE CALCULATION METHOD
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- BEIJING iChinaE SCIENCE & TECHNOLOGY CO., LTD.
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RATE MATCHING METHODS FOR LDPC CODES
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- Telefonaktiebolaget LM Ericsson (publ)
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- H03 - BASIC ELECTRONIC CIRCUITRY
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STORAGE CONTROLLER FOR CORRECTING ERROR, STORAGE DEVICE INCLUDING T...
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- Samsung Electronics Co., Ltd.
- Heeyoul Kwak
- G06 - COMPUTING CALCULATING COUNTING

wherein the sub-matrices have column and row weights greater than one

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Data processing device and data processing method

Parallel bit interleaver

Communication techniques involving pairwise orthogonality of adjace...

Memory device and operating method thereof

Rate matching methods for LDPC codes

Decoding device and operating method thereof

Correlation-based hardware sequence for layered decoding

Decoder circuit including decoders with respective performance and...

Shift values for quasi-cyclic LDPC codes

Information processing method and device and computer storage medium

Method and apparatus for performing encoding on basis of parity che...

Data processing device and data processing method

Method and system for providing minimal aliasing error correction code

Cyclic redundancy check, CRC, decoding using the inverse CRC genera...

Parallel bit interleaver

Quasi-cyclic LDPC coding and decoding method and apparatus, and LDP...

Method and apparatus for quasi-cyclic low-density parity-check

Rate matching methods for LDPC codes

Shift values for quasi-cyclic LDPC codes

Hard decoding methods in data storage devices

Error correction circuit of semiconductor memory device and semicon...

Method and device for energy-efficient decoders

Parameter estimation with machine learning for flash channel

Parallel bit interleaver

Data processing device and data processing method

Erasure code calculation method

Device and method for generating a multi-kernel polar code

Storage controller for correcting error, storage device including t...

Error-correction encoding method and device, and decoding method an...

Method and apparatus for quasi-cyclic low-density parity-check

Patents Applicationslast 30 patents

ERROR CORRECTING CODE ENCODING CIRCUIT AND SEMICONDUCTOR DEVICE INC...

Shift Values for Quasi-Cyclic LDPC Codes

RATE MATCHING METHODS FOR LDPC CODES

PARALLEL BIT INTERLEAVER

Encoding and Decoding Methods and Devices, and System

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

QUASI-CYCLIC LDPC CODING AND DECODING METHOD AND APPARATUS, AND LDP...

CORRELATION-BASED HARDWARE SEQUENCE FOR LAYERED DECODING

RATE MATCHING METHODS FOR LDPC CODES

HARD DECODING METHODS IN DATA STORAGE DEVICES

Shift Values for Quasi-Cyclic LDPC Codes

DECODING DEVICE AND OPERATING METHOD THEREOF

MEMORY DEVICE AND OPERATING METHOD THEREOF

METHOD AND DEVICE FOR ENERGY-EFFICIENT DECODERS

CYCLIC REDUNDANCY CHECK, CRC,DECODING USING THE INVERSE CRC GENERAT...

DECODING METHOD, DECODING DEVICE, CONTROL CIRCUIT, AND PROGRAM STOR...

Information Processing Method and Device and Computer Storage Medium

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

METHOD AND APPARATUS FOR PERFORMING ENCODING ON BASIS OF PARITY CHE...

PARALLEL BIT INTERLEAVER

PARAMETER ESTIMATION WITH MACHINE LEARNING FOR FLASH CHANNEL

DATA PROCESSING METHOD AND DECODER

HARD DECODING METHODS IN DATA STORAGE DEVICES

METHOD AND SYSTEM FOR PROVIDING MINIMAL ALIASING ERROR CORRECTION CODE

QUASI-CYCLIC LDPC CODING AND DECODING METHOD AND APPARATUS, AND LDP...

DESIGN METHOD AND APPARATUS FOR QUASI-CYCLIC LOW-DENSITY PARITY-CHECK

PARALLEL BIT INTERLEAVER

ERASURE CODE CALCULATION METHOD

RATE MATCHING METHODS FOR LDPC CODES

STORAGE CONTROLLER FOR CORRECTING ERROR, STORAGE DEVICE INCLUDING T...