Wire and HDI connectors

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CPC
H01L2224/73277

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/73277Wire and HDI connectors

Industries

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor package and method of manufacturing the semiconductor...
- Patent number 11,901,348
- Issue date Feb 13, 2024
- Samsung Electronics Co., Ltd.
- Tae-Ho Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure for semiconductor device and manufacturing method...
- Patent number 11,222,880
- Issue date Jan 11, 2022
- PHOENIX PIONEER TECHNOLOGY CO., LTD.
- Che-Wei Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip packaging structure, chip module and electronic terminal
- Patent number 10,854,526
- Issue date Dec 1, 2020
- Shenzhen Goodix Technology Co., Ltd.
- Shengbin Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package assemblies including a chip recess
- Patent number 10,714,455
- Issue date Jul 14, 2020
- Intel IP Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package assemblies including a chip recess
- Patent number 10,186,499
- Issue date Jan 22, 2019
- Intel IP Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 10,115,704
- Issue date Oct 30, 2018
- TOSHIBA MEMORY CORPORATION
- Jun Sagiya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrode connection structure and electrode connection method
- Patent number 9,601,448
- Issue date Mar 21, 2017
- Waseda University
- Kohei Tatsumi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress buffer layer for integrated microelectromechanical systems (...
- Patent number 9,550,670
- Issue date Jan 24, 2017
- Intel IP Corporation
- Christian Geissler
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Manufacturing method of wafer level package
- Patent number 8,980,695
- Issue date Mar 17, 2015
- ChipMOS Technologies Inc.
- Tsung Jen Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package structure and manufacturing method thereof
- Patent number 8,866,268
- Issue date Oct 21, 2014
- Unistars Corporation
- Shang-Yi Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level package structure
- Patent number 8,836,144
- Issue date Sep 16, 2014
- ChipMOS Technologies Inc.
- Tsung Jen Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically enhanced wirebond package
- Patent number 8,203,219
- Issue date Jun 19, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chris Wyland
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR...
- Publication number 20200118993
- Publication date Apr 16, 2020
- Samsung Electronics Co., Ltd.
- Tae-Ho KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE FOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD...
- Publication number 20200075565
- Publication date Mar 5, 2020
- PHOENIX & CORPORATION
- Che-Wei Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS
- Publication number 20190109120
- Publication date Apr 11, 2019
- Intel IP Corporation
- Georg Seidemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR...
- Publication number 20180122789
- Publication date May 3, 2018
- Samsung Electronics Co., Ltd.
- Tae-Ho KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF WAFER LEVEL PACKAGE
- Publication number 20140315355
- Publication date Oct 23, 2014
- TSUNG JEN LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL PACKAGE STRUCTURE AND MANUFACTURING METHOD OF THE SAME
- Publication number 20140061899
- Publication date Mar 6, 2014
- CHIPMOS TECHNOLOGIES INC.
- TSUNG JEN LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20120228745
- Publication date Sep 13, 2012
- Shang-Yi WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Dual-Active Sided Semico...
- Publication number 20110045634
- Publication date Feb 24, 2011
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY ENHANCED WIREBOND PACKAGE
- Publication number 20090102067
- Publication date Apr 23, 2009
- NXP B.V.
- Chris Wyland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrical ground method for ball stack package
- Publication number 20070152310
- Publication date Jul 5, 2007
- Tessera, Inc.
- Philip R. Osborn
- H01 - BASIC ELECTRIC ELEMENTS

Wire and HDI connectors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor package and method of manufacturing the semiconductor...

Package structure for semiconductor device and manufacturing method...

Chip packaging structure, chip module and electronic terminal

Integrated circuit package assemblies including a chip recess

Integrated circuit package assemblies including a chip recess

Semiconductor device

Electrode connection structure and electrode connection method

Stress buffer layer for integrated microelectromechanical systems (...

Manufacturing method of wafer level package

Semiconductor package structure and manufacturing method thereof

Wafer level package structure

Electrically enhanced wirebond package

Patents Applicationslast 30 patents

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR...

PACKAGE STRUCTURE FOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD...

INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR...

MANUFACTURING METHOD OF WAFER LEVEL PACKAGE

WAFER LEVEL PACKAGE STRUCTURE AND MANUFACTURING METHOD OF THE SAME

SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

Semiconductor Device and Method of Forming Dual-Active Sided Semico...

ELECTRICALLY ENHANCED WIREBOND PACKAGE

Electrical ground method for ball stack package