with special data handling

Industry

CPC
G06F12/126

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/126with special data handling

Industries

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for enhancing flash channel utilization
- Patent number 12,197,320
- Issue date Jan 14, 2025
- Microchip Technology Incorporated
- Nima Nikuie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing content-aware cache replacement and insertion policies in...
- Patent number 12,182,036
- Issue date Dec 31, 2024
- QUALCOMM Incorporated
- George Patsilaras
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache control to preserve register data
- Patent number 12,182,037
- Issue date Dec 31, 2024
- Apple Inc.
- Jonathan M. Redshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for transferring data within hierarchical cac...
- Patent number 12,174,753
- Issue date Dec 24, 2024
- ARM Limited
- Joseph Michael Pusdesris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware architecture of packet cache eviction engine
- Patent number 12,164,439
- Issue date Dec 10, 2024
- Google LLC
- Chandan Muddamsetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory distributed cache
- Patent number 12,164,432
- Issue date Dec 10, 2024
- Google LLC
- Asa Briggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor-based system for allocating cache lines to a higher-level...
- Patent number 12,093,184
- Issue date Sep 17, 2024
- QUALCOMM Incorporated
- Ramkumar Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data accessing method and data accessing system capable of providin...
- Patent number 12,007,900
- Issue date Jun 11, 2024
- Realtek Semiconductor Corp.
- Chih-Hao Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,007,907
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write control for read-modify-write operations in cache memory
- Patent number 12,001,282
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache that supports draining write-miss entries
- Patent number 12,001,345
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for repairing defective memory cells based...
- Patent number 11,984,186
- Issue date May 14, 2024
- Micron Technology, Inc.
- David Hulton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-throughput regular expression processing with path priorities...
- Patent number 11,983,122
- Issue date May 14, 2024
- Xilinx, Inc.
- David K. Liddell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tile-based graphics
- Patent number 11,954,759
- Issue date Apr 9, 2024
- Imagination Technologies Limited
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parking threads in barrel processor for managing cache eviction req...
- Patent number 11,940,928
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Christopher Baronne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce read-modify-write cycles for non-al...
- Patent number 11,940,929
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 11,940,930
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Usage level identification for memory device addresses
- Patent number 11,921,627
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Luca Porzio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating retention of previously-critical cache lines
- Patent number 11,921,640
- Issue date Mar 5, 2024
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 11,886,353
- Issue date Jan 30, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calendar based flash command scheduler for dynamic quality of servi...
- Patent number 11,880,299
- Issue date Jan 23, 2024
- International Business Machines Corporation
- Kevin E. Sallese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data as compute
- Patent number 11,880,312
- Issue date Jan 23, 2024
- Advanced Micro Devices, Inc.
- Kishore Punniyamurthy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERMEDIATE CACHE MANAGEMENT FOR NON-UNIFORM MEMORY ARCHITECTURE
- Publication number 20240411706
- Publication date Dec 12, 2024
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE REPLACEMENT POLICY STATE STRUCTURE WITH EXTRA STATES FOR PREF...
- Publication number 20240411705
- Publication date Dec 12, 2024
- SiFive, Inc.
- Bradley Gene Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Architecture of Packet Cache Eviction Engine
- Publication number 20240403228
- Publication date Dec 5, 2024
- Google LLC
- Chandan Muddamsetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Storage Device and Method for Dynamic Logical Page Write Ordering
- Publication number 20240394182
- Publication date Nov 28, 2024
- Western Digital Technologies, Inc.
- Noor Mohamed AA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Range Based Memory Hints for Prefetcher, Cache and Memory C...
- Publication number 20240385966
- Publication date Nov 21, 2024
- Google LLC
- Xinliang David Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE, MEMORY SYSTEM INCLUDING MEMORY MODULE, AND METHOD OF...
- Publication number 20240385969
- Publication date Nov 21, 2024
- SK HYNIX INC.
- Sung Woo HYUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-BASED SYSTEM-LEVEL CACHE MANAGEMENT METHOD AND ASSOCIATED EL...
- Publication number 20240370379
- Publication date Nov 7, 2024
- MEDIATEK INC.
- Chun-Ming Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT USING EVICTION PRIORITY BASED ON MEMORY REUSE
- Publication number 20240303203
- Publication date Sep 12, 2024
- NVIDIA Corporation
- Noam Dor Korem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE CONTROL FOR READ-MODIFY-WRITE OPERATIONS IN CACHE MEMORY
- Publication number 20240281329
- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USAGE LEVEL IDENTIFICATION FOR MEMORY DEVICE ADDRESSES
- Publication number 20240281371
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Luca Porzio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CONTENT-AWARE CACHE REPLACEMENT AND INSERTION POLICIES IN...
- Publication number 20240264950
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- George Patsilaras
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR-BASED SYSTEM FOR ALLOCATING CACHE LINES TO A HIGHER-LEVEL...
- Publication number 20240248851
- Publication date Jul 25, 2024
- QUALCOMM Incorporated
- Ramkumar Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TILE-BASED GRAPHICS
- Publication number 20240249377
- Publication date Jul 25, 2024
- Imagination Technologies Limited
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, SYSTEM INCLUDING THE SAME, AND OPERATING METHOD OF M...
- Publication number 20240248850
- Publication date Jul 25, 2024
- Samsung Electronics Co., Ltd.
- DAEHYUN KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARKING THREADS IN BARREL PROCESSOR FOR MANAGING CACHE EVICTION REQ...
- Publication number 20240241836
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Christopher Baronne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...
- Publication number 20240232100
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECTOR CACHE FOR COMPRESSION
- Publication number 20240232094
- Publication date Jul 11, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR-BASED SYSTEM FOR ALLOCATING CACHE LINES TO A HIGHER-LEVEL...
- Publication number 20240202131
- Publication date Jun 20, 2024
- QUALCOMM Incorporated
- Ramkumar Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE
- Publication number 20240193098
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC MEMORY UPDATE UNIT AND METHODS
- Publication number 20240185501
- Publication date Jun 6, 2024
- Imagination Technologies Limited
- Steven J. Clohset
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Criticality-Informed Caching Policies with Multiple Criticality Levels
- Publication number 20240168887
- Publication date May 23, 2024
- Apple Inc.
- Tyler J. Huberty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS
- Publication number 20240078190
- Publication date Mar 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

with special data handling

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus to reduce bank pressure using aggressive writ...

System and method for enhancing flash channel utilization

Fully pipelined read-modify-write support

Providing content-aware cache replacement and insertion policies in...

Cache control to preserve register data

Methods and apparatus for allocation in a victim cache system

Methods and apparatus for transferring data within hierarchical cac...

Hardware architecture of packet cache eviction engine

In-memory distributed cache

Methods and apparatus for read-modify-write support in multi-banked...

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Methods and apparatus for eviction in dual datapath victim cache sy...

Processor-based system for allocating cache lines to a higher-level...

Methods and apparatus to facilitate read-modify-write support in a...

Data accessing method and data accessing system capable of providin...

Victim cache with write miss merging

Write control for read-modify-write operations in cache memory

Victim cache that supports draining write-miss entries

Apparatuses and methods for repairing defective memory cells based...

High-throughput regular expression processing with path priorities...

Tile-based graphics

Parking threads in barrel processor for managing cache eviction req...

Methods and apparatus to reduce read-modify-write cycles for non-al...

Methods and apparatus to facilitate atomic operations in victim cache

Usage level identification for memory device addresses

Mitigating retention of previously-critical cache lines

Hybrid victim cache and write miss buffer with fence operation

Calendar based flash command scheduler for dynamic quality of servi...

Data as compute

Patents Applicationslast 30 patents

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

INTERMEDIATE CACHE MANAGEMENT FOR NON-UNIFORM MEMORY ARCHITECTURE

CACHE REPLACEMENT POLICY STATE STRUCTURE WITH EXTRA STATES FOR PREF...

Hardware Architecture of Packet Cache Eviction Engine

Data Storage Device and Method for Dynamic Logical Page Write Ordering

Address Range Based Memory Hints for Prefetcher, Cache and Memory C...

MEMORY MODULE, MEMORY SYSTEM INCLUDING MEMORY MODULE, AND METHOD OF...

MEMORY-BASED SYSTEM-LEVEL CACHE MANAGEMENT METHOD AND ASSOCIATED EL...

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

CACHE MANAGEMENT USING EVICTION PRIORITY BASED ON MEMORY REUSE

VICTIM CACHE WITH WRITE MISS MERGING

WRITE CONTROL FOR READ-MODIFY-WRITE OPERATIONS IN CACHE MEMORY

USAGE LEVEL IDENTIFICATION FOR MEMORY DEVICE ADDRESSES

PROVIDING CONTENT-AWARE CACHE REPLACEMENT AND INSERTION POLICIES IN...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

PROCESSOR-BASED SYSTEM FOR ALLOCATING CACHE LINES TO A HIGHER-LEVEL...

TILE-BASED GRAPHICS

MEMORY DEVICE, SYSTEM INCLUDING THE SAME, AND OPERATING METHOD OF M...

PARKING THREADS IN BARREL PROCESSOR FOR MANAGING CACHE EVICTION REQ...

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...

SECTOR CACHE FOR COMPRESSION

PROCESSOR-BASED SYSTEM FOR ALLOCATING CACHE LINES TO A HIGHER-LEVEL...

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

ATOMIC MEMORY UPDATE UNIT AND METHODS

Criticality-Informed Caching Policies with Multiple Criticality Levels

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS