with synchronous operation

Industry

CPC
H03K3/356078

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K3/00Circuits for generating electric pulses Monostable, bistable or multistable circuits

Current Industry

H03K3/356078with synchronous operation

Industries

Patents Grantslast 30 patents

Information Patent Grant
Circuit structure and related method for radiation resistant memory...
- Patent number 11,862,240
- Issue date Jan 2, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Vivek Raj
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient retention flop utilizing different voltage domain
- Patent number 11,418,174
- Issue date Aug 16, 2022
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient retention flop utilizing different voltage domain
- Patent number 11,005,459
- Issue date May 11, 2021
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for improving clock rates in high speed electronic circuits...
- Patent number 10,044,345
- Issue date Aug 7, 2018
- Indian Institute of Technology, Bombay
- Sakare Mahendra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable flip-flop circuit
- Patent number 9,166,595
- Issue date Oct 20, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Gaurav Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bistable CML circuit
- Patent number 8,378,727
- Issue date Feb 19, 2013
- STMicroelectronics S.A.
- Pratap Narayan Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Minimizing timing skew among chip level outputs for registered outp...
- Patent number 7,292,064
- Issue date Nov 6, 2007
- Integrated Device Technology, Inc.
- Tak Kwong (Dino) Wong
- G01 - MEASURING TESTING
Information Patent Grant
CMOS binary up/down counter
- Patent number 4,856,035
- Issue date Aug 8, 1989
- Raytheon Company
- Edward T. Lewis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital integrated circuit
- Patent number 4,733,405
- Issue date Mar 22, 1988
- Sony Corporation
- Kazutoshi Shimizume
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential-logic basic element in CMOS technology operating by a si...
- Patent number 4,733,111
- Issue date Mar 22, 1988
- CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
- Mario Fassino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed state machine
- Patent number 4,663,545
- Issue date May 5, 1987
- Motorola, Inc.
- Joseph Pumo
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamically selectable polarity latch
- Patent number 4,638,183
- Issue date Jan 20, 1987
- International Business Machines Corporation
- Dale A. Rickard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device for detecting the presence or absence of a charge quantity a...
- Patent number 4,513,211
- Issue date Apr 23, 1985
- Thomson-CSF
- Jean L. Coutures
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed latch circuit
- Patent number 4,442,365
- Issue date Apr 10, 1984
- Nippon Electric Co., Ltd.
- Akira Nagami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic ratioless circuitry for random logic applications
- Patent number 4,316,106
- Issue date Feb 16, 1982
- Mostek Corporation
- Ian A. Young
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bus driver/latch with second stage stack input
- Patent number 4,216,389
- Issue date Aug 5, 1980
- Motorola, Inc.
- Ernest A. Carter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop comprising two field effect transistors controllably conn...
- Patent number 4,195,239
- Issue date Mar 25, 1980
- Nippon Electric Co., Ltd.
- Shunichi Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential amplifier circuit
- Patent number 4,150,311
- Issue date Apr 17, 1979
- Nippon Electric Co., Ltd.
- Zensuke Matsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-out amplifier circuit for a dynamic MOS memory
- Patent number 4,119,870
- Issue date Oct 10, 1978
- Siemens Aktiengesellschaft
- Klaus Zibert
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic transfer circuit employing MOS transistors
- Patent number 4,063,113
- Issue date Dec 13, 1977
- International Standard Electric Corporation
- Alexander Douglas Odell
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge coupled device shift registers having an improved regenerati...
- Patent number 4,060,737
- Issue date Nov 29, 1977
- Texas Instruments Incorporated
- William Milton Gosney
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-coupled charge transfer sense amplifier circuits
- Patent number 4,039,861
- Issue date Aug 2, 1977
- International Business Machines Corporation
- Lawrence Griffith Heller
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive means for controlling threshold voltages in insulated ga...
- Patent number 4,035,662
- Issue date Jul 12, 1977
- Texas Instruments Incorporated
- Chang - Kiang Kuo
- G11 - INFORMATION STORAGE
Information Patent Grant
Regenerative MOS transistor charge detectors for charge coupled dev...
- Patent number 4,025,801
- Issue date May 24, 1977
- Texas Instruments Incorporated
- William Milton Gosney
- G11 - INFORMATION STORAGE
Information Patent Grant
FET load gate compensator
- Patent number 3,996,481
- Issue date Dec 7, 1976
- International Business Machines Corporation
- William M. Chu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Programmable latch and other circuits for logic arrays
- Patent number 3,993,919
- Issue date Nov 23, 1976
- IBM Corporation
- Dennis Thomas Cox
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed bistable multivibrator circuit
- Patent number 3,982,140
- Issue date Sep 21, 1976
- NCR Corporation
- George C. Lockwood
- G11 - INFORMATION STORAGE
Information Patent Grant
Regenerative charge detector for charged coupled devices
- Patent number 3,979,603
- Issue date Sep 7, 1976
- Texas Instruments Incorporated
- William Milton Gosney
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal detector for a semiconductor memory device
- Patent number 3,931,538
- Issue date Jan 6, 1976
- Hitachi, Ltd.
- Kiyoo Itoh
- G11 - INFORMATION STORAGE
Information Patent Grant
3921011
- Patent number 3,921,011
- Issue date Nov 18, 1975
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT STRUCTURE AND RELATED METHOD FOR RADIATION RESISTANT MEMORY...
- Publication number 20240046983
- Publication date Feb 8, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Vivek Raj
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT STRUCTURE AND RELATED METHOD FOR RADIATION RESISTANT MEMORY...
- Publication number 20230326520
- Publication date Oct 12, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Vivek Raj
- G11 - INFORMATION STORAGE
Information Patent Application
Efficient Retention Flop Utilizing Different Voltage Domain
- Publication number 20210250019
- Publication date Aug 12, 2021
- Apple Inc.
- Greg M. Hess
- G11 - INFORMATION STORAGE
Information Patent Application
FLIP-FLOP CIRCUIT WITH LATCH BYPASS
- Publication number 20160248405
- Publication date Aug 25, 2016
- Advanced Micro Devices, Inc.
- Daniel W. Bailey
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Bistable CML Circuit
- Publication number 20110316587
- Publication date Dec 29, 2011
- STMicroelectronics Pvt. Ltd.
- Pratap Narayan Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MINIMIZING TIMING SKEW AMONG CHIP LEVEL OUTPUTS FOR REGISTERED OUTP...
- Publication number 20070236249
- Publication date Oct 11, 2007
- Integrated Device Technology, Inc.
- Tak Kwong (Dino) Wong
- H03 - BASIC ELECTRONIC CIRCUITRY

with synchronous operation

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Circuit structure and related method for radiation resistant memory...

Efficient retention flop utilizing different voltage domain

Efficient retention flop utilizing different voltage domain

Circuit for improving clock rates in high speed electronic circuits...

Configurable flip-flop circuit

Bistable CML circuit

Minimizing timing skew among chip level outputs for registered outp...

CMOS binary up/down counter

Digital integrated circuit

Sequential-logic basic element in CMOS technology operating by a si...

High speed state machine

Dynamically selectable polarity latch

Device for detecting the presence or absence of a charge quantity a...

High speed latch circuit

Dynamic ratioless circuitry for random logic applications

Bus driver/latch with second stage stack input

Flip-flop comprising two field effect transistors controllably conn...

Differential amplifier circuit

Read-out amplifier circuit for a dynamic MOS memory

Logic transfer circuit employing MOS transistors

Charge coupled device shift registers having an improved regenerati...

Cross-coupled charge transfer sense amplifier circuits

Capacitive means for controlling threshold voltages in insulated ga...

Regenerative MOS transistor charge detectors for charge coupled dev...

FET load gate compensator

Programmable latch and other circuits for logic arrays

High speed bistable multivibrator circuit

Regenerative charge detector for charged coupled devices

Signal detector for a semiconductor memory device

3921011

Patents Applicationslast 30 patents

CIRCUIT STRUCTURE AND RELATED METHOD FOR RADIATION RESISTANT MEMORY...

CIRCUIT STRUCTURE AND RELATED METHOD FOR RADIATION RESISTANT MEMORY...

Efficient Retention Flop Utilizing Different Voltage Domain

FLIP-FLOP CIRCUIT WITH LATCH BYPASS

Bistable CML Circuit

MINIMIZING TIMING SKEW AMONG CHIP LEVEL OUTPUTS FOR REGISTERED OUTP...