3667006

Information

• Patent Grant
• 3667006

• References
• Source

• Patent Number

  3,667,006

• Date Filed

  Not available

• Date Issued

  Tuesday, May 30, 1972
  52 years ago

• CPC

  • H01L27/0821 - Combination of lateral and vertical transistors only
  • H01L21/00 - Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/74 - Making of localized buried regions
  • H01L27/00 - Devices consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate
  • Y10S148/037 - Diffusion-deposition
  • Y10S148/038 - Diffusions-staged
  • Y10S148/085 - Isolated-integrated
  • Y10S148/096 - Lateral transistor
  • Y10S148/145 - Shaped junctions
  • Y10S148/151 - Simultaneous diffusion

• US Classifications

  • 257 - Active solid-state devices
  • 148 - Metal treatment
  • 438 - Semiconductor device manufacturing: process