3925120

Information

• Patent Grant
• 3925120

• References
• Source

• Patent Number

  3,925,120

• Date Filed

  Not available

• Date Issued

  Tuesday, December 9, 1975
  49 years ago

• CPC

  • H01L21/823892 - with a particular manufacturing method of the wells or tubs
  • H01L21/74 - Making of localized buried regions
  • H01L21/761 - PN junctions
  • H01L29/00 - Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier
  • Y10S148/039 - Displace P-N junction
  • Y10S148/049 - Equivalence and options
  • Y10S148/053 - Field effect transistors fets
  • Y10S148/085 - Isolated-integrated
  • Y10S148/097 - Lattice strain and defects
  • Y10S148/145 - Shaped junctions

• US Classifications

  • 438 - Semiconductor device manufacturing: process
  • 148 - Metal treatment
  • 257 - Active solid-state devices