Claims
- 1. An active pixel formed in a semiconductor substrate comprising:an isolation region formed on said substrate defining an active area; a photodiode formed in said semiconductor substrate; an output node formed in said semiconductor substrate; and a transfer gate formed between said output node and said photodiode, such that substantially the entire surface of the photodiode is covered by either the transfer gate or said isolation region.
- 2. The active pixel of claim 1 further including a reset transistor formed within said active area, said reset transistor having a gate formed between said output node and a voltage reference (VREF).
- 3. The active pixel of claim 1 wherein said isolation region is a field oxide formed from local oxidation of silicon.
- 4. The active pixel of claim 1 wherein said isolation region is a shallow trench isolation.
- 5. The active pixel of claim 1 wherein said substrate is a P-type substrate and said output node is a N+ region.
- 6. The active pixel of claim 1 wherein said output node is formed within a P-well formed in said P-type substrate.
- 7. The active pixel of claim 6 wherein said P-well is separated from said photodiode by a gap.
- 8. The active pixel of claim 6 wherein said photodiode is formed by an N-well formed in said P-type substrate.
- 9. The active pixel of claim 1 further including a surface N+ region underneath said transfer gate and adjoining said photodiode.
- 10. The active pixel of claim 1 further including a pixel output transistor formed within said active area and having its gate connected to said output node.
- 11. A CMOS image sensor comprising:a plurality of active pixels arranged in rows and columns, at least one of said active pixels comprising: (a) an isolation region formed in a substrate defining an active area; (b) a light sensitive element formed in said semiconductor substrate; (c) an output node formed adjacent to said light sensitive element; and (d) a transfer gate formed between said output node and said photodiode, such that substantially the entire surface of the light sensitive element is covered by either the transfer gate or the isolation region; a processing circuit for receiving the output of said active pixels; and an I/O circuit for outputting the output of said active pixels off of said CMOS image sensor.
- 12. The image sensor of claim 11 further said active pixel further includes a reset transistor formed within said active area, said reset transistor having a gate formed between said output node and a voltage reference (VREF).
- 13. The image sensor of claim 11 wherein said isolation region is formed from a field oxide.
- 14. The image sensor of claim 11 wherein said isolation region is formed by a shallow trench isolation.
- 15. The image sensor of claim 11 wherein said substrate is a P-type substrate and said output node is a N+ region.
- 16. The image sensor of claim 11 wherein said active pixel further includes a surface N+ region underneath said transfer gate and adjoining said photodiode.
CROSS-REFERENCE TO RELATED APPLICATION(S)
This application is a continuation application of U.S. patent application Ser. No. 10/011,589, filed on Nov. 6, 2001, now U.S. Pat. No. 6,462,365, which is hereby incorporated by reference in its entirety.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
6462365 |
He et al. |
Oct 2002 |
B1 |
Continuations (1)
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Number |
Date |
Country |
Parent |
10/011589 |
Nov 2001 |
US |
Child |
10/218762 |
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US |