Claims
- 1. A process of manufacture of a superjunction device comprising the steps of forming spaced parallel trenches into a silicon wafer of one conductivity type; each of said trenches having an axis along a depth dimension with said axes being perpendicular to a top surface of said silicon wafer; each of said trenches having approximately a same depth and cross section; directing an implant beam of a species which defines a second conductivity type toward said top surface of said silicon wafer and at an angle to said axes of each of said trenches; said angle being sufficiently small that a full length of an interior surface of each of said trenches receives implanted ions from said implant beam; rotating said wafer to expose a full surface area of an interior of each of said trenches to said implant beam; and maintaining said implant beam directing and said wafer rotating until a sufficient depth and concentration of said second conductivity type is achieved to match that of said silicon wafer when activated, such that regions near said trenches of opposite conductivity type both deplete during reverse bias.
- 2. The process of claim 1, wherein said trenches are symmetrically disposed over said top surface of said wafer.
- 3. The process of claim 1, wherein said ion implant angle is between 1 degrees and 20 degrees.
- 4. The device of claim 1, wherein said one conductivity type is N type.
- 5. The process of claim 2, wherein said ion implant angle is between 1 degrees and 20 degrees.
- 6. The device of claim 1, wherein said trenches have a depth of greater than about 25 microns and a width which is less than about 9 microns.
- 7. The device of claim 2, wherein said trenches have a depth of greater than about 25 microns and a width which is less than about 9 microns.
- 8. The device of claim 3, wherein said trenches have a depth of greater than about 25 microns and a width which is less than about 9 microns.
- 9. The device of claim 5, wherein said trenches have a depth of greater than about 25 microns and a width which is less than about 9 microns.
- 10. A process of manufacture of a superjunction device comprising the steps of forming spaced parallel trenches into a silicon wafer of one conductivity type; each of said trenches having an axis along a depth dimension with said axes being perpendicular to a top surface of said silicon wafer; each of said trenches having a depth of greater than about 25 microns and a width of less than about 9 microns; directing an implant beam of a species which defines a second conductivity type toward said top surface of said silicon wafer and at an angle to said axes of each of said trenches; said angle being sufficiently small that a full length of an interior surface of each of said trenches receives implanted ions from said implant beam; and rotating said wafer to expose a full surface area of an interior or each of said trenches to said implant beam.
RELATED APPLICATIONS
This application is related to and claims priority to Provisional Application Ser. Nos. 60/204,033, filed May 15, 2000.
US Referenced Citations (5)
Provisional Applications (1)
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Number |
Date |
Country |
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60/204033 |
May 2000 |
US |