Patent Application
20140348290
Exemplary embodiments of the present disclosure generally relate to an X-ray detector, and more particularly, to a low capacitance packaging for direct conversion X-ray or gamma ray detector modules that can be used as a modular tileable elements in a large area detector such as in a computed tomography (CT) system.
Radiographic imaging systems, such as X-ray and computed tomography (CT), have been employed for observing interior aspects of an object. Typically, the imaging systems include an X-ray source that is configured to emit X-rays toward an object of interest, such as a patient. A detecting device, such as an array of radiation detectors, is positioned on the other side of the object and is configured to detect the X-rays transmitted through the object of interest.
One known detector used in a computed tomography (CT) system includes an energy discriminating, direct conversion detector. When subjected to X-ray energy, a sensor element in the detector converts the detected X-ray energy to an analog electrical signal corresponding to the incident X-ray flux.
As part of the data acquisition system (DAS), an Application Specific Integrated Circuit (ASIC) may acquire the analog signals from the detector and convert these signals to digital signals for subsequent processing. Conventional detector module packaging includes the detector and ASIC with a module layout that supports only one detector orientation relative to the incident X-rays. Typically, X-ray detectors are stacked in vertical alignment with a corresponding ASIC due to the need for high density, low capacitance electrical connections between the detector and ASIC. Low capacitance connections are needed to maintain signal integrity with the rapid transient (typically 40 ns or less) analog electrical signals.
Vertical stacking of an ASIC with a x-ray detector can present some problematic conditions. For example, heat generated by the ASIC can couple to the detector and introduce unwanted noise and thermal variation. Further, vertical stacking hampers the ability to detect radiation with anode side illumination, due to the ASIC being disadvantageously irradiated by the incident X-rays.
Accordingly, it is desirable to provide a detector module layout and system of interconnects that provide a high density, low capacitance signal path between a direct conversion sensor and an ASIC while permitting the ASIC to be offset laterally from the sensor.
In exemplary embodiments, a direct-conversion X-ray detector can include one or more detector modules. Each detector module can include a substrate, one or more X-ray direct conversion sensor tiles, and one or more photon-counting application specific integrated circuits (ASICs). The substrate has a dielectric constant of less than about 3.5 and is capable of lithographic conductor patterning with feature sizes of about 5 um or less. At least one X-ray direct conversion sensor tile has an array of one or more electrodes that can be electrically coupled to a first surface of the substrate. The photon-counting ASIC(s) can have a peaking time of 160 nanoseconds or less. The one or more ASICs are electrically coupled to the substrate and disposed laterally along the substrate with respect to the one or more direct conversion sensor tiles. Conductive lines are spaced along the substrate, wherein the conductive lines are configured to electrically couple the one or more X-ray direct conversion sensor tiles to the one or more ASICs.
In some embodiments, the ratio of spacing to width of the plurality of conductive lines can be greater than 3:1, the width of each of the plurality of conductive lines is less than 5 microns, and/or the spacing between each of the plurality of conductive lines is less than 25 microns.
In some embodiments, the ASIC can be disposed within the substrate.
In some embodiments, at least one fusible link can be disposed along at least one of the plurality of conductive lines. The at least one fusible link can be configured and adapted to provide electrostatic discharge protection.
In some embodiments, the one or more direct conversion sensor tiles and the one or more ASICs can be disposed along the first surface of the substrate. In some embodiments, the one or more direct conversion sensor tiles can be arranged to detect an energy ray that impinges through a second surface of the substrate. In some embodiments, the one or more direct conversion sensor tiles can be arranged to detect an energy ray that impinges upon the sensor tile without passing through the substrate.
In some embodiments, the substrate can be formed of glass, fused quartz, and/or sapphire.
In some embodiments, a second substrate can include a first and a second surface, wherein each of the first and second surfaces includes electrical contact pads. The contact pads disposed on the first surface can be arranged to match electrical contact pads of each ASIC. The contact pads disposed on the second surface can be arranged to match the termini of the conductive lines on the first substrate. The second substrate can provide electrical connection between the contact pads on the second surface and the contact pads on the first surface using through-vias. The second substrate can be placed between the first substrate and the one or more ASICs. The pads on the second surface of the second substrate can be conductively attached to the termini of the conductive lines on the first substrate. The contact pads of the one or more ASICs can be conductively attached to the first surface of the second substrate. In some embodiments, the second substrate provides additional electrical connections to enable distribution of power, control, and data signals between the one or more ASICs and an external system. In some embodiments, the second substrate is a flexible dielectric film, such as polyimide.
In another embodiments, an imaging system is disclosed that includes an imaging source and a detector. The detector can include one or more detector modules, each of which can include a substrate, at least one direct conversion sensor tile, and at least one photon-counting Application Specific Integrated Circuit (ASIC). The substrate has a dielectric constant of less than about 3.5 and is capable of lithographic conductor patterning with feature sizes of about 5 um or less. The at least one direct conversion sensor tile can be electrically coupled to a first surface of the substrate. The at least one ASIC has a peaking time of 160 nanoseconds or less and is electrically coupled to the substrate. The ASIC is disposed laterally along the substrate with respect to the at least one direct conversion sensor tile. Conductive lines are spaced along the substrate and are configured to electrically couple the at least one direct conversion sensor tile to the at least one ASIC.
In some embodiments, the detector modules can be disposed laterally along a common plane. In some embodiments, the detector modules can be disposed in an offset and/or overlapping configuration. In some embodiments, adjacent sensor tiles on each of the detector modules abut and there is a fixed angular offset between the planes of adjacent detector modules. In some embodiments, the detector modules can be arranged such that substantially no part of each of the at least one direct conversion sensor tiles are blocked from detecting an energy ray from the illumination source by adjacent detector modules.
In some embodiments, the at least one direct conversion sensor tile associated with each of the detector modules can be arranged to detect an energy ray that impinges through a second surface of the substrate with substantially no part of any of the at least one direct conversion sensor tile being blocked by adjacent detector modules.
Any combination or permutation of embodiments is envisioned. Additional advantageous features, functions and applications of the disclosed systems, assemblies and methods of the present disclosure will be apparent from the description which follows, particularly when read in conjunction with the appended figures. All references listed in this disclosure are hereby incorporated by reference in their entireties.
Referring to
Computer 36 also receives commands and scanning parameters from an operator via console 40 configured to allow an operator to interact with the computer 36. For example, the console 40 can include a keyboard, touchscreen, mouse, joystick, and the like An associated display 42 allows the operator to observe the reconstructed image and other data from computer 36. The operator supplied commands and parameters are used by computer 36 to provide control signals and information to the detector ASICs, X-ray controller 28 and gantry motor controller 30. In addition, computer 36 operates table motor controller 44 which controls motorized table 46 to position patient 22 in gantry 12. Particularly, table 46 moves portions of patient 22 through gantry opening 48.
While exemplary embodiments of the detector modules are described relative to a CT system, those skilled in the art will recognize that the detector modules can be utilized in other systems for detecting radiation. For example, in some embodiments, the detector modules can be used in X-ray scanners for luggage inspection, in gamma ray detectors, or as an X-ray detector for crystallography.
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ASIC 110 is connected to substrate 115 laterally offset from direct conversion sensors 105. The lateral offset between ASIC 110 and direct conversion sensors 105 allows for heat generated by ASIC 110 to be dissipated away from direct conversion sensors 105 to reduce sensor thermal variations and to allow for lower-noise and faster operation of ASIC 110 compared to conventional detector structures. Furthermore, disposing the ASIC 110 laterally offset from the sensors 105, advantageously allows exemplary embodiments of the detector modules 100 of the present disclosure to receive X-rays from either side of the sensor (i.e., to implement Anode or Cathode sensor illumination). ASIC 110 can be a photon-counting ASIC having a peaking time of 160 nanoseconds or less, which corresponds to a response time of an electronic amplification channel of the ASIC 110 to a time-narrow pulse of current from an X-ray detector pixel of one of the sensors 105.
Conductive lines on substrate 115 connect ASIC electrical inputs and outputs to the sensors 105 and to input-output connection 141. The conductive lines connecting the sensors 105 to the ASIC 110 may have to be very dense while having low mutual and absolute capacitance. This may require the conductive lines disposed with respect to the substrate 115 to have a ratio of line spacing to line width of greater than approximately 3:1. In one embodiment, the width of each sensor conductive line on substrate 115 is approximately 5 microns and the spacing between each of the conductive lines is approximately 25 microns. Fusible links can be incorporated with conductive lines to provide for ASIC electrostatic discharge (ESD) protection during the manufacturing process. High voltage interconnect 130 makes contact with sensor cathode 125 to provide necessary sensor bias. In one embodiment, the ASIC 110 can be constructed within substrate 115 using traditional lithographic techniques. Since the substrate 115 can be formed from a material that does not inhibit X-ray propagation and the ASIC 110 is laterally offset from the sensors 105, the detector module 100 advantageously supports X-ray illumination from either the substrate side of sensors 105, or the opposing (e.g., cathode) side of the sensors 105. With substrate-side illumination, the X-ray absorption of the substrate and electrical contacts must be accounted. In some embodiments, one orientation may be preferable to the other.
In some embodiments, the ASIC 110 can be directly coupled to the substrate 115. The sensor(s) 105 can include a large quantity of sensor outputs (e.g., 64 or more individual channels) that are routed to the (one or more) ASIC 110. The ASIC 110 and the substrate can have corresponding electrical contacts to electrically couple the ASIC 110 to the sensor outputs via the conductive lines. The ASIC 110 can be directly coupled using, for example, an electrical conductive epoxy, pressure sensitive adhesive, or a sufficiently low-temperature solder. In some embodiments, a low-temperature solder may require that specific metal types be available as a surface finish for the substrate contacts.
In some embodiments, the sensor signal lines and the ASIC power lines can have conflicting requirements. For example, the many sensor signal lines may have to be narrow and dense for low capacitance while the ASIC power lines must be wide and/or thick for low resistance and inductance. Referring now to
By placing interposer layer 140 between ASIC 110 and substrate 115, further improvements can be realized. For example, the layout of the electrical contacts on the ASIC can be different than the layout of the electrical contacts of the substrate. By allowing the layouts of the electrical contacts to be different, the density of the layout of the electrical contacts of the ASIC and/or the substrate can be less dense and/or can have a footprint that is larger than or smaller than the perimeter of the ASIC. Interposer layer 140 can be sufficiently flexible to provide protection for ASIC 110 from thermal stress due to CTE mismatch between the ASIC and substrate 115 during assembly and operation of module 100. Also, interposer layer 140 can provide additional electrical connections for power, control, and data signals between ASIC 110 and an external system. These interposer connections may have lines that are thicker or wider than are practical on substrate 115. Using this approach, in some embodiments, conductive lines from the sensors 105 can be routed to the ASIC from one side of interposer 140, and conductive lines for the power, control, and data signals can be routed to the ASIC from an opposite side of the interposer. Further, direct conversion sensor 105 is shown attached to ceramic interposer 135 for both CTE mismatch protection as well as to allow ease of handling and testing before final assembly with substrate 115. In one embodiment, direct conversion sensor 105 is attached to ceramic interposer 135 with low-temperature epoxy to avoid high-temperature damage during further assembly of module 100.
In exemplary embodiments, the ASIC 110 can be implemented as a chip scale package (CSP). The package can be connected to a heat sink to promote heat dissipation and can include an integral FR4 interposer to provide for a ball-grid array as electrical connection to ASIC 110. The CSP can include an integral Cu/Mo slug connected to ASIC 110 to provide a heat transfer conduit to the heat sink.
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It will be apparent to those skilled in the art that, while the invention has been illustrated and described herein in accordance with the patent statutes, modification and changes may be made in the disclosed embodiments without departing from the true spirit and scope of the invention. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
