Apparatus and method to support thermal management of semiconductor-based components

Information

  • Patent Grant
  • 11211305
  • Patent Number
    11,211,305
  • Date Filed
    Friday, March 31, 2017
    7 years ago
  • Date Issued
    Tuesday, December 28, 2021
    2 years ago
Abstract
An integrated circuit having a body comprised of semiconducting material has one or more electronic components formed in a first region of the body and at least another electronic component formed in the second region of the body. A thermal barrier separates the two regions. By one approach that thermal barrier comprises a gap formed in the body. The gap may comprise an air gap or may be partially or wholly filled with material that inhibits thermal conduction. The thermal barrier may at least substantially surround the aforementioned second region. The second region may also include one or more temperature sensors disposed therein. A temperature control circuit may use the corresponding temperature information from within the second region to actively control the second region temperature using a temperature forcing element that is disposed at least proximal to the second region.
Description
TECHNICAL FIELD

These teachings relate generally to integrated circuits and more particularly to the thermal management thereof.


BACKGROUND

The design and manufacture of integrated circuits comprises a well-understood area of prior art endeavor. Integrated circuits typically comprise a plurality of electronic components/circuits on a small flat piece (or “chip”) of semiconductor material such as silicon.


It is also known that the performance of the components that comprise an integrated circuit can vary with temperature. This temperature-based variability can lead to inaccurate performance. It is possible in some cases to compensate for temperature variability through clever and exacting selection of components and circuit design. Such an approach, however, can greatly increase cost of the resultant integrated circuit.


By another approach, off-board precision components are utilized in conjunction with an integrated circuit. Using this physically-discrete form factor, the precision component is then maintained in a physically separate thermally-regulated enclosure or location. By precisely maintaining that temperature, the performance of the precision component can be well controlled and form the basis of, for example, precision measurements. Though effective, such a solution can be both very costly and result in a relatively large overall form factor/footprint that greatly undercuts the miniaturization achieved by integrated circuits.


SUMMARY

Generally speaking, pursuant to these various embodiments an integrated circuit having a body comprised of semiconducting material has one or more electronic components formed in a first region of the body and at least another electronic component formed in the second region of the body. That second region of the body is at least partially separated from the first region by a thermal barrier. By one approach that thermal barrier comprises, at least in part, a gap formed in the body. The gap may comprise an air gap or may be partially or wholly filled with material that inhibits thermal conduction. The thermal barrier may at least substantially surround the aforementioned second region.


The second region may also include one or more temperature sensors disposed therein. By one approach the integrated circuit also includes a temperature control circuit that operably couples to the temperature sensor and that uses the corresponding temperature information from within the second region to actively control the second region temperature using a temperature forcing element that is disposed at least proximal to the second region.


By one approach the temperature forcing element comprises a heating-only element such as a resistive element. This heating-only element can be disposed fully within the second region to thereby convey controlled warmth to the electronic component(s) disposed within the second region. By another approach the temperature forcing element comprises a thermal pump (such as a Peltier pump) that employs a thermo-electric material that can be selectively controlled to pump heat from one location to another. If desired, these teachings will accommodate using both a thermal pump and a heating-only element in combination with one another.


So configured, an integrated circuit can include a thermal barrier formed in its semiconductor substrate to at least substantially surround one or more electronic components that are to be specifically thermally regulated. A temperature forcing element that responds to a temperature sensor located within the corresponding thermally-isolated region then actively regulates a temperature that corresponds to the thermally-isolated component(s). So regulated, the component will operate in an accurately predicted and expected manner, with operating results that can be relied upon by other components of the integrated circuit.


These teachings avoid the use of off-board components and hence maintain the space savings associated with integrated circuits. Just as importantly, these teachings can be deployed and utilized in a highly economically-sensitive manner. As a result, these teachings will facilitate the use of temperature-dependent high-precision components at a greatly reduced price as compared to other prior art solutions. These and other benefits may become clearer upon making a thorough review and study of the following detailed description.





BRIEF DESCRIPTION OF THE DRAWINGS

The above needs are at least partially met through provision of the apparatus and method to support thermal management of semiconductor-based components described in the following detailed description, particularly when studied in conjunction with the drawings, wherein:



FIG. 1 comprises a perspective view as configured in accordance with various embodiments of these teachings;



FIG. 2 comprises a side elevational detail view as configured in accordance with various embodiments of these teachings;



FIG. 3 comprises a side elevational detail view as configured in accordance with various embodiments of these teachings;



FIG. 4 comprises a side elevational detail view as configured in accordance with various embodiments of these teachings;



FIG. 5 comprises a side elevational detail view as configured in accordance with various embodiments of these teachings;



FIG. 6 comprises a top plan view as configured in accordance with various embodiments of these teachings;



FIG. 7 comprises a top plan block diagram view as configured in accordance with various embodiments of the invention; and



FIG. 8 comprises a flow diagram as configured in accordance with various embodiments of these teachings.





Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions and/or relative positioning of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present teachings. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present teachings. Certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required. The terms and expressions used herein have the ordinary technical meaning as is accorded to such terms and expressions by persons skilled in the technical field as set forth above except where different specific meanings have otherwise been set forth herein.


DETAILED DESCRIPTION

Referring now to the drawings, and in particular to FIG. 1, an illustrative integrated circuit 100 that is compatible with many of these teachings will now be presented. (For the sake of simplicity and clarity, many ordinary features of an integrated circuit (such as, for example, multiple layers and additional materials, leads, and pads) are not shown here.)


In this illustrative example the integrated circuit 100 comprises a body/substrate 101 of semiconducting material. Examples include, but are not limited to, silicon, germanium, and so forth. The size and shape of the body/substrate 101 can be as desired as these teachings will tolerate essentially any dimensions and form factor of choice.


In this example the body/substrate 101 includes a first region 102 that comprises, in this example, the majority of the body/substrate 101. This first region 102 includes at least a first electronic component 103 and more typically a plurality of electronic components formed therein. These electronic components 103 can be essentially any known electronic components including both active and passive devices. The first region 102 will also typically include other features such as electrically conductive traces to interconnect the electronic components 103, output/input pads and leads, and so forth; such additional features are not illustrated here for the sake of simplicity and clarity.


The body/substrate 101 also includes a second region 104 formed therein. This second region 104 is at least partially segregated from the first region 102 by a thermal barrier 105. As used herein, a “thermal barrier” will be understood to refer to a physical feature that presents an abrupt thermal discontinuity as regards thermal conductivity. Accordingly, the expression “thermal barrier” does not refer to, for example, a length of the body/substrate 101 where the amount of heat conducted over that length drops in a uniform and/or gradient-like manner as compared to an abrupt discontinuity.


In some application settings this thermal barrier does not serve as part of another electronic component. As will be shown below, however, by another approach this thermal barrier may include a thermo-electric material and hence may act as a thermal pump by applying a voltage difference between the two regions 102 and 104 (assuming their electrical isolation from one another) to cause a current to flow through the thermo-electric material that results in a flow of heat out of the second region 104.


In this illustrative example the thermal barrier 105 comprises, at least in part, a gap 106 formed in the body/substrate 101. Modern semiconductor fabrication techniques provide any number of ways by which such a gap can be formed in the aforementioned semiconductor material. For example, etching-based methodologies that serve to create trenches in semiconductor materials can be readily applied in these regards.



FIGS. 2 through 5 provides some illustrative examples in these regards. By one approach, and as shown in FIGS. 2 through 4, the gap 106 comprises an air gap. By one approach, and as shown in FIG. 2, the air gap may extend fully through the body/substrate 101. By another approach, and as shown in FIGS. 3 and 4, the air gap may extend into, but not fully through, the body/substrate 101.


These teachings are highly flexible in practice and will accommodate gaps 106 of various depths and widths. These teachings will also accommodate gaps 106 having different cross-sectional form factors. FIG. 3, for example, illustrates that the gap 106 can have a rectangular cross-section. FIG. 4, as another example, illustrates that the gap 106 can have a triangular or wedge-shaped cross-section. Such examples are intended to serve an illustrative purpose and are not intended to suggest any particular limitations in these regards.


By another approach, the gap 106 can be partially or wholly filled with material of choice. FIG. 5 presents an illustrative example where the gap 106 is completely filled with a plastic material 501. When selecting a material for this purpose, the thermal characteristics of the material 501 should serve to preserve or further enhance the thermal discontinuity presented by the gap 106 itself.


Depending upon the needs of the application setting, the thermal barrier 105 may comprise a single line (straight and/or curved) that may or may not at least substantially surround the aforementioned second region 104. (The aforementioned reference to “substantially” surrounding the second region 104 will be understood to mean to surround by at least 50 percent, and accordingly will include surrounding by at least 75 percent, 80 percent, 90 percent, and 100 percent as desired.) In the illustrative example of FIG. 1, the thermal barrier 105 comprises a square-shaped form factor having an incomplete side. That incomplete side provides a bridge between the first and second regions 102 and 104 to accommodate, for example, electrically-conductive traces to electrically couple electronic components within the second region 104 with electronic components within the first region 102.


A very similar result to what is presented in FIG. 1 can be obtained by employing a plurality of discrete gaps formed in the body/substrate that are separated by only small portions of the body/substrate 101. In such a case, the thermal barrier 105 can be comprised of a plurality of such gaps.


These teachings will accommodate a wide variety of pathway shapes for the gap(s). Examples include but are not limited to rectangles, circles, ellipses, triangles, octagon's, pentagons, and essentially any open or closed, regular or irregular polygon.


In these examples the gap originates from the front surface of the substrate 101. These teachings will also accommodate, however, employing a gap that originates from the back surface thereof. For example, these teachings will accommodate a backside etched trench that etches all the way up to but not through the inter-metal dielectrics of a silicon top. In this way silicon is removed while oxide and metal interconnects are left to support the center structure.



FIG. 6 presents an example where the thermal barrier 105 comprises four discrete gaps 106 formed in the body/substrate 101. Each gap 106 includes two long legs disposed at 90° to one another and two short legs disposed at the end points thereof (with one of the short legs being disposed inwardly towards the second region 104 and the remaining short leg being disposed outwardly into the first region 102). So configured, the second region 104 is highly thermally isolated from the first region 102 by, at least for the most part, at least two parallel gaps. At the same time, there are numerous, albeit narrow, bridging pathways between the first and second regions that can serve to include electrically-conductive traces to facilitate electrical interconnections between the two regions as needed. It will be noted that a similar design paradigm can be formed using other shapes such as rectangles, circles, and so forth.


In a typical application setting the size of the second region 104 will tend to constitute only a minor portion of the overall body/substrate 101. For example, the second region 104 in a given application setting may constitute only 20 percent, 10 percent, 5 percent, or less of the overall body/substrate 101. This relatively diminutive size will typically accord with the fact that in a typical application setting the first region 102 will harbor the vast majority of the electronic components while the second region 104 will form a thermally-isolated region of the body/substrate 101 that serves to harbor only a minority of the electronic components (typically only one or no more than a very few electronic components) that are to be selectively individually thermally regulated. (Other electronic components may also be included in the second region 104 as described below.)


To be clear, the aforementioned thermal barrier 105 (such as the above-described air gap 106) formed in the semiconductor body/substrate 101 serves to reduce the number and quality of thermal conduction pathways between regions (i.e., the aforementioned first region 102 and the aforementioned second region 104) of the semiconductor body/substrate 101 on either side of the thermal barrier 105.


With continued reference to FIG. 1, the second region 104 will typically include at least one electronic component 107 to be thermally regulated/protected. These teachings will accommodate all manner and type of electronic components including both passive and active devices and assemblies. (These teachings may also be applied in conjunction with miniature mechanical assemblies that may or may not have a corresponding electronic or electrical attribute.) In some application settings there may be only one such electronic component 107 to be protected in this manner.


The second region 104, in this illustrative example, includes at least one, two, or more temperature sensors 108. Temperature sensing elements are known in the art and the present teachings are not overly sensitive with respect to any particular choices in these regards. Such temperature sensors 108 operably coupled to a temperature control circuit 109 (the latter being disposed in the first region 102 in this illustrative embodiment, though these teachings will readily accommodate placing part or all of the temperature control circuit 109 within the second region 104). The temperature control circuit 109 may employ fixed and/or programmable logic and/or analog circuitry to compare sensed temperature information from the one or more temperature sensors 108 with one or more predetermined thresholds or setpoints and to respond accordingly by using at least one temperature forcing element to thereby regulate a temperature that corresponds to the electronic component 107 to be regulated/protected.


These teachings will accommodate various approaches to the aforementioned temperature forcing element. Generally speaking, this element comprises an element that can exude and/or absorb/direct heat via conduction (at least as a primary means of thermal transfer). Generally speaking, the temperature forcing element is disposed at least proximal to the second region 104. As used herein, this reference to being “proximal” will be understood to mean that the temperature forcing element is wholly disposed within the second region, or is at least partially disposed within the second region but may have a portion thereof that bridges the aforementioned thermal barrier 105 and/or that resides (equally or unequally) within the first region 102.


By one approach, and as illustrated in FIG. 1, the temperature forcing element comprises a heating-only element 110. For example, certain resistance circuit elements are known to readily convert electricity into heat and can be readily applied in these regards. So configured, this heating-only element 110, when energized/activated by the temperature control circuit 109 (in response, at least in part, to sensed temperature information within the second region 104), will convert electricity into heat to thereby warm the electronic component 107 that is being thermally regulated/protected.


By another approach, in lieu of the foregoing or in combination therewith, the temperature forcing element can comprise a thermal pump. In this application setting the thermal pump comprises, at least in part, a thermal-electric material that is electrically conductive while also being thermally insulated. More particularly, the thermal pump serves to “pump” heat from one side of itself to another. Thermal pumps are themselves generally well understood in the art and require no further elaboration here.



FIG. 7 provides an illustrative example in these regards. In this example the thermal pump 703 has portions in both the first region 102 and the second region 104 and bridges the thermal barrier 105 as well. So configured, the thermal pump 703 responds to the control of the temperature control circuit 109 by selectively pumping heat 701 from the first region 102 across the thermal barrier 105 and into the second region 104 via conduction (the exuded heat being denoted by reference numeral 702). Depending upon the needs of the application setting, the thermal pump 703 could be operated in a reverse mode of operation to thereby pump heat away from the electronic component 107 in the second region 104 and thereby cool the electronic component 107 as part of the temperature regulation functionality.



FIG. 8 presents an illustrative example of a corresponding process 800 for thermally regulating/protecting a predetermined electronic component. At block 801 of this process 800 this process 800 provides an integrated circuit that comprises a semiconductor substrate, a plurality of electronic components formed on the semiconductor substrate on at least a first side thereof, a thermal barrier formed in the semiconductor substrate at least substantially around at least one but not more than a minority of the plurality of electronic components to thereby form a thermally-isolated region of the semiconductor substrate that harbors the at least one but not more than a minority of the plurality of electronic components, wherein the foregoing electronic components include at least one electronic component to be thermally regulated along with at least one temperature sensor, and a temperature forcing element disposed at least proximal to the thermally-isolated region.


At block 802 this process 800 provides for using the aforementioned temperature sensor to sense a temperature within the thermally-isolated region formed as described above. At block 803, this process 800 provides for responding to the temperature sensor by using the aforementioned temperature forcing element to regulate a temperature corresponding to the at least one electronic component to be thermally regulated.


So configured, these teachings will accommodate thermally regulating/protecting one or more electronic components on/in a semiconductor substrate in a way that avoids expending energy to similarly thermally modulate other electronic components on/in the semiconductor substrate that do not require such care. Those skilled in the art will appreciate that these teachings permit such thermal control for on-board components and hence avoids the need for off-board components having their own discrete thermal regulation/protection.


Those skilled in the art will recognize that a wide variety of modifications, alterations, and combinations can be made with respect to the above described embodiments without departing from the scope of the invention, and that such modifications, alterations, and combinations are to be viewed as being within the ambit of the inventive concept.

Claims
  • 1. An apparatus comprising: a body including semiconducting material, the body having a first region and a second region laterally spaced from the first region;a first electronic component formed in the first region;a second electronic component formed in the second region, wherein the second region of the body is at least partially separated from the first region by a thermal barrier, the thermal barrier including a solid material having a lower thermal conductivity than the semiconducting material;wherein the thermal barrier includes a bridging pathway formed of the semiconducting material thereby making the thermal barrier discontinuous; anda temperature forcing element at least partially in the second region and connected to the first region, the temperature forcing element to cause heat transfer between the first region and the second region by conduction.
  • 2. The apparatus of claim 1, wherein the apparatus includes an integrated circuit.
  • 3. The apparatus of claim 1, wherein the thermal barrier comprises a plurality of discrete gaps formed in the body, each of the plurality of discrete gaps separated by the semiconducting material.
  • 4. The apparatus of claim 3, wherein the plurality of discrete gaps at least substantially surround the second electronic component.
  • 5. The apparatus of claim 1, wherein the thermal barrier extends into, but not fully through, the body.
  • 6. The apparatus of claim 1 further including a temperature sensor disposed within the second region.
  • 7. The apparatus of claim 1, wherein the temperature forcing element is a thermal pump.
  • 8. An integrated circuit comprising: a semiconductor substrate including a first region and a second region;a plurality of electronic components formed at least partially in the semiconductor substrate;a thermal barrier formed in the semiconductor substrate at least substantially around the first region including at least one of the plurality of electronic components, the thermal barrier including a solid material;wherein the thermal barrier has at least two coextending gaps in the semiconductor substrate thereby making the thermal barrier discontinuous, anda temperature forcing element at least partially in the first region and connected to a second region at an opposite side of the thermal barrier to cause heat transfer between the first region and the second region by conduction.
  • 9. The integrated circuit of claim 8, wherein the semiconductor substrate includes a silicon substrate.
  • 10. The integrated circuit of claim 8, wherein the two coextending gaps include air gaps formed in the semiconductor substrate to reduce thermal conduction pathways between regions of the semiconductor substrate on either side of the air gaps.
  • 11. The integrated circuit of claim 8, wherein the thermal barrier further includes additional gaps formed in the semiconductor substrate to substantially surround the at least one of the plurality of electronic components.
  • 12. The integrated circuit of claim 11, wherein the at least one of the plurality of electronic components includes: at least one electronic component to be thermally regulated; anda temperature sensor.
  • 13. The integrated circuit of claim 12, wherein the temperature forcing element is a thermal pump.
  • 14. The integrated circuit of claim 13, wherein the temperature forcing element is operably responsive to the temperature sensor and is configured to regulate a local temperature to thereby thermally regulate the at least one electronic component to be thermally regulated.
RELATED APPLICATION(S)

This application claims the benefit of U.S. Provisional application No. 62/316,901, filed Apr. 1, 2016, which is incorporated by reference in its entirety herein.

US Referenced Citations (137)
Number Name Date Kind
3508126 Newman et al. Apr 1970 A
3952265 Hunsperger Apr 1976 A
4007978 Holton Feb 1977 A
4210923 North et al. Jul 1980 A
4267484 O'Loughlin May 1981 A
4272753 Nicolay Jun 1981 A
4757210 Bharat et al. Jul 1988 A
4891730 Saddow et al. Jan 1990 A
4916506 Gagnon Apr 1990 A
4942456 Sako Jul 1990 A
4996577 Kinzer Feb 1991 A
5340993 Salina et al. Aug 1994 A
5389578 Hodson et al. Feb 1995 A
5514892 Countryman et al. May 1996 A
5629838 Knight May 1997 A
5796570 Mekdhanasarn et al. Aug 1998 A
5929514 Yalamanchili Jul 1999 A
5990519 Huang-Lu et al. Nov 1999 A
6031251 Gempe et al. Feb 2000 A
6111305 Yoshida et al. Aug 2000 A
6242987 Schopf et al. Jun 2001 B1
6300632 Liu et al. Oct 2001 B1
6351011 Whitney et al. Feb 2002 B1
6359276 Tu Mar 2002 B1
6365433 Hyoudo et al. Apr 2002 B1
6507264 Whitney Jan 2003 B1
6509574 Yuan et al. Jan 2003 B2
6696752 Su et al. Feb 2004 B2
6815808 Hyodo et al. Nov 2004 B2
6821822 Sato Nov 2004 B1
6921704 Wu Jul 2005 B1
6977468 Baginski Dec 2005 B1
7015587 Poddar Mar 2006 B1
7321162 Lee Jan 2008 B1
7334326 Huemoeller et al. Feb 2008 B1
7436054 Zhe Oct 2008 B2
7732892 Jeng Jun 2010 B2
7749797 Bauer et al. Jul 2010 B2
7842542 Shim Nov 2010 B2
7869180 Cheung Jan 2011 B2
8018705 Michalopoulos Sep 2011 B2
8159056 Kim et al. Apr 2012 B1
8433084 Conti et al. Apr 2013 B2
8436460 Gamboa et al. May 2013 B1
8569082 Kummerl Oct 2013 B2
8633551 Teh Jan 2014 B1
9006857 Carr Apr 2015 B1
9160423 Brauchler et al. Oct 2015 B2
9184012 Wang Nov 2015 B2
9219028 Higgins, III et al. Dec 2015 B1
9419075 Carothers Aug 2016 B1
9748207 Krause et al. Aug 2017 B2
9761543 Male et al. Sep 2017 B1
9926188 Classen et al. Mar 2018 B2
9929110 Male et al. Mar 2018 B1
10002700 Lan Jun 2018 B2
20030141802 Liebeskind et al. Jul 2003 A1
20030183916 Heck et al. Oct 2003 A1
20030222205 Shoji Dec 2003 A1
20040080025 Kasahara et al. Apr 2004 A1
20040084729 Leung May 2004 A1
20040111881 Yang et al. Jun 2004 A1
20050170656 Nasir et al. Aug 2005 A1
20050218300 Quinones et al. Oct 2005 A1
20050221517 Speyer et al. Oct 2005 A1
20060087000 Okuno Apr 2006 A1
20060205106 Fukuda et al. Sep 2006 A1
20060281334 Shin et al. Dec 2006 A1
20070076421 Kogo et al. Apr 2007 A1
20070108388 Lane et al. May 2007 A1
20070138395 Lane Jun 2007 A1
20070152308 Ha et al. Jul 2007 A1
20070229177 Moriya Oct 2007 A1
20070278897 Ozaki Dec 2007 A1
20080217759 Lin et al. Sep 2008 A1
20080266730 Viborg Oct 2008 A1
20080290486 Chen et al. Nov 2008 A1
20090052214 Edo et al. Feb 2009 A1
20090085191 Najafi et al. Apr 2009 A1
20090115049 Shiraishi et al. May 2009 A1
20090127638 Kilger et al. May 2009 A1
20090261430 Suzuki et al. Oct 2009 A1
20100187652 Yang Jul 2010 A1
20100244234 Sonobe et al. Sep 2010 A1
20100252923 Watanabe et al. Oct 2010 A1
20100284553 Conti et al. Nov 2010 A1
20110061449 Yagi et al. Mar 2011 A1
20110084340 Yuan Apr 2011 A1
20110089540 Drost et al. Apr 2011 A1
20110102005 Feng May 2011 A1
20110108747 Liu May 2011 A1
20110220996 Kutsukake Sep 2011 A1
20110233790 Bchir Sep 2011 A1
20110248374 Akin et al. Oct 2011 A1
20110316113 Noda Dec 2011 A1
20120299127 Fujii et al. Nov 2012 A1
20130134445 Tarsa et al. May 2013 A1
20130168740 Chen Jul 2013 A1
20130194057 Ruby Aug 2013 A1
20130315533 Tay et al. Nov 2013 A1
20130320459 Shue Dec 2013 A1
20130320548 Carpenter et al. Dec 2013 A1
20130329324 Tziviskos Dec 2013 A1
20130336613 Meade Dec 2013 A1
20140001632 Uehling et al. Jan 2014 A1
20140061840 Oguri et al. Mar 2014 A1
20140091909 Smith et al. Apr 2014 A1
20140264905 Lee et al. Sep 2014 A1
20140298825 Noshadi Oct 2014 A1
20150004902 Pigott et al. Jan 2015 A1
20150035091 Ziglioli Feb 2015 A1
20150069537 Lo et al. Mar 2015 A1
20150094875 Duzly Apr 2015 A1
20150175406 Lin et al. Jun 2015 A1
20150180425 Lukashevich Jun 2015 A1
20150198493 Kaelberer et al. Jul 2015 A1
20150249043 Elian et al. Sep 2015 A1
20150255693 Baade et al. Sep 2015 A1
20150369681 Imai et al. Dec 2015 A1
20150369682 Nakajima Dec 2015 A1
20150372034 Chen Dec 2015 A1
20150380353 Bauer et al. Dec 2015 A1
20160003436 Singer et al. Jan 2016 A1
20160013771 Sridaran et al. Jan 2016 A1
20160049341 Pontarollo Feb 2016 A1
20160064696 Collier et al. Mar 2016 A1
20160087034 You Mar 2016 A1
20160103082 Kimura Apr 2016 A1
20160167089 Ng et al. Jun 2016 A1
20160209285 Nakajima Jul 2016 A1
20170022049 Chu et al. Jan 2017 A1
20170040335 Lim Feb 2017 A1
20170047271 Zapico Feb 2017 A1
20170089789 Kanemoto et al. Mar 2017 A1
20170134004 Isozaki et al. May 2017 A1
20170275157 Zhu et al. Sep 2017 A1
20170330841 Cook et al. Nov 2017 A1
Foreign Referenced Citations (7)
Number Date Country
1986297 Oct 2008 EP
2490263 Aug 2012 EP
2521619 Jul 2015 GB
20170018165 Feb 2017 KR
2201017 Mar 2003 RU
2263999 Nov 2005 RU
2169962 Jun 2011 RU
Non-Patent Literature Citations (15)
Entry
Clark, C. G., “The Basics of Arc Flash, GE Industrial Solutions website accessed Oct. 5, 2016, http://apps.geindustrial.com/publibrary/checkout/ArcFlash4?TNR=White%20Papers%7CArcFlash4%7Cgeneric”; 3 pages.
National Semiconductor Corporation, “Semiconductor Packaging Assembly Technology,” National Semiconductor Corporation, Aug. 1999; 8 pages.
Cook, et al., “Floating Die Package”, U.S. Appl. No. 15/248,151, filed Aug. 26, 2016; 34 pages.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration; dated May 17, 2018, 8 pages.
Maloberti, F., “Layout of Analog CMOS Integrated Circuit, Part 2 Transistors and Basic Cells Layout,” retrieved from http://ims.unipv.it/Courses/download/AIC/Layout02.pdf (and attached hereto), dated Mar. 15, 2004 (38 pages).
Texas Instruments Product Brochure ISO7841x High-Performance, 8000-Vpk Reinforced Quad-Channel Digital Isolator, dated Nov. 2014 (37 pages).
Texas Instruments Application Report “The ISO72x Family of High-Speed Digital Isolators,” SLLA198—Jan. 2006 (12 pages).
Texas Instruments Developers Guide “Digital Isolator Design Guide,” SLLA284A, Jan. 2009 (19 pages).
Wikipedia article “3D Printing,” retrieved from “http://en.wikipedia.org/w/index.php?title=3D_printing&oldid=624190184”, dated Sep. 4, 2014 (35 pages).
OSRAM Opto Semiconductors GmbH, Olson Compact (850nm), version 1.6, SFH 4710, dated Dec. 1, 2015, 13pp.
International Search Report for PCT/US20171031987 dated Sep. 7, 2017.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration; dated May 24, 2018, 8 pages.
Search Report for European Patent Application No. 17796774.2, dated May 9, 2019, 2 pages.
Supplementary Search Report for European Patent Application No. 17886649.7, dated Dec. 13, 2019, 1 page.
EU Search Report for Application No. 117 796 774.2-1212, dated Jul. 9, 2020.
Related Publications (1)
Number Date Country
20170287804 A1 Oct 2017 US
Provisional Applications (1)
Number Date Country
62316901 Apr 2016 US