Patent Application
20170278990
Photovoltaic cells, commonly known as solar cells, are well known devices for direct conversion of solar radiation into electrical energy. Generally, solar cells are fabricated on a semiconductor wafer or substrate using semiconductor processing techniques to form a p-n junction near a surface of the substrate. Solar radiation impinging on the surface of, and entering into, the substrate creates electron and hole pairs in the bulk of the substrate. The electron and hole pairs migrate to p-type doped and n-type doped regions in the substrate, thereby generating a voltage differential between the doped regions. The doped regions are connected to conductive regions on the solar cell to direct an electrical current from the cell to an external circuit coupled thereto.
In solar cell manufacturing, a large number of wafers or substrates having small dimensions are produced which can make precise quality control during solar cell production difficult. Some quality control methods trace back properties of a group of wafers or modules which can be imprecise and provide limited information. Individual tracking of solar cells can be used to identify key manufacturing process steps needing optimization and key factors extending solar cell lifetime. Accordingly, techniques for tracking solar cells are generally desirable. Some embodiments of the present disclosure allow for tracking or marking of solar cells and improve quality control of solar cells across multiple manufacturing steps and the entire solar cell lifecycle.
The following drawings illustrate by way of example and not limitation. For the sake of brevity and clarity, every feature of a given structure is not always labeled in every figure in which that structure appears. Identical reference numbers do not necessarily indicate an identical structure. Rather, the same reference number may be used to indicate a similar feature or a feature with similar functionality, as may non-identical reference numbers. The figures are not drawn to scale.
The following detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter of the application or uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following detailed description.
Certain terminology may be used in the following description for the purpose of reference only, and thus are not intended to be limiting. For example, terms such as “upper”, “lower”, “above”, and “below” refer to directions in the drawings to which reference is made. Terms such as “front”, “back”, “rear”, “side”, “axial”, and “lateral” describe the orientation and/or location of portions of the component within a consistent but arbitrary frame of reference which is made clear by reference to the text and the associated drawings describing the component under discussion. Such terminology may include the words specifically mentioned above, derivatives thereof, and words of similar import. Similarly, the terms “first”, “second”, and other such numerical terms referring to structures do not imply a sequence or order unless clearly indicated by the context.
Terminology—The following paragraphs provide definitions and/or context for terms found in this disclosure (including the appended claims):
This specification includes references to “one embodiment” or “an embodiment.” The appearances of the phrases “in one embodiment” or “in an embodiment” do not necessarily refer to the same embodiment. Particular features, structures, or characteristics can be combined in any suitable manner consistent with this disclosure.
This term “comprising” is open-ended. As used in the appended claims, this term does not foreclose additional structure or steps.
Various units or components may be described or claimed as “configured to” perform a task or tasks. In such contexts, “configured to” is used to connote structure by indicating that the units/components include structure that performs those task or tasks during operation. As such, the unit/component can be said to be configured to perform the task even when the specified unit/component is not currently operational (e.g., is not on/active). Reciting that a unit/circuit/component is “configured to” perform one or more tasks is expressly intended not to invoke 35 U.S.C. §112, sixth paragraph, for that unit/component.
As used herein, the terms “first,” “second,” etc. are used as labels for nouns that they precede, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.). For example, reference to a “first” encapsulant layer does not necessarily imply that this encapsulant layer is the first encapsulant layer in a sequence; instead the term “first” is used to differentiate this encapsulant from another encapsulant (e.g., a “second” encapsulant).
The terms “a” and “an” are defined as one or more unless this disclosure explicitly requires otherwise.
The following description refers to elements or nodes or features being “coupled” together. As used herein, unless expressly stated otherwise, “coupled” means that one element/node/feature is directly or indirectly joined to (or directly or indirectly communicates with) another element/node/feature, and not necessarily mechanically.
As used herein, “inhibit” is used to describe a reducing or minimizing effect. When a component or feature is described as inhibiting an action, motion, or condition it may completely prevent the result or outcome or future state completely. Additionally, “inhibit” can also refer to a reduction or lessening of the outcome, performance, and/or effect which might otherwise occur. Accordingly, when a component, element, or feature is referred to as inhibiting a result or state, it need not completely prevent or eliminate the result or state.
As used herein, the term “substantially” is defined as largely but not necessarily wholly what is specified (and includes what is specified; e.g., substantially 90 degrees includes 90 degrees and substantially parallel includes parallel), as understood by a person of ordinary skill in the art. In any disclosed embodiment, the terms “substantially,” “approximately,” and “about” may be substituted with “within [a percentage] of” what is specified, where the percentage includes 0.1, 1, 5, and 10 percent.
As used herein, “regions” can be used to describe discrete areas, volumes, divisions or locations of an object or material having definable characteristics but not always fixed boundaries.
In the following description, numerous specific details are set forth, such as specific operations, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to one skilled in the art that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known techniques are not described in detail in order to not unnecessarily obscure embodiments of the present invention. The feature or features of one embodiment can be applied to other embodiments, even though not described or illustrated, unless expressly prohibited by this disclosure or the nature of the embodiments.
Some embodiments of the present disclosure allow for marking and individual tracking of solar cells which can be used, for example, to identify key manufacturing process steps requiring optimization and/or significant factors extending solar cell lifetime. Tracking solar cells or semiconductor wafers throughout a solar cell manufacturing process enables improved process control, as slight variations in processing conditions could be directly correlated to cell performance. Additionally, embodiments of the present disclosure facilitate optimization of solar cell manufacturing processes which can lead to improvements in cell efficiency. We also disclose herein a mechanism for fast and precise diagnosis of issues encountered during solar cell manufacturing processes and related quarantining of faulty cells. Some embodiments allow for improved reliability tracking over the lifetime of a solar cell, as failures during operation or in the field can be correlated with processing conditions. Some embodiments disclosed herein can curtail counterfeiting in addition to improving quality control of solar cells across multiple manufacturing steps and throughout the entire solar cell lifecycle. The approaches described herein for marking and individual tracking of solar cells avoid or greatly minimize any negative impact on solar cell performance.
Disclosed herein are solar cells. Although many of the examples described herein are back contact solar cells, the techniques and structures apply equally to other (e.g., front contact) solar cells as well. Moreover, although much of the disclosure is described in terms of solar cells for ease of understanding, the disclosed techniques and structures apply equally to other semiconductor structures (e.g., silicon wafers, or large area light emitting diodes, or substrates generally).
According to one embodiment depicted in
In one embodiment, the solar cell is a back-contact solar cell such as depicted in
In one embodiment where substrate 102 comprises an n-type silicon wafer for example, an n-type doped region 112 and a p-type doped region 114 can form a base and an emitter, respectively, of the solar cell 100. The emitter collects minority charge carriers and the base collects majority charge carriers in the substrate 102. In embodiments where the substrate 102 comprises an n-type silicon wafer, electrons are the majority charge carriers collected in the doped region 112, while holes are the minority charge carriers and collected in the doped region 114. It should be appreciated, however, that in other embodiments, a neutral or p-type silicon substrate can be employed and for example, electrons could be the minority charge carriers and holes could be the majority charge carriers.
The first and second set of conductive conduits or contact fingers 122/124 are disposed on the plurality of alternating n-type and p-type semiconductor regions 112/114 as visible from the cross-sectional view of solar cell 100 depicted in
Conductive conduits or fingers can be formed of an electrically conductive material, for example an elemental metal or metal alloy (e.g. aluminum, copper, nickel, silver, gold). For ease of description, three contact fingers 122/124, each connected to three diffusion regions 112/114, are depicted in the illustration of
As depicted in
In some embodiments, solar cells can comprise pad-less terminals. For pad-less PV cells, active diffusion regions (e.g. p-type and n-type regions) and/or conductive fingers do not terminate at discrete contact pads but can be connected by bus bars or linear pads, for example. In some linear pad solar cell designs, conductive conduits or fingers can terminate at a peripheral edge of a semiconductor substrate and for example, with conductive conduits being connected by any desirable interconnect structure. In some embodiments, however, conductive conduits or fingers terminate at contact pads as described below.
In an embodiment, contact fingers 222/224 are arranged such that their ends are oriented to point towards and surround the perimeter of the contact pads 242/244. The ends of contact fingers can bend at 90° angles (e.g. contact fingers 224 bending towards contact pads 244), at angles other than 90° (e.g. contact fingers 222 angled towards contact pads 242), a combination thereof or any other desirable configuration. In some embodiments, contact fingers can be substantially straight without any bends while terminating at terminal edge regions.
Contact or solder pads can be formed of an electrically conductive material, for example an elemental metal or metal alloy (e.g. aluminum, copper, nickel, silver, gold). In some embodiments, the contact or solder pad is substantially planar. In other embodiments, the contact or solder pad can comprise a coarse or roughened surface. In the illustration of
In one embodiment, the width of an inactive terminal region, for example a contact pad, is greater than the minority charge carrier diffusion length. In accordance with terminology and definitions understood by those skilled in the art, the carrier diffusion length Ld can be defined as the average distance a charge carrier can move from a point of generation in a substrate until it recombines.
In an embodiment, the collection of minority carriers limits the collection efficiency of a particular region of the cell. As used herein, the term “active” refers to a photovoltaically active region of a solar cell. In some embodiments, the charge carrier collection efficiency and/or minority charge carrier collection efficiency of an active region is greater than 50%. Conversely, the term “inactive” refers to a photovoltaically inactive region of a solar cell. For example, the charge collection efficiency of an inactive region can be less than 50%.
To provide an additional example of “active” and “inactive regions” of a solar cell,
In an embodiment, inactive terminal regions comprise photovoltaically inactive regions having a charge carrier collection efficiency less than 50/o. Referring again to
As depicted in
In several embodiments described herein, a marking is provided on or above an inactive region of a solar cell. In some embodiments, a marking is provided on the front side of a solar cell above a contact pad located on the back side of the solar cell, such as depicted in
In an embodiment, the marking is located on or above an inactive terminal region or contact pad coupled to conductive conduits and/or active diffusion regions of a first type or polarity for collecting majority charge carriers. Not to be bound by any particular theory, but the collection of minority carriers is limited by their diffusion length, and it is the collection of these carriers that determines the power output of the cell. The carrier diffusion length can be defined as the average distance a carrier can move from a point of generation in the substrate until it recombines. The collection efficiency can thereby be limited by the collection of minority carriers. The inventors have found that it can be advantageous for a marking to be located at a terminal region for conductive conduits that are electrically coupled to active diffusion regions for collecting majority carriers because the collection of minority charge carriers limits cell efficiency rather than the collection of majority charge carriers.
Disclosed herein is a solar cell e.g. a front-contact solar cell comprising a substrate or semiconductor wafer having a front side and a back side, the front side facing the sun during normal operation. In some embodiments, a plurality of front-contact solar cells can be configured into a shingled solar cell string. The substrate of the solar cell comprises at least one active diffusion region of a first polarity and/or at least one active diffusion region for collecting majority charge carriers. The substrate further comprises at least one active diffusion region for collecting minority carriers. The front-contact solar cell further comprises a first and second set of conductive conduits, wherein each conductive conduit in the first set is electrically coupled to at least one active diffusion region for collecting majority carriers and each conductive conduit in the second set is electrically coupled to at least one active diffusion region for collecting minority carriers. In an embodiment, the solar cell further comprises a first inactive region, for example an edge isolation region. In some embodiments, the cell comprises a trench on the front side of the substrate, wherein the trench separates active and inactive regions of the substrate. The solar cell further comprises a marking on the front side of the substrate, the marking being located on or above the first inactive region e.g. the inactive edge isolation region. In one embodiment, the width of the first inactive region is greater than a diffusion length of the minority charge carrier in the first inactive region. For example, the width of the first inactive region can be less than 2 mm. As another example, the width of the first inactive region can be less than 1 mm.
In an embodiment, the size and shape of a solar cell marking can depend on the size of inactive terminal region above or on which the marking is provided, the amount of information the marking stores, the type and capability of an optical reader for reading the marking, or any combination thereof. As a non-limiting example, the marking can have a width W less than 2 mm and/or span across an area less than 3 mm2 on the front side a solar cell. As another example, a marking with dimensions of 1.5 mm×1.5 mm can be used to code 24 numbers or 18 alpha-numeric characters.
In an embodiment a marking comprises indentations formed by laser ablation. For example, a fraction of the substrate material e.g. silicon is removed or ejected from the substrate upon laser irradiation which results in an indentation in the substrate. Further examples of laser ablation processes to form solar cell markings are described below.
Disclosed herein is a method for fabricating, marking and/or tracking a solar cell. Tracking marked wafers throughout the solar cell manufacturing process can improve process control, as slight variations in processing conditions can be directly correlated to performance. For example, each critical process step can have an associated marking or barcode reader. Solar cells can be scanned before and/or after a particular process step. Additionally solar cells which can be grouped into solar modules can be scanned in the field, for example over the operational lifetime of the solar module.
According to one embodiment, a method illustrated in flowchart 500 of
The method further comprises a scribing step 520 wherein a front side of a first substrate or wafer is scribed to form a marking at an inactive region of the solar cell. In an embodiment, the marking comprises at least one indentation formed by laser ablation.
The inventors have recognized that the indentation size, spacing and depth must be sufficient for the marking to robustly survive solar cell processing steps, but also as shallow as possible to minimize any impact on the structural integrity, efficiency, and/or appearance of the cell. Scribing with an infra-red (e.g. 1064 nm wavelength) laser can produce relatively deep indentations in the semiconductor wafer, but the semiconductor wafer can also be damaged resulting in a loss of solar cell efficiency. In various embodiments described herein, laser scribing with light in the visible or UV range can be desirable to produce a lower penetration depth into the substrate with less damage. The inventors have found that utilizing a laser having a wavelength less than 1064 nm, or in some embodiments less than 1000 nm (e.g. green laser having 532 nm wavelength) can allow for a desirable scribe producing shallow indentations. As a non-limiting example, the scribing process can produce indentations less than 8 μm. On subsequent solar cell processing steps, the size and/or depth of the marking can increase or decrease depending on the particular processing conditions.
In an embodiment, a solar cell manufacturing method further comprises an etching step 530 wherein a semiconductor wafer is contacted with an etching solution to texture and/or remove damage from surfaces of the semiconductor wafer. Depending on the concentration of the etchant and/or etching time, the depth and/or size of the marking indentations can increase or decrease.
Referring again to
The method can further comprise a step 560 for forming a first inactive terminal region on a back side of the first semiconductor wafer can be formed. In an embodiment, the first inactive terminal region is electrically coupled to the first set of conductive conduits. In one example, a contact pad can be formed as a contact surface onto which an external electrically conductive lead can be contacted e.g. soldered and/or connected by an electrically conductive adhesive. In an embodiment, the first inactive terminal region can be formed below the front side region comprising the marking.
In some embodiments, the solar cell fabrication method further comprises a step of forming an anti-reflective coating on the marking and the front side of the substrate or wafer. In an embodiment, the indentations can be textured and/or comprise an anti-reflective coating (ARC) which can facilitate optical reading of the code.
The above specification and examples provide a complete description of the structure and use of illustrative embodiments. Although certain embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the scope of this invention. As such, the various illustrative embodiments of the methods and systems are not intended to be limited to the particular forms disclosed. Rather, they include all modifications and alternatives falling within the scope of the claims, and embodiments other than the one shown can include some or all of the features of the depicted embodiment. For example, elements can be omitted or combined as a unitary structure, and/or connections can be substituted. Further, where appropriate, aspects of any of the examples described above can be combined with aspects of any of the other examples described to form further examples having comparable or different properties and/or functions, and addressing the same or different problems. Similarly, it will be understood that the benefits and advantages described above can relate to one embodiment or can relate to several embodiments. For example, embodiments of the present methods and systems can be practiced and/or implemented using different structural configurations, materials, and/or control manufacturing steps. The claims are not intended to include, and should not be interpreted to include, means-plus- or step-plus-function limitations, unless such a limitation is explicitly recited in a given claim using the phrase(s) “means for” or “step for,” respectively.
