Patent Application
20230317694
The present disclosure relates to devices including optical elements (OEs) for electrical and optical communications, for example, on a semiconductor device or chip.
Known in the field of semiconductor technology including integrated circuit processing for microchips is a host chip and various reshaping transmitter and receiver circuits and techniques that correct for electrically distorted channel signals.
In one example, a method of using optical elements on a semiconductor chip with a carrier can include an optical element with micro-resonator rings (MRRs). The method can include a two-step error detection process, where the first step is to send a “1” data string between channels and using a parity function to detect faulty signals (optical power degradation). The method can include iterating through redundant slightly offset narrow operation wavelength MRRs at the receivers.
The present disclosure recognizes the shortcomings and problems associated with current techniques for electrical and optical communications on a semiconductor device or chip using optical elements and electrical wiring.
The present invention can include an embedded carrier where optical-to-electrical conversion devices (O/Es) operate with a shortened high speed electrical channel between the host chip and the E/Os on the new optical element (OE) structure to reduce the need for various reshaping transmitters and receiver circuits and other techniques that correct for electrically distorted channel signals. The circuit reduction/elimination according to the present disclosure can be beneficial in the reduction of energy and heat. The power saving architecture of the OE structure according to the present disclosure can reduce optical power compared to a conventional optical drive, which is accomplished by a direct drive architecture.
The present invention can include a method including a single step process that does not need to cycle through structures (micro-resonator rings, MRRs, and optical channels) to find workable optical channels as a function of temperature. Connections are done on the fly advancing to the next workable optical channel. The method can include addressing O/E failures via more robust electrical determined paths versus temperature dependent optical path/structures (MRRs). The method can be compatible for single-mode and multi-mode wavelengths.
Additionally, the method is compatible with optical channel hardware, as well as fibers channels and/or connectors.
In one example, a device can include an OE or OE structure which includes an optical-to-electrical (O/E) and/or an electrical-to-optical (E/O) conversion device on a device.
In an aspect according to the present invention, a device includes an OE or OE structure for electrical and optical communications on the device. The OE structure includes a substrate which includes a wiring layer with an optically transparent path which allows optical signals to pass therethrough. The OE structure includes an optical coupling layer coupled to the wiring layer, and the optical coupling layer includes at least one micro-lens for focusing or collimating the optical signals through the transparent path, and at least one optical-to-electrical (O/E) or electrical-to-optical (E/O) conversion device. The structure includes a carrier electrically attached to the wiring layer, and a first OE coupled to the wiring layer. The first OE is positioned in optical alignment with the optically transparent path for communicating optical signals. The device includes one or more semiconductor chips being communicatively coupled to the first OE, and the one or more semiconductor chips control the first OE
In a related aspect, the communicating of the optical signals includes receiving or sending of the optical signals.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads, and the one or more bonding pads being attached to one end of the wiring layer, and the first OE element coupled to another end of the wiring layer with respect to the one or more bonding pads.
In a related aspect, the device further includes a second OE coupled to a second wiring layer. The second OE is in spaced relation to the first EO along the carrier, and the second OE is positioned in optical alignment with a second optical transparent path for communicating second optical signals. The device includes another one or more semiconductor chips being communicatively coupled to the second OE, and the another one or more semiconductor chips control the second OE.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads, and the one or more bonding pads being attached to one end of the wiring layer. The first OE coupled to another end of the wiring layer with respect to the one or more bonding pads; and the device further comprises; a second OE being coupled to a second wiring layer, the second OE in spaced relation to the first EO along the carrier, and the second OE being positioned in optical alignment with a second optical transparent path for communicating second optical signals. The device includes another one or more semiconductor chips being communicatively coupled to the second OE, and the another one or more semiconductor chips control the second OE.
In a related aspect, the communicating of the first and second optical signals includes receiving or sending the first or second optical signals, respectively.
In another aspect according to the present invention, a method of optical element (OE) alignment to a lens array on a semiconductor substrate assembly for electrical and optical communications includes: forming a wiring layer on a semiconductor substrate, the wiring layer including an optically transparent path which allows optical signals to pass therethrough; coupling an optical coupling layer to the wiring layer, the optical coupling layer including at least one micro-lens for focusing or collimating the optical signals through the transparent path; electrically attaching a carrier to the wiring layer; and coupling a first OE to the wiring layer, the first OE positioned in optical alignment with the optically transparent path for communicating optical signals. The method includes communicatively coupling one or more semiconductor chips to the first OE, and the one or more semiconductor chips control the first OE.
In a related aspect, the method further includes receiving or sending of the optical signals as part of the communicating of the optical signals.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads. The method further includes attaching the one or more bonding pads to one end of the wiring layer, and coupling the first OE element to another end of the wiring layer with respect to the one or more bonding pads.
In a related aspect, the method further including: coupling a second OE to a second wiring layer, the second OE in spaced relation to the first EO along the carrier; and positioning the second OE in optical alignment with a second optical transparent path for communicating second optical signals. The method includes communicatively coupling another one or more semiconductor chips to the second OE, and the another one or more semiconductor chips control the second OE.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads; and the method further including: attaching the one or more bonding pads to one end of the wiring layer; coupling the first OE to another end of the wiring layer with respect to the one or more bonding pads; coupling a second OE to a second wiring layer, the second OE in spaced relation to the first EO along the carrier; and positioning the second OE in optical alignment with a second optical transparent path for communicating second optical signals. The method including communicatively coupling another one or more semiconductor chips to the second OE, and the another one or more semiconductor chips control the second OE.
In a related aspect, the communicating of the first and second optical signals includes receiving or sending the first or second optical signals, respectively.
In another aspect according to the present disclosure, a system includes a chip package which includes a semiconductor device which includes an optical element (OE) for electrical and optical communications on the device. The system includes a semiconductor substrate which includes a wiring layer with an optically transparent path which allows optical signals to pass therethrough. An optical coupling layer is coupled to the wiring layer, and the optical coupling layer includes at least one micro-lens for focusing or collimating the optical signals through the transparent path. A carrier is electrically attached to the wiring layer, and a first OE is coupled to the wiring layer. The first OE is positioned in optical alignment with the optically transparent path for communicating optical signals. The system includes one or more semiconductor chips being communicatively coupled to the first OE, and the one or more semiconductor chips control the first OE.
In a related aspect, the communicating of the optical signals includes receiving or sending of the optical signals.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads, and the one or more bonding pads being attached to one end of the wiring layer, and the first OE element coupled to another end of the wiring layer with respect to the one or more bonding pads.
In a related aspect, a second OE is coupled to a second wiring layer, the second OE is in spaced relation to the first EO along the carrier, and the second OE being positioned in optical alignment with a second optical transparent path for communicating second optical signals. The system includes another one or more semiconductor chips being communicatively coupled to the second OE, and the one or more semiconductor chips control the second OE.
In a related aspect, the electrically attaching of the wiring layer to the carrier includes using one or more bonding pads, and the one or more bonding pads being attached to one end of the wiring layer, and the first OE coupled to another end of the wiring layer with respect to the one or more bonding pads; and the device further comprises; and a second OE being coupled to a second wiring layer, the second OE in spaced relation to the first EO along the carrier, and the second OE being positioned in optical alignment with a second optical transparent path for communicating second optical signals. The system includes another one or more semiconductor chips being communicatively coupled to the second OE, and the one or more semiconductor chips control the second OE.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings. The various features of the drawings are not to scale as the illustrations are for clarity in facilitating one skilled in the art in understanding the invention in conjunction with the detailed description. The drawings are discussed forthwith below.
The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. The description includes various specific details to assist in that understanding, but these are to be regarded as merely exemplary, and assist in providing clarity and conciseness. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. In addition, descriptions of well-known functions and constructions may be omitted.
The terms and words used in the following description and claims are not limited to the bibliographical meanings, but are merely used to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention is provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.
It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces unless the context clearly dictates otherwise.
Embodiments and figures of the present disclosure may have the same or similar components as other embodiments. Such figures and descriptions of illustrate and explain further examples and embodiments according to the present disclosure.
Referring to the figures, according to embodiments of the present disclosure, a device includes an optical element (OE) (also referred to as an OE structure) for electrical and optical communications on the device includes features described below. It is understood that an optical element (OE), as used herein, can include an E/O (electrical to optical) conversion device, or a O/E (optical to electrical) conversion device, a semiconductor that performs an optical-to-electrical conversion and/or an electrical-to-optical conversion. The OE or OE structure may include wiring and lenses or lens arrays, etc., and either an E/O or an O/E, or both. In one example, an E/O and O/E can be a VCSEL (Vertical Cavity Self Emitting Laser), and a PD (Photo Diode), respectively.
Embodiments of the present disclosure include operational actions and/or procedures. A method can includes a series of operational blocks for implementing an embodiment according to the present disclosure which can include the systems shown in the figures. The operational blocks of the methods and systems according to the present disclosure can include techniques, mechanism, modules, and the like for implementing the functions of the operations in accordance with the present disclosure.
Referring to
The assembly 100 may incorporate a wafer assembly O/E chips-to-wafer (O/E-to-wafer) assembly technology, with a 1st level package electrical bonding (solder reflow, etc.) of O/E and E/O chips onto metal pads. The wafer assembly can include a substrate lens and alignment feature (to PCB) (as in an example shown in
An OE structure can include a wiring layer with at least one optically transparent path for allowing an optical signal to pass through. The OE structure can include an optical coupling layer attached to the wiring layer, the optical coupling layer can include at least one micro-lens for focusing or collimating the optical signal through the transparent path. One or more bonding pads are for electrically attaching the wiring layer to a carrier. At least one first OE can be coupled to the other end of the wiring layer, and the OE can be positioned in optical alignment with the optically transparent path for receiving or sending of optical signals. The OE structure using optical coupling, can eliminate optical wiring or fiber. In another embodiment, a method of OE optical I/O alignment to lens array can be implemented. In another embodiment, a system of incorporating the OE structure into a chip package can be implemented. In another embodiment, a direct drive optical sub-assembly architecture with lane sparing technique can be implemented. Embodiments according to the present disclosure for low power dissipation communication between a carrier mounted OE structure and a PCB.
Referring to
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Referring to
An O/E can include a single or arrays of VCSELs (vertical-cavity surface-emitting laser) and/or PDs (photodiode), including multidimensional arrays. Also, may have additional support, such as, LDD/TIA (Laser Diode Driver/Trans Impedance Amplifier) circuitry or chips, which can be in near proximity to an integrated circuit. The lens array can make use of conventional thermal management via the backside of the O/Es, in addition to a thermal path via the lens C4s. Metal interconnects can be deposited and defined on glass or silicon wafers, with or without additional insulating or adhesion layers, wafer scale bonded and diced/singulated to dimensions.
Referring to
In the substrate 300 shown in
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Referring to the cross-section drawing in
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The method 700 further includes dispensing the thermal interface at block 732.
Attaching a lid using a low melt C4 process than prior solder reflow melts is accomplished at block 734. The method includes picking and placing the lid, as in block 736, for example using 2 Kg/30s pressure with a free caping cure. A lid can be provided at block 739, for example, a Cu (Copper) (Ni (Nickel) plate). The method includes attaching the lid using a cure/flow melting solder. For example, a cure process of 125°/150° using forced convection, as in block 738.
The method includes fluxing of a substate, as in block 742, which can include providing an organic PCB (printed circuit board) as in block 740. The method includes alignment, for example with aligning pins or precision placement between O/E lens structures and the PCB, as in block 743. The method includes attaching BGA (Ball Grid Array) using reflow high melt balls, as in block 744. The method includes cleaning at block 746, and marking and curing at 748.
Again referring to
In the present disclosure embodiments according to the present disclosure include an effective option to reduce power consumption by bringing optic elements closer to a host chip in order to eliminate intermediate interface layer circuitry and elements. One or more host chips will directly drive the optical devices using either single-ended or differential electrical interconnects. In one embodiment, an optical chip can be mounted on a first level package but does not need any additional processing or connectors such as waveguides or fibers. The first level package continues to be treated like an all electrical interconnect package. Because of the contained first level, all electrical interconnects enable integrated optical interconnects off the first level package. This offers a more reliable and lower latency path, which can increase data rates between packages/boards, as well as lower power consumption.
In another embodiment according to the present disclosure, a multiplexer can provide a round-robin link training scheduling and fault identification. This embodiment includes a separate queue for every data flow. The data flow may be identified by its source and destination address. Algorithms allow active data flow that has data packets in the queue to take turns in transferring packets, for example, on a shared channel, and in a periodically repeated order. The scheduling can be work-conserving. For example, if one flow is out of packets, or a link is down, the next data link will take its place. The priority is to prevent link resources from going unused while identifying faulty links. This reduces stand-by partially on VCSEL power dissipation with no data transmitted.
In another example, more reduction of power and IO area can be achieved using a source synchronous link, such as a clock signal being transmitted along with a wide data bus. In another example, per lane clock recovery is not required in the host chip receiver, which leads to significant power saving and IO area reduction. In another example, an architecture as in the embodiments of the present disclosure can depict a lane sparing technique used in the receiver core to train all the receiver lanes in a round-robin fashion using a single link logic macro shared across the bus. In one embodiment, in a first level package, a processor directly driving optical devices packaged in close proximity can have no intermediate electrical interface, and a forwarded clock.
In another embodiment according to the present disclosure, a semiconductor device includes an optical element (OE) structure for electrical and optical communications on the device. The device can include a semiconductor substrate which includes a wiring layer with an optically transparent path which allows optical signals to pass therethrough. An optical coupling layer coupled to the wiring layer, the optical coupling layer includes at least one micro-lens for focusing or collimating the optical signals through the transparent path. The device includes a carrier being electrically attached to the wiring layer. One or more bonding pads can electrically attach the wiring layer to a carrier at one end of the wiring layer. The device includes a first OE coupled to another end of the wiring layer with respect to the one or more bonding pads. The first OE is positioned in optical alignment with the optically transparent path for communicating optical signals.
Referring to
When no other optical elements are coupled to the wiring layer, the method proceeds to block 930. When other optical elements are coupled to the wiring layer at block 924, the method includes coupling a second OE to a second wiring layer. The second OE is in spaced relation to the first EO along the carrier, and the second OE is positioned in optical alignment with a second optical transparent path for communicating second optical signals, as in block 928. The method 900 includes communicatively coupling one or more semiconductor chips to the first OE, and the one or more semiconductor chips control the first OE, as in block 930.
The method 900 shown in
In one example, the communicating of the optical signals includes receiving or sending of the optical signals. In another example, the device includes the electrically attaching of the wiring layer to the carrier using one or more bonding pads.
The device can include the electrically attaching of the wiring layer to the carrier using one or more bonding pads. The one or more bonding pads are attached to one end of the wiring layer, and the first OE element is coupled to another end of the wiring layer with respect to the one or more bonding pads. A second OE can be coupled to a second wiring layer, and the second OE in spaced relation to the first EO along the carrier. The second OE is positioned in optical alignment with a second optical transparent path for communicating second optical signals.
The device can include electrically attaching of the wiring layer to the carrier using one or more bonding pads, and the one or more bonding pads is attached to one end of the wiring layer, and the first OE coupled to another end of the wiring layer with respect to the one or more bonding pads. The device can further include a second OE being coupled to a second wiring layer. The second OE is in spaced relation to the first EO along the carrier, and the second OE is positioned in optical alignment with a second optical transparent path for communicating second optical signals. The communicating of the first and second optical signals can include receiving or sending the first or second optical signals, respectively.
In another embodiment according to present disclosure, a system can include a chip package which includes a semiconductor device which includes an optical element (OE) for electrical and optical communications on the device. The system can include a semiconductor substrate which includes a wiring layer with an optically transparent path which allows optical signals to pass therethrough. An optical coupling layer can be coupled to the wiring layer, and the optical coupling layer can include at least one micro-lens for focusing or collimating the optical signals through the transparent path. The system can include a carrier electrically attached to the wiring layer. A first OE is coupled to the wiring layer, and the first OE positioned in optical alignment with the optically transparent path for communicating optical signals.
In another embodiment according to the present disclosure, a system according and method resulting in a system as described in the present disclosure can include a direct drive optical sub-assembly architecture with s lane sparing technique.
Operational blocks and system components shown in one or more of the figures may be similar to operational blocks and system components in other figures. The diversity of operational blocks and system components depict example embodiments and aspects according to the present disclosure. For example, methods shown are intended as example embodiments which can include aspects/operations shown and discussed previously in the present disclosure, and in one example, continuing from a previous method shown in another flow chart.
It is understood that a set or group is a collection of distinct objects or elements. It is further understood that a set or group can be one element, for example, one thing or a number, in other words, a set of one element, for example, one or more users or people or participants. It is also understood that machine and device are used interchangeable herein to refer to machine or devices in one or more AI ecosystems or environments.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Likewise, examples of features or functionality of the embodiments of the disclosure described herein, whether used in the description of a particular embodiment, or listed as examples, are not intended to limit the embodiments of the disclosure described herein, or limit the disclosure to the examples described herein. Such examples are intended to be examples or exemplary, and non-exhaustive. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
The flowchart and block diagrams in the Figures of the present disclosure illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the Figures. For example, two blocks shown in succession may, in fact, be accomplished as one step, executed concurrently, substantially concurrently, in a partially or wholly temporally overlapping manner, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
