Number | Date | Country | Kind |
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8-206206 | Aug 1996 | JPX |
Number | Name | Date | Kind |
---|---|---|---|
5420824 | Kajimoto et al. | May 1995 | |
5604710 | Tomishima et al. | Feb 1997 |
Entry |
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Y. Nitta, et al., "A 1.6G/s Data-rate 1Gb Synchronous DRAM with Hierarchical Square-Shaped Memory Block and distributed Bank Architecture", IEEE International Solid-State Circuits Conference, Feb. 10, 1996, pp. 376-377. |