Patent Application
20120195548
The present disclosure is directed to electronics and, more particularly, to optically coupled electronic devices and related methods.
In a networked computer system, a plurality of circuit boards may be networked through a backplane in an enclosure. In such a system, each circuit board may be detachably coupled to the backplane to facilitate physical insertion/removal of the circuit board. Accordingly, circuit boards may be added to the computer system relatively easily to increase/change functionality/capacity, to replace malfunctioning circuit boards, to provide customized functionality, etc. Electrical network connections between circuit boards may be provided through the backplane. Moreover, the backplane and/or the enclosure may provide centralized power, management, and cooling, for the plurality of circuit boards networked through the backplane. Each circuit board, for example, may function as a server, and the circuit board servers may be referred to as blade servers.
In some networked computer systems, optical network connections may be provided between the circuit boards in addition to electrical network connections provided through the backplane. To provide these optical network connections, however, manual connections of optical cables/fibers may be required when circuit boards are removed from and/or added to the computer system. When adding a new circuit board, for example, an optical cable/fiber between two existing circuit boards may be manually removed, and optical cables/fibers may be manually connected between the new circuit board and each of the previously existing circuit boards. Similarly, when removing a circuit board, existing cable/fiber connections to the circuit board may be manually removed, and a new cable/fiber may be manually connected between the adjacent remaining circuit boards. Accordingly, interruption of the optical network connections to all circuit boards may occur when any one circuit board is added to or removed from the computer system thereby interrupting operations of all of the circuit boards. Moreover, errors from manually connecting/reconnecting optical cables/fibers may result in malfunctions.
According to some embodiments, a computing system may include a circuit board including an optical coupler, and a backplane. The backplane may include a connector providing a detachable mechanical coupling with the circuit board, an optical signal path configured to carry optical signals, and an optical bypass switch. The optical bypass switch may be configured to couple optical signals from the optical signal path to the optical coupler of the circuit board and to couple optical signals from the optical coupler of the circuit board to the optical signal path responsive to an enabling signal. The optical bypass switch may be further configured to transmit optical signals therethrough to bypass the circuit board responsive to an absence of the enabling signal.
By providing an optical bypass switch, manual connections between the circuit board and the optical signal path are not required. Accordingly, time required to add and/or remove circuit boards from the computing system may be reduced, and the potential for errors relating to manual connections of optical cables/fibers may be reduced. Moreover, the optical bypass switch may allow addition and/or removal of circuit boards without significantly interrupting traffic between other circuit boards along the optical signal path. Accordingly, circuit boards may be removed from and/or added to the computer system without shutting the computer system down and/or without significantly interfering with operations of other circuit boards or optical communications therebetween.
According to some other embodiments, a backplane for a computing system may include a connector configured to provide a detachable mechanical coupling with a circuit board, an optical signal path configured to carry optical signals, and an optical bypass switch. The optical bypass switch may be configured to couple optical signals from the optical signal path to the circuit board and to couple optical signals from the circuit board to the optical signal path responsive to an enabling signal. The optical signal path may be further configured to transmit optical signals therethrough to bypass the circuit board responsive to an absence of the enabling signal.
According to some other embodiments, a circuit board may be configured to operate in a computing system including an electrical connector, an optical signal path, and an optical bypass switch. The optical bypass switch may be configured to couple optical signals from the optical signal path to the circuit board and to couple optical signals from the circuit board to the optical signal path responsive to an enabling signal, and to transmit optical signals through the optical bypass switch to bypass the circuit board responsive to an absence of the enabling signal. More particularly, the circuit board may include an electrical connector, an optical coupler, and a controller electrically coupled to the electrical connector and to the optical coupler. The electrical connector may be configured to provide a detachable electrical coupling with the electrical connector of the computing system. The optical coupler may be configured to provide an optical coupling with the optical path through the optical bypass switch of the computing system, with the optical coupler including a detector configured to receive optical signals from the optical bypass switch and an emitter configured to transmit optical signals to the optical bypass switch. The controller may be configured to provide verification information through the electrical connector to the computing system without providing the enabling signal, and to provide the enabling signal for the optical bypass switch responsive to receiving authorization from the computing system.
According to some other embodiments, an optical bypass circuit may include a body configured to provide optical coupling with input optical signals and with output optical signals, a first mirror adjacent the input optical signals, and a second mirror adjacent the output optical signals. The first mirror may be configured to provide optical coupling between the input optical signals and an optical detector outside the body responsive to an enabling signal, and the first mirror may be configured to optically bypass the optical detector responsive to an absence of the enabling signal. The second mirror may be configured to provide optical coupling between an optical emitter and the output optical signals responsive to the enabling signal, and the second mirror may be configured to optically bypass the optical emitter responsive to the absence of the enabling signal.
According to some other embodiments, a computing system may include a backplane including a connector configured to provide a detachable mechanical coupling with a circuit board, an optical signal path, and an optical bypass switch serially coupled along the optical signal path. A method of operating such a computer system may include verifying compatibility of the circuit board with the computing system responsive to detecting a presence of the circuit board while carrying optical signals through the optical signal path bypassing the circuit board through optical bypass switch. Responsive to verifying compatibility, authorization may be provided for the circuit board to communicate over the optical signal path. Responsive to the authorization, the optical bypass switch may be actuated to couple the circuit board to the optical signal path through the optical bypass switch.
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate certain non-limiting embodiment(s) of the invention. In the drawings:
The invention will now be described more fully hereinafter with reference to the accompanying drawings, in which examples of embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. It should also be noted that these embodiments are not mutually exclusive. Components from one embodiment may be tacitly assumed to be present/used in another embodiment.
As discussed in greater detail below, a networked computing system may include a plurality of circuit boards (also referred to as blades or blade circuit boards) networked through a backplane of an enclosure. Each circuit board, for example, may include a printed circuit board (PCB) populated with electronic components providing functionality of a server, and a circuit board providing such functionality may be referred to as a blade server. The backplane may provide electrical and/or optical coupling between the circuit boards. More particularly, the backplane may include a multilayer printed circuit board (PCB) with a detachable electrical and mechanical connection for each of the circuit boards so that the circuit boards may be easily added, removed, replaced, etc. Moreover, the enclosure and/or backplane may provide power, cooling, networking, and/or management functionality for the circuit boards connected/coupled thereto.
As shown in the plan view of
Each detachable mechanical connector 107a to 107e may provide a detachable mechanical connection between a respective circuit board 301a to 301e and backplane 101 as well as alignment between elements (e.g., electrical connectors, optical couplers, etc.) of respective circuit boards and backplane 101. In embodiments of
Moreover, each mechanical connector 107a-e may include a respective electrical connector 115a to 115e providing a detachable electrical coupling with a circuit board coupled thereto. Electrical connectors 115a to 115e may thus provide networked electrical couplings between circuit boards and/or backplane controller 103. Backplane controller 103, for example, may be configured to provide network management and/or control for a plurality of circuit boards coupled to electrical connectors 115a to 115e. Mechanical connectors 107a to 107e and electrical connectors 115a to 115e may be integrated, for example, with the mechanical connectors providing alignment of circuit boards with respect to electrical connectors 115a to 115e. According to other embodiments, mechanical connectors 107a to 107e and electrical connectors 115a to 115e may be provided separately. While not shown in
Backplane 101 may also include optical signal path 111 (shown in
As shown in the perspective views of
Optical bypass switches 105a to 105e may be integrated in and/or on backplane 101. For example, optical bypass switches 105a to 105e may be manufactured separately from backplane 101 and then mounted in recesses of backplane 101 so that exposed surfaces of backplane 101 and optical bypass switches 105a to 105e are substantially flush as shown in
More particularly, optical coupler 303 may include: detector D configured to receive optical signals from the optical bypass switch 105 and to convert the optical signals to electrical signals; emitter E configured to convert electrical signals to optical signals and to transmit the optical signals to optical bypass switch 105; and transceiver XCVR configured to provide electrical communication between detector D, emitter E, circuit board controller 305, and/or processor 309. As shown in
Controller 305 may be electrically coupled to electrical connector 311, optical coupler 303, processor 309, and/or memory 307, and controller 305 may be configured to control coupling/decoupling of circuit board 301 (including processor 309) to/from optical path 111. Moreover, processor 309 may be configured to provide functionality (e.g., server functionality) of circuit board 301 using software and/or applications stored in memory 307. According to some embodiments, circuit board 301 may be inserted into a respective connector 107 of backplane 101, and circuit board controller 305 may initially receive power from power supply 109 (shown in
Upon initial insertion into backplane 101, for example, controller 305 may be configured to communicate with backplane controller 103 through electrical connectors 311 and 115 without providing power to processor 309 and without providing optical coupling through optical coupler 303 and optical bypass switch 105 to optical path 111. While maintaining power off to processor 309 and while maintaining decoupling from optical path 111, circuit board controller 305 may be configured to provide verification information through electrical connectors 311 and 115 to backplane controller 103. Responsive to receiving authorization from backplane controller 103, controller 305 may be configured to provide the enabling signal for optical bypass switch 105 and to provide power to processor 309 so that circuit board 301 may provide a desired functionality (e.g., server functionality) by executing software/applications from memory 307 on processor 309.
More particularly, controller 305 may be configured to provide the enabling signal to optical bypass switch 105 over signal line 315 responsive to authorization from backplane controller 105. Moreover, controller 305 and backplane controller 103 may coordinate timing of actuation of optical bypass switch 105 after processor 309 is powered and ready to operate so that network traffic over optical signal path 111 is not interrupted during actuation. Responsive to receiving the enabling signal from circuit board controller 305, optical bypass switch 105 may be configured to change from a de-actuated state bypassing optical coupler 303 (e.g., as shown in
Once the processor 309 is operating with optical coupling to optical signal path 111 through optical coupler 303 and optical bypass switch 105, a similar process can be used (in reverse) to turn the circuit board off. Responsive to an instruction to power down, controller 305 may power down processor 309 while maintaining passage of optical signals through optical coupler 303 so that optical signals received by detector D are replicated by emitter E. Accordingly, controller 311 may coordinate de-actuation of bypass switch with backplane controller 103 so that network traffic on optical signal path 111 is not interrupted when optical bypass switch 105 is de-actuated. Once backplane controller 103 authorizes de-actuation, controller 305 may remove (e.g., turn off) the enabling signal from signal line 315 to change optical bypass switch 105 from an actuated state (e.g., as shown in
As shown in
Elements of circuit board 301 and interconnections therebetween that are shown in
As shown in
As discussed above, optical bypass switches 105a to 105e may be provided for respective circuit boards 301a to 301e along a same optical signal path 111 to optically couple and/or bypass respective circuit boards 301a to 301e according to some embodiments. According to additional embodiments illustrated in
Each of circuit boards 301a to 301e may thus be optically coupled to some, all, or none of a plurality of optical signal paths 111-1 to 111-n according to some embodiments of the present invention. By selectively coupling different circuit boards 301a to 301e to different ones and/or different combinations of optical signal paths 111-1 to 111-n, different network configurations (e.g., ring, daisy-chain, multi-drop, and/or meshed network configurations) may be provided. In a daisy-chain network configuration, an output of each of optical bypass switches 105a to 105d may be provided to an input of a respective next optical bypass switch 105b to 105e. In a ring network configuration, optical signal path 111 and/or optical signals paths 111-1 to 111-n may be continuous from an output of optical bypass switch 105e to an input of optical bypass switch 105a. In a meshed network configuration with a plurality of optical data paths 111-1 to 111-n, a direct optical coupling may be provided between each circuit board and each of the other circuit boards. Moreover, an optical network configuration of backplane 101 may be changed without requiring re-cabling of optical data paths by changing a configuration of actuated/de-actuated optical bypass switches 105a to 105e. In addition, backplane network may be configured/reconfigured by backplane controller 105 on the fly by coordinating circuit board operations and optical bypass switch actuations/de-actuations as network operations continue.
According to some embodiments, methods of operating a computing system including backplane 101 and circuit boards 301a to 301e may allow insertion and/or removal of one circuit board (e.g., circuit board 301b) while maintaining operation of other circuit boards (e.g., circuit boards 301a and 301c to 301e). In the example of
Responsive to detecting the presence of the circuit board 301b at block 901, backplane controller 103 may verify compatibility of the circuit board 301b with the computing system at block 903 while continuing to carry optical signals through optical signal path 111 and optical bypass switch 105b bypassing the circuit board 301b. Responsive to verifying compatibility at block 905, backplane controller 103 may authorize circuit board 301b to communicate over the optical signal path 111 at block 907. Responsive to the authorization, processor 309b may be powered up at block 909, and an enabling signal may be generated by circuit board controller 305b to actuate optical bypass switch 105b thereby coupling circuit board 301b to optical signal path 111 at block 911. Powering processor 309b at block 909 may occur before actuating optical bypass switch 105b at block 911 as shown in
Circuit board 301b may later be powered off and/or removed, for example, to provide a system upgrade and/or repair, and/or to automatically shut down a circuit board responsive to detecting a error/malfunction of the circuit board 301b. A deactivation signal for circuit board 301b may be generated, for example, responsive to user input (e.g., through circuit board 301b and/or through backplane controller 103). In addition or in an alternative, a deactivation signals may be automatically generated responsive to an error/malfunction detected at circuit board controller 305b and/or at backplane controller 103. Responsive to a deactivation signal at block 917, circuit board 301b may be decoupled from the optical signal path 111 by removing the enabling signal thereby de-actuating optical bypass switch 105b. In addition, power to processor 309b may be turned off at block 917 responsive to receiving the deactivation signal. Once optical bypass switch 105b has been de-actuated and power to processor 309b has been turned off, circuit board 301b may be removed from connector 107b without interrupting optical signal transmission along optical signal path 111.
As discussed above with respect to
In the above-description of various embodiments of the present invention, it is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense expressly so defined herein.
When an element is referred to as being “connected”, “coupled”, “responsive”, or variants thereof to another element, it can be directly connected, coupled, or responsive to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected”, “directly coupled”, “directly responsive”, or variants thereof to another element, there are no intervening elements present. Like numbers refer to like elements throughout. Furthermore, “coupled”, “connected”, “responsive”, or variants thereof as used herein may include wirelessly coupled, connected, or responsive. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Well-known functions or constructions may not be described in detail for brevity and/or clarity. The term “and/or” includes any and all combinations of one or more of the associated listed items.
As used herein, the terms “comprise”, “comprising”, “comprises”, “include”, “including”, “includes”, “have”, “has”, “having”, or variants thereof are open-ended, and include one or more stated features, integers, elements, steps, components or functions but does not preclude the presence or addition of one or more other features, integers, elements, steps, components, functions or groups thereof. Furthermore, as used herein, the common abbreviation “e.g.”, which derives from the Latin phrase “exempli gratia,” may be used to introduce or specify a general example or examples of a previously mentioned item, and is not intended to be limiting of such item. The common abbreviation “i.e.”, which derives from the Latin phrase “id est,” may be used to specify a particular item from a more general recitation.
Example embodiments are described herein with reference to block diagrams and/or flowchart illustrations of computer-implemented methods, apparatus (systems and/or devices) and/or computer program products. It is understood that a block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions that are performed by one or more computer circuits. These computer program instructions may be provided to a processor circuit of a general purpose computer circuit, special purpose computer circuit, and/or other programmable data processing circuit to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, transform and control transistors, values stored in memory locations, and other hardware components within such circuitry to implement the functions/acts specified in the block diagrams and/or flowchart block or blocks, and thereby create means (functionality) and/or structure for implementing the functions/acts specified in the block diagrams and/or flowchart block(s).
These computer program instructions may also be stored in a tangible computer-readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instructions which implement the functions/acts specified in the block diagrams and/or flowchart block or blocks.
A tangible, non-transitory computer-readable medium may include an electronic, magnetic, optical, electromagnetic, or semiconductor data storage system, apparatus, or device. More specific examples of the computer-readable medium would include the following: a portable computer diskette, a random access memory (RAM) circuit, a read-only memory (ROM) circuit, an erasable programmable read-only memory (EPROM or Flash memory) circuit, a portable compact disc read-only memory (CD-ROM), and a portable digital video disc read-only memory (DVD/BlueRay).
The computer program instructions may also be loaded onto a computer and/or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer and/or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks. Accordingly, embodiments of the present invention may be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.) that runs on a processor such as a digital signal processor, which may collectively be referred to as “circuitry,” “a module” or variants thereof.
It should also be noted that in some alternate implementations, the functions/acts noted in the blocks may occur out of the order noted in the flowcharts. For example, two blocks shown in succession may in fact be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Moreover, the functionality of a given block of the flowcharts and/or block diagrams may be separated into multiple blocks and/or the functionality of two or more blocks of the flowcharts and/or block diagrams may be at least partially integrated. Finally, other blocks may be added/inserted between the blocks that are illustrated. Moreover, although some of the diagrams include arrows on communication paths to show a primary direction of communication, it is to be understood that communication may occur in the opposite direction to the depicted arrows.
Many different embodiments have been disclosed herein, in connection with the above description and the drawings. It will be understood that it would be unduly repetitious and obfuscating to literally describe and illustrate every combination and subcombination of these embodiments. Accordingly, the present specification, including the drawings, shall be construed to constitute a complete written description of various example combinations and subcombinations of embodiments and of the manner and process of making and using them, and shall support claims to any such combination or subcombination.
Many variations and modifications can be made to the embodiments without substantially departing from the principles of the present invention. All such variations and modifications are intended to be included herein within the scope of the present invention.
