CAPACITOR

Abstract

A capacitor that includes: an insulating substrate having a first main surface and a second main surface; a capacitance forming part facing the first main surface, the capacitance forming part having a conductive metal porous body, a dielectric film covering a surface of the metal porous body, and a conductive film covering the dielectric film; a first external connection line that includes a first via conductor penetrating the insulating substrate and connected to the conductive metal porous body; and a second external connection line that includes a second via conductor penetrating the insulating substrate, and an internal conductor covering the conductive film so as to fill a space inside the capacitance forming part, and the conductive film and the second via conductor are connected with at least the internal conductor interposed therebetween.

Description

TECHNICAL FIELD

The present invention relates to a capacitor including a capacitance forming part including a metal porous body, a dielectric film, and a conductive film.

BACKGROUND ART

For example, US 2018/0277306 A (Patent Document 1) discloses a capacitor including a capacitance forming part provided by a metal porous body, a dielectric film covering the surface of the metal porous body, and a conductive film covering the dielectric film. In the capacitor, the metal porous body is made of a sintered body of metal grains, and the dielectric layer and the conductive film are both formed by an atomic layer deposition (ALD) method.

SUMMARY OF THE INVENTION

In the capacitor disclosed in Patent Document 1, however, the conductive film of the capacitance forming part described above is very thin, thus reducing the sectional area of the conductive film, and a current flows through the conductive film, thereby causing the problem of increasing the so-called equivalent series resistance (ESR).

Accordingly, the present invention has been made to solve the problem mentioned above, and an object of the present invention is to achieve a reduction in ESR in a capacitor including a capacitance forming part including a metal porous body, a dielectric film, and a conductive film.

A capacitor according to the present invention includes: an insulating substrate having a first main surface and a second main surface opposite to the first main surface; a capacitance forming part facing the first main surface, the capacitance forming part comprising a conductive metal porous body, a dielectric film covering a surface of the metal porous body, and a conductive film covering the dielectric film; a first external connection line that comprises a first via conductor penetrating the insulating substrate from the first main surface so as to reach the second main surface and connected to the conductive metal porous body; and a second external connection line comprises a second via conductor penetrating the insulating substrate from the first main surface so as to reach the second main surface, and an internal conductor covering the conductive film so as to fill a space inside the capacitance forming part, and the conductive film and the second via conductor are connected with at least the internal conductor interposed therebetween.

In the capacitor according to the present invention, the second external connection line may include a columnar conductor protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part, and in this case, the internal conductor and the second via conductor are preferably connected with at least the columnar conductor interposed therebetween.

In the capacitor according to the present invention, the columnar conductor may extend in a normal direction of the first main surface, and in this case, as viewed in the normal direction of the first main surface, the columnar conductor may be overlapped with at least a part of the second via conductor.

In the capacitor according to the present invention, the capacitance forming part may include a first capacitance forming part and a second capacitance forming part stacked apart from each other in the normal direction of the first main surface, and in this case, the conductive film of the first capacitance forming part and the conductive film of the second capacitance forming part are preferably connected by the internal conductor and the columnar conductor.

In the capacitor according to the present invention, the internal conductor at a site located between the first capacitance forming part and the second capacitance forming part is preferably larger in thickness than the conductive film.

In the capacitor according to the present invention, the internal conductor at the site located between the first capacitance forming part and the second capacitance forming part may be three times or more as large in thickness as the conductive film.

In the capacitor according to the present invention, a support part that supports the capacitance forming part may be provided in the insulating substrate, with the support part protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part to be joined to the capacitance forming part.

In the capacitor according to the present invention, the support part may be a support conductor that forms part of the first external connection line, and in this case, the support conductor is preferably connected to the metal porous body.

In the capacitor according to the present invention, the support conductor may extend in the normal direction of the first main surface, and in this case, as viewed in the normal direction of the first main surface, the support conductor may be overlapped with at least a part of the first via conductor to be connected to the first via conductor.

In the capacitor according to the present invention, a support part that supports the capacitance forming part may be provided in the insulating substrate, with the support part protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part. In addition, the first external connection line may include a support conductor constituting the support part, and in this case, the support conductor is preferably connected to the metal porous body. In addition, the support conductor may extend in the normal direction of the first main surface, and in this case, as viewed in the normal direction of the first main surface, the support conductor may be overlapped with at least a part of the first via conductor. In addition, the capacitor according to the present invention may further include a sealing part provided on the first main surface, sealing the capacitance forming part, and defining an outer surface located on the side opposite to the side with the insulating substrate as viewed from the capacitance forming part. In this case, the support conductor may be exposed at the outer surface by penetrating the capacitance forming part and the sealing part, and the columnar conductor may be exposed at the outer surface by penetrating the capacitance forming part and the sealing part.

In the capacitor according to the present invention, the support conductor may extend in the normal direction of the first main surface, and in this case, as viewed in the normal direction of the first main surface, the support conductor does not have to be overlapped with the first via conductor.

In the capacitor according to the present invention, the support conductor preferably includes the same material as at least a part of the material included in the metal porous body.

In the capacitor according to the present invention, a support part that supports the capacitance forming part may be provided in the insulating substrate, with the support part protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part, and in this case, the first external connection line may include a support conductor constituting the support part. The support conductor may extend in the normal direction of the first main surface, and may be connected to the metal porous body, and further, as viewed in the normal direction of the first main surface, the support conductor may be overlapped with at least a part of the first via conductor. In addition, the capacitance forming part may include a first capacitance forming part and a second capacitance forming part stacked apart from each other in the normal direction of the first main surface. In this case, the metal porous body of the first capacitance forming part and the metal porous body of the second capacitance forming part may be connected by the support conductor, and the conductive film of the first capacitance forming part and the conductive film of the second capacitance forming part may be connected by the internal conductor and the columnar conductor.

The capacitor according to the present invention may further include a sealing part on the first main surface, sealing the capacitance forming part, and defining an outer surface located on the side opposite to the side with the insulating substrate as viewed from the capacitance forming part. In this case, the support conductor may be exposed at the outer surface by penetrating the capacitance forming part and the sealing part, and the columnar conductor may be exposed at the outer surface by penetrating the capacitance forming part and the sealing part.

In the capacitor according to the present invention, the first via conductor and the second via conductor are preferably both provided in a region where the capacitance forming part is disposed as viewed in the normal direction of the first main surface.

In the capacitor according to the present invention, pluralities of the first via conductors may be provided, and pluralities of the second via conductors may be provided.

In the capacitor according to the present invention, the pluralities of the first via conductors and the pluralities of the second via conductors may be arranged in an array when viewed in the normal direction of the first main surface, and in this case, at least one set of adjacent via conductors among the pluralities of the first via conductors and the pluralities of the second via conductors that are a shortest distance from each other differ in polarity from each other.

In the capacitor according to the present invention, the internal conductor preferably contains at least any one of Ag and a conductive polymer as a main material.

According to the present invention, a reduction in ESR is achieved in the capacitor including the capacitance forming part including the metal porous body, the dielectric film, and the conductive film.

BRIEF EXPLANATION OF THE DRAWINGS

FIG. 1 is a schematic front view of a capacitor according to a first embodiment.

FIG. 2 is a schematic bottom view of the capacitor illustrated in FIG. 1.

FIG. 3 is a schematic sectional view of the capacitor illustrated in FIG. 1.

FIG. 4 is an enlarged schematic sectional view of the vicinity of a second via conductor illustrated in FIG. 3.

FIG. 5 is an enlarged schematic sectional view of a part of an internal conductor illustrated in FIG. 3.

FIG. 6 is an enlarged schematic sectional view of the vicinity of a first main surface of an insulating substrate illustrated in FIG. 3.

FIG. 7 is an enlarged schematic sectional view of a part of a sealing part illustrated in FIG. 3.

FIG. 8 is a flowchart illustrating a method for manufacturing the capacitor according to the first embodiment.

FIG. 9 is a schematic sectional view illustrating a state after completing a step S4 of the manufacturing flow illustrated in FIG. 8.

FIG. 10 is a schematic sectional view for illustrating a step S5 of the manufacturing flow illustrated in FIG. 8.

FIG. 11 is a schematic sectional view for illustrating a step S6 of the manufacturing flow illustrated in FIG. 8.

FIG. 12 is a schematic sectional view for illustrating a step S7 of the manufacturing flow illustrated in FIG. 8.

FIG. 13 is a schematic sectional view for illustrating a step S8 of the manufacturing flow illustrated in FIG. 8.

FIG. 14 is a schematic sectional view for illustrating a step S9 of the manufacturing flow illustrated in FIG. 8.

FIG. 15 is a schematic sectional view for illustrating a step S10 of the manufacturing flow illustrated in FIG. 8.

FIG. 16 is a schematic sectional view for illustrating a step S11 of the manufacturing flow illustrated in FIG. 8.

FIG. 17 is a schematic sectional view for illustrating a step S12 of the manufacturing flow illustrated in FIG. 8.

FIG. 18 is a schematic sectional view for illustrating a step S13 of the manufacturing flow illustrated in FIG. 8.

FIG. 19 is a schematic sectional view for illustrating a step S14 of the manufacturing flow illustrated in FIG. 8.

FIG. 20 is a schematic sectional view for illustrating a step S15 of the manufacturing flow illustrated in FIG. 8.

FIG. 21 is a schematic sectional view for illustrating a step S16 of the manufacturing flow illustrated in FIG. 8.

FIG. 22 is a schematic sectional view for illustrating a step S17 of the manufacturing flow illustrated in FIG. 8.

FIG. 23 is a schematic sectional view for illustrating a step S18 of the manufacturing flow illustrated in FIG. 8.

FIG. 24 is a schematic sectional view illustrating one form of a columnar conductor in the capacitor illustrated in FIG. 3.

FIG. 25 is a schematic sectional view of a capacitor according to a first modification example.

FIG. 26 is a schematic sectional view of a capacitor according to a second modification example.

FIG. 27 is a schematic sectional view of a capacitor according to a third modification example.

FIG. 28 is a schematic sectional view of a capacitor according to a fourth modification example.

FIG. 29 is a schematic sectional view of a capacitor according to a second embodiment.

FIG. 30 is a flowchart illustrating a method for manufacturing the capacitor according to the second embodiment.

FIG. 31 is a schematic sectional view for illustrating a step S7 of the manufacturing flow illustrated in FIG. 30.

FIG. 32 is a schematic sectional view for illustrating a step S9 of the manufacturing flow illustrated in FIG. 30.

FIG. 33 is a schematic sectional view for illustrating a step S15B of the manufacturing flow illustrated in FIG. 30.

FIG. 34 is a schematic sectional view for illustrating a step S16 of the manufacturing flow illustrated in FIG. 30.

FIG. 35 is a schematic sectional view for illustrating a step S17 of the manufacturing flow illustrated in FIG. 30.

FIG. 36 is a schematic sectional view of a capacitor according to a third embodiment.

FIG. 37 is a flowchart illustrating a method for manufacturing the capacitor according to the third embodiment.

FIG. 38 is a schematic sectional view of a capacitor according to a fifth modification example.

FIG. 39 is an enlarged schematic sectional view of the vicinity of a second via conductor illustrated in FIG. 38.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. It is to be noted that in the following embodiments, the same or common parts are denoted by the same reference numerals in the drawings, and description thereof will not be repeated. In addition, while the terms of “positive electrode” and “negative electrode” are used in the following embodiments for convenience of description, the electric polarities of capacitors according to the following embodiments are not to be considered uniquely determined by these terms, and the electric polarities are determined appropriately depending on the use environments of the capacitors.

First Embodiment

FIG. 1 is a schematic front view of a capacitor according to a first embodiment, and FIG. 2 is a schematic bottom view of the capacitor viewed from the direction of an arrow II illustrated in FIG. 1. FIG. 3 is a schematic sectional view of the capacitor along a line III-III illustrated in FIG. 2, and FIG. 4 is an enlarged schematic sectional view of the vicinity of a second via conductor illustrated in FIG. 3. FIG. 5 is an enlarged schematic sectional view of a part of an internal conductor illustrated in FIG. 3, and FIG. 6 is an enlarged schematic sectional view of the vicinity of a first main surface of an insulating substrate illustrated in FIG. 3. FIG. 7 is an enlarged schematic sectional view of a part of a sealing part illustrated in FIG. 3. First, a configuration of a capacitor 1A according to the present embodiment will be described with reference to FIGS. 1 to 7.

As illustrated in FIGS. 1 to 3, the capacitor 1A has a flat and substantially rectangular parallelepiped outer shape, and is a so-called surface mount electronic component with a bottom surface configured as a mounting surface for a wiring board or the like. The capacitor 1A mainly includes an insulating substrate 10, a capacitance forming part 20, and a sealing part 30. In this regard, the capacitance forming part 20 is provided to face the insulating substrate 10. The capacitance forming part 20 is sealed by the insulating substrate 10 and the sealing part 30 provided on the insulating substrate 10 to be located inside the capacitor 1A.

In addition, the insulating substrate 10 is provided with a first via conductor 13, a second via conductor 14, a support conductor 15, a first bump 16, a second bump 17, an internal conductor 18, and a columnar conductor 19. The first via conductor 13, the second via conductor 14, the support conductor 15, the first bump 16, the second bump 17, the internal conductor 18, and the columnar conductor 19 constitute a pair of external connection lines as extended lines for electrically connecting the capacitance forming part 20 located inside the capacitor 1A to an external circuit. The pair of external connection lines includes a first external connection line as a positive electrode and a second external connection line as a negative electrode.

As illustrated in FIGS. 1 to 4 and 6, the insulating substrate 10 is made of a flat plate-like member having a first main surface 10a and a second main surface 10b located on the side opposite to the first main surface 10a. As the insulating substrate 10, a substrate that has an electrical insulation property is preferably used, and a substrate containing an inorganic material as a main component can be suitably used. More specifically, as the insulating substrate 10, for example, a substrate containing, as a main material, any of Si, Al₂O₃, ZrO₂, BN, Si₃N₄, AlN, MgO, Mg₂SiO₄, BaTiO₃, SrTiO₃, and CaTiO₃ can be used.

The thickness and size of the insulating substrate 10 are not particularly limited, but it is preferable to use, for example, an alumina substrate that has a rectangular shape of 5 μm to 50 μm in thickness and of 500 μm to 2000 μm on a side in plan view.

The insulating substrate 10 is provided with a plurality of first through-holes 11, and each of the plurality of first through-holes 11 penetrates the insulating substrate 10 so as to reach the second main surface 10b from the first main surface 10a. Each of the plurality of first through-holes 11 is filled with the first via conductor 13 (see FIG. 3). Each of the plurality of first via conductors 13 has, for example, a substantially columnar shape.

The insulating substrate 10 is provided with a plurality of second through-holes 12, and each of the plurality of second through-holes 12 penetrates the insulating substrate 10 so as to reach the second main surface 10b from the first main surface 10a. Each of the plurality of second through-holes 12 is filled with the second via conductor 14 (see FIG. 3). Each of the plurality of second via conductors 14 has, for example, a substantially columnar shape.

Each of the plurality of first via conductors 13 constitutes a part of the first external connection line described above. Each of the plurality of second via conductors 14 constitutes a part of the second external connection line described above. More specifically, the plurality of first via conductors 13 and the plurality of second via conductors 14 respectively constitute the first external connection line and second external connection line that differ in polarity.

In this regard, according to the present embodiment, as viewed in the normal direction of the first main surface 10a of the insulating substrate 10, the first via conductors 13 and the second via conductors 14 are all provided in a region where the capacitance forming part 20 is disposed (that is, a region indicated by a broken line in FIG. 2).

In addition, according to the present embodiment, four first via conductors 13 and five second via conductors 14 are provided in the insulating substrate 10, and thus the nine via conductors in total penetrate the insulating substrate 10. The nine via conductors are arranged in an array in a layout of three rows and three columns. In this regard, one of the via conductors differs in polarity from the via conductors adjacent thereto at the shortest distance. It is to be noted that the number and arrangement of the first via conductors 13 and second via conductors 14 are not particularly limited thereto.

The first via conductors 13 and the second via conductors 14 can be made of various wiring materials, and are preferably made of a metal material that has a particularly high electrical conductivity. The materials of the first via conductors 13 and second via conductors 14 can be, for example, a metal material containing, as a main material, any of Ni, Ag, Cu, Au, Pt, Mo, and W, and is preferably Cu. In this regard, the materials of the first via conductors 13 and second via conductors 14 can be appropriately changed depending on the environment for mounting the capacitor 1A according to the present embodiment, and the material of the first via conductors 13 are not necessarily the same as the material of the second via conductors 14. According to the present embodiment, the first via conductors 13 and second via conductors 14 made of Ni are used.

Further, the second via conductors 14 may be formed together with the columnar conductor 19, which will be described later, by a thick film forming method such as electrolytic plating or a screen printing method. In this case, the material of the second via conductors 14 is the same as the material of the columnar conductor 19, which will be described later.

The axial lengths and the sizes of the first via conductors 13 and second via conductor 14 are not to be considered particularly limited, and are appropriately set depending on the thickness and the size of the insulating substrate 10. In this regard, the axial lengths of the first via conductors 13 and the second via conductors 14 are preferably, for example, 5 μm to 50 μm, and the diameters thereof are preferably, for example, 15 μm to 150 μm.

As illustrated in FIG. 3, the insulating substrate 10 is provided with a plurality of substantially columnar support conductors 15 protruding from the first main surface 10a toward the capacitance forming part 20 and surrounded by the capacitance forming part 20. Each of the plurality of support conductors 15 configured as described above is joined to the capacitance forming part 20 to function as a support part that supports the capacitance forming part 20. More specifically, providing the plurality of support conductors 15 as support parts will allow the insulating substrate 10 to be kept from being warped by the stress generated in the process of manufacturing the capacitor 1A, and this matter will be described later.

In addition, each of the plurality of support conductors 15 extends in the normal direction of the first main surface 10a, and is arranged to overlap each of the plurality of first via conductors 13 as viewed in the normal direction. Thus, the support conductors 15 are connected to the first via conductors 13.

In this regard, each of the plurality of support conductors 15 is preferably disposed so as to be substantially coaxial with each of the plurality of first via conductors 13. In addition, for the plurality of support conductors 15, the section for each thereof, orthogonal to the normal direction of the first main surface 10a, is preferably configured to be larger than the section of the corresponding first via conductor 13. For that reason, the diameter of each of the plurality of support conductors 15 is preferably, for example, 15 μm to 100 μm.

With such a configuration, if each of the plurality of support conductors 15 is not disposed perfectly coaxially with each of the plurality of first via conductors 13 due to the shifted position at which each of the plurality of support conductors 15 is formed, each of the plurality of support conductors 15 can be arranged to overlap with a part of each of the plurality of first via conductors 13, as viewed in the normal direction of the first main surface 10a. Thus, the foregoing allows each of the plurality of support conductors 15 to be reliably connected to each of the plurality of first via conductors 13.

The axial length of the support conductor 15 is not to be considered particularly limited, and is appropriately set depending on the thickness of the capacitance forming part 20, but preferably has an axial length enough to penetrate the capacitance forming part 20 in the thickness direction. Further, as will be described later, when the capacitance forming part 20 includes a plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a, it is necessary to have an axial length enough to be joined to at least a part of a layer (that is, a first capacitance forming part 20a in FIG. 3) located farthest from the first main surface 10a. For example, the lower limit of the axial length of the plurality of support conductors 15 is 15 μm, and the upper limit thereof is preferably a length obtained by subtracting 20 μm from the thickness of the capacitor 1A.

The support conductors 15 preferably include the same material as at least a part of the material included in a metal porous body 21, which will be described later. The material of the support conductors 15 can be a metal material containing, for example, any of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au, and Ag as a main material. In addition, the support conductors 15 may be made of an alloy material containing, as main components, two or more selected from these metal materials. According to the present embodiment, the support conductors 15 made of Ni are used.

It is to be noted that the outer shape of the support conductor 15 in plan view is not to be considered limited to a substantially circular shape, and may be, for example, a substantially elliptical shape or the like. In addition, the support conductor 15 may extend in a direction considerably tapered with respect to the normal direction of the first main surface 10a.

The internal conductor 18 is continuously formed so as to cover a conductive film 23, which will be described later, constituting the capacitance forming part 20. More specifically, the internal conductor 18 covers the conductive film 23 that defines the internal space so as to fill the internal space of the capacitance forming part 20, and covers the conductive film 23 that covers the outer surface of the capacitance forming part 20 and the tips of the support conductors 15. In addition, the internal conductor 18 covers the conductive film 23 that covers the first main surface 10a of the insulating substrate 10.

Furthermore, as illustrated in FIG. 4, the internal conductor 18 covers the conductive film 23 that covers the surface of the insulating substrate 10 in sections that define the second through-holes 12 provided in the insulating substrate 10. More specifically, at a boundary part between the second via conductor 14 and the substrate of the insulating substrate 10, the substrate of the insulating substrate 10 is covered with a dielectric film 22, which will be described later, the dielectric film 22 is covered with the conductive film 23, and the conductive film 23 is further covered with the internal conductor 18. Furthermore, the internal conductor 18 is covered with the second via conductor 14, and thus, the internal conductor 18 is directly connected to the second via conductor 14.

In addition, as illustrated in FIG. 3, the internal conductor 18 also covers the surface of each of a plurality of columnar conductors 19, which will be described later, and thus, the conductive film 23 is connected to the second via conductor 14 with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween.

The thickness of the internal conductor 18 is not to be considered particularly limited as long as the internal conductor is thicker than the conductive film 23, but is considered preferably 30 μm or more, more preferably 200 μm or more. It is to be noted that, for convenience of drawing, in FIGS. 3 to 6 and the like, the internal conductor 18 is drawn so as to include a section that is extremely different in thickness, and thus, the thickness of a part of the internal conductor 18 (for example, the vicinity of the second via conductor 14 or the like) is about the same as the thickness of the conductive film 23, but actually, the conductive film 23 and the internal conductor 18 have thicknesses with a considerable difference therebetween as described above (the same applies to FIGS. 19 to 29, FIGS. 33 to 36, and FIGS. 38 and 39, which will be described later).

In the case of the configuration as mentioned above, the conductive film 23 and the second via conductor 14 are connected with the internal conductor 18 interposed therebetween. Thus, the ESR of the capacitor 1A will be reduced, and details thereof will be described later.

Furthermore, the internal conductor 18 is formed so as to fill a space provided between the layers of the plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a, which will also reduce the ESR of the capacitor 1A, and details thereof will be also described later.

In addition, the formation of the internal conductor 18 as described above will cause each layer of the capacitance forming part 20 to be held by the internal conductor 18 buried between the layers. Thus, the mechanical strength of the capacitance forming part 20 can be increased.

As the internal conductor 18, for example, at least any of metal materials such as Ag and conductive polymers can be employed as a main material. In addition, the internal conductor 18 may be made of an alloy material containing, as main components, two or more selected from these metal materials. According to the present embodiment, the internal conductor 18 made of Ag is used.

The internal conductor 18 can be formed by, for example, a chemical vapor deposition (CVD: Chemical Vapor Deposition) method, an atomic layer deposition (ALD) method, a pulsed laser deposition (PLD: Pulsed Laser Deposition) method, a plating method, a bias sputtering method, a sol-gel method, a method of using conductive polymer filling, or a method of using a supercritical fluid.

Further, the thickness of the internal conductor 18 is measured by, for example, observing a section orthogonal to the extending direction of the first main surface 10a of the insulating substrate 10 with the use of a scanning electron microscope.

Specifically, when the longitudinal direction of the capacitor 1A in a plan view of the capacitor 1A, the lateral direction thereof, and the thickness direction (that is, the normal direction of the first main surface 10a) of the capacitor 1A are denoted respectively by Lx, Ly, and Lz, first, the capacitor 1A is subjected to a polishing treatment so as to expose a Lx-Lz section of a part of the capacitor 1A located at the center in the Ly direction. The polishing treatment is performed such that the exposed section is located within an error range of ±100 μm in the Ly direction with the central position as a reference.

Next, the exposed section is observed. The observation range of the section in the Lx direction is a range of ±50 μm with the center position of the section in the Lx direction as a reference, and the observation range of the section in the Lz direction is a range between the layer located closest to the first main surface 10a and the layer adjacent thereto among the plurality of capacitance forming parts stacked apart from each other in the Lz direction.

In measuring the thickness of the internal conductor 18, first, the element of a material that defines the internal conductor 18 is subjected to mapping by energy dispersive X-ray spectroscopy in a sectional image at a magnification of 100,000 times, obtained with a scanning electron microscope, and then subjected to imaging. Next, the mapping image is subjected to binarization processing. Next, in the binarized image, the thickness of the internal conductor 18 in the Lz direction is measured at hundred sites at a pitch of 10 nm in the Lx direction, and the average value thereof is calculated. The average value calculated in this manner is the thickness of the internal conductor 18. In this regard, in FIG. 5, three of the thicknesses of the internal conductor 18 in the Lz direction, measured at the hundred sites, are illustrated as line segment lengths a1, a2, and a3. It is to be noted that FIG. 5 is an enlarged schematic view of a part of the internal conductor 18 for describing the measurement of the thickness of the internal conductor 18, and is not intended to illustrate the above-described mapping image or binarized image.

The insulating substrate 10 is further provided with a plurality of substantially columnar conductors 19 protruding from the first main surface 10a toward the capacitance forming part 20 and surrounded by the capacitance forming part 20 with the internal conductor 18 interposed therebetween.

As described above, the surface of each of the plurality of columnar conductors 19 is covered with the internal conductor 18, and thus, is connected to the internal conductor 18.

In addition, each of the plurality of columnar conductors 19 extends in the normal direction of the first main surface 10a, and is arranged to overlap with each of the plurality of second via conductors 14, as viewed in the normal direction of the first main surface 10a. Thus, each of the plurality of columnar conductors 19 is, at the end thereof on the side with the insulating substrate 10, connected to the second via conductor 14.

In the case of such a configuration, the conductive film 23 and the second via conductor 14 are connected not only with the internal conductor 18 interposed therebetween as described above, but also with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween. More specifically, the internal conductor 18 and the second via conductor 14 are not only directly connected, but also connected with the columnar conductor 19 interposed therebetween.

Thus, the above-described second external connection line as a negative electrode is connected to the capacitance forming part 20 with the second via conductor 14, the internal conductor 18, and the columnar conductor 19 interposed therebetween. Thus, the ESR of the capacitor 1A will be reduced, and details thereof will be described later.

In this regard, each of the plurality of columnar conductors 19 is preferably disposed so as to be substantially coaxial with each of the plurality of second via conductors 14. In addition, for the plurality of columnar conductors 19, the section for each thereof, orthogonal to the normal direction of the first main surface 10a, is preferably configured to be larger than the section of the corresponding second via conductor 14. For that reason, the diameter of each of the plurality of columnar conductors 19 is preferably, for example, 15 μm to 150 μm.

With such a configuration, if each of the plurality of columnar conductors 19 is not disposed perfectly coaxially with each of the plurality of second via conductors 14 due to the shifted position at which each of the plurality of columnar conductors 19 is formed, each of the plurality of columnar conductors 19 can be arranged to overlap with a part of each of the plurality of second via conductors 14, as viewed in the normal direction of the first main surface 10a. Thus, the foregoing allows each of the plurality of columnar conductors 19 to be reliably connected to each of the plurality of second via conductors 14.

The axial length of the columnar conductor 19 is not to be considered particularly limited, and is appropriately set depending on the thickness of the capacitance forming part 20, but preferably has an axial length enough to penetrate the capacitance forming part 20 in the thickness direction. Further, as will be described later, when the capacitance forming part 20 includes a plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a, it is necessary to have an axial length enough to be joined to at least a part of a layer (that is, a first capacitance forming part 20a in FIG. 3) located farthest from the first main surface 10a. For example, the lower limit of the axial length of the plurality of columnar conductors 19 is 15 μm, and the upper limit thereof is preferably a length obtained by subtracting 20 μm from the thickness of the capacitor 1A.

The columnar conductors 19 preferably include the same material as at least a part of the material included in the metal porous body 21, which will be described later. The material of the columnar conductors 19 can be a metal material containing, for example, any of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au, and Ag as a main material. In addition, the columnar conductors 19 may be made of an alloy material containing, as main components, two or more selected from these metal materials.

Further, the columnar conductors 19 may be formed together with the second via conductors 14 by a thick film forming method such as electrolytic plating or a screen printing method. In that case, the material of the material of the columnar conductor 19 is the same as the second via conductors 14. According to the present embodiment, the second via conductors 14 and columnar conductor 19 made of Ni are both formed by electrolytic plating.

It is to be noted that the outer shape of the columnar conductor 19 in plan view is not to be considered limited to a substantially circular shape, and may be, for example, a substantially elliptical shape or the like. In addition, the columnar conductor 19 may extend in a direction considerably tapered with respect to the normal direction of the first main surface 10a.

The support conductor 15 described above constitutes a part of the first external connection line described above, and the internal conductor 18 and the columnar conductor 19 constitute a part of the second external connection line described above. More specifically, the support conductor 15, and the internal conductor 18 and the columnar conductor 19 respectively constitute the first external connection line and the second external connection line that differ in polarity.

As illustrated in FIGS. 1 to 3, a plurality of first bumps 16 are provided on the second main surface 10b of the insulating substrate 10 so as to cover the plurality of first via conductors 13. The plurality of first bumps 16 serve as joining materials for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and electrically connecting the capacitance forming part 20 of the capacitor 1A to an external circuit, and are provided to protrude from the second main surface 10b of the insulating substrate 10. The shape of each of the plurality of first bumps 16 is substantially hemispherical.

A plurality of the second bumps 17 are provided on the second main surface 10b of the insulating substrate 10 so as to cover the plurality of second via conductors 14. The plurality of second bumps 17 serve as joining materials for mounting the capacitor 1A as a surface mount electronic component on a wiring board or the like and electrically connecting the capacitance forming part 20 of the capacitor 1A to an external circuit, and are provided to protrude from the second main surface 10b of the insulating substrate 10. The shape of each of the plurality of second bumps 17 is substantially hemispherical.

Each of the plurality of first bumps 16 constitutes a part of the first external connection line described above. Each of the plurality of second bumps 17 constitutes a part of the second external connection line described above. More specifically, the plurality of first bumps 16 and the plurality of second bumps 17 respectively constitute the first external connection line and the second external connection line that differ in polarity.

The first bumps 16 and the second bumps 17 can be made of various wiring materials, and are preferably made of a metal material that as a particularly high electrical conductivity. The material of the first bumps 16 and the material of the second bumps 17 can be, for example, a metal material containing, as a main material, any of Ni, Ag, Cu, Au, and Sn. According to the present embodiment, the first bumps 16 and the second bumps 17 made of Au are used.

The sizes of the first bumps 16 and second bumps 17 are not to be considered particularly limited, and are appropriately set depending on the sizes of the first via conductors 13 and second via conductors 14.

As described above, the first external connection line as a positive electrode of the pair of external connection lines is composed of the first via conductors 13, the support conductors 15, and the first bumps 16, whereas the second external connection line as a negative electrode of the pair of external connection lines is composed of the second via conductors 14, the internal conductor 18, the columnar conductors 19, and the second bumps 17.

As illustrated in FIG. 3, the capacitance forming part 20 is provided so as to face the insulating substrate 10, and includes the metal porous body 21 with a plurality of fine pores therein, the dielectric film 22 covering the surface of the metal porous body 21, and the conductive film 23 further covering the surface of the dielectric film 22.

It is to be noted that while the capacitance forming part 20 is provided so as to face the insulating substrate 10, the capacitance forming part 20 is not substantially directly joined to the insulating substrate 10, or if directly joined, is only slightly joined thereto. In this regard, the state in which the capacitance forming part 20 is only slightly joined to the insulating substrate 10 means a state in which a part of the capacitance forming part 20 is joined to the insulating substrate 10 at a predetermined ratio or less. More specifically, the state in which the capacitance forming part 20 is only slightly joined to the insulating substrate 10 means that, as illustrated in FIG. 6, when an arbitrary region on the first main surface 10a of the insulating substrate 10 is viewed in a section orthogonal to the extending direction of the first main surface 10a of the insulating substrate 10, the sum (that is, the line segment length d1+d2 in the example illustrated in FIG. 6) of line segment lengths parallel to the first main surface 10a, of a part where the metal porous body 21 is joined directly to the insulating substrate 10 or indirectly thereto with the dielectric film 22 or the conductive film 23 interposed therebetween in the arbitrary region, is 30% or less of the total line segment length (that is, the line segment length c in the example illustrated in FIG. 6) of the first main surface in the arbitrary region.

In addition, as illustrated in FIG. 3, the capacitance forming part 20 includes a plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a. It is to be noted that the number of layers of the capacitance forming parts stacked is not to be considered particularly limited, and is appropriately set depending on a desired capacitance. The capacitance forming part 20 according to the present embodiment is composed of three layers, and the three layers will be referred to as a first capacitance forming part 20a, a second capacitance forming part 20b, and a third capacitance forming part 20c in order from a layer located farthest from the first main surface 10a for convenience of description.

At least a part of the plurality of fine pores provided inside the metal porous body 21 is not closed by the metal porous body itself, and preferably, most or all of the plurality of fine pores provided inside the metal porous body are not closed by the metal porous body itself. Such a metal porous body is made of, for example, a sintered body of metal grains.

The metal porous body 21 is located so as to surround the support conductors 15 on a part of the insulating substrate 10 excluding an edge of the first main surface 10a. The metal porous body 21 configured as described above is subjected to firing together with the support conductors 15 including the same material as at least a part of the material included in the metal porous body 21 in the step of forming the metal porous body.

Thus, the metal porous body 21 will be joined to the support conductors 15. More specifically, in the capacitor 1A according to the present embodiment, the metal porous body 21 of the first capacitance forming part 20a, the metal porous body 21 of the second capacitance forming part 20b, and the metal porous body 21 of the third capacitance forming part 20c will be connected by the support conductor 15. Therefore, the above-described first external connection line as a positive electrode is connected to the capacitance forming part 20 with the support conductors 15 interposed therebetween.

The metal porous body 21 can be made of various conductive metal materials, and is preferably made of a metal material containing, as a main material, any of Ni, Mo, W, Al, Ti, Ta, Nb, Cu, Pt, Au, and Ag. In addition, the metal porous body 21 may be made of an alloy material containing, as main components, two or more selected from these metal materials. According to the present embodiment, the metal porous body 21 made of Ni is used.

The thickness and size of the metal porous body 21 are not to be considered particularly limited, and in particular, the size is appropriately set depending on the size of the insulating substrate 10.

In this regard, as described above, the metal porous body 21 is preferably made of a sintered body of metal grains. In that case, metal grains that have various shapes such as a spherical shape, an elliptical spherical shape, a flat shape, a plate shape, and a needle shape can be used. In addition, the grain sizes of the metal grains are not to be considered particularly limited, but the average grain size thereof is preferably 600 nm or less, more preferably 20 nm to 500 nm.

The dielectric film 22 covers the surface of the metal porous body 21 as described above. More specifically, the dielectric film 22 covers not only the surface of the metal porous body 21 of a part located on the outermost side of the capacitance forming part 20, but also the surface defined by the above-described fine pores that are not closed by the metal porous body itself, of the surface of the metal porous body 21 of a part located inside the capacitance forming part 20. In addition, the dielectric film 22 also covers the surfaces of the support conductors 15.

The dielectric film 22 can be made of various insulating materials, and can be made of, for example, a metal oxide such as AlO_x, SiO_x, HfO_x, TiO_x, TaO_x, ZrO_x, SiAlO_x, HfAlO_x, ZrAlO_x, AlTiO_x, SrTiO_x, HfSiO_x, ZrSiO_x, TiZrO_x, TiZrO_x, TiZrWO_x, SrTiO_x, BaTiO_x, PbTiO_x, BaSrTiO_x, and BaCaTiO_x, a metal nitride such as AlN_x, SiN_x, and AlScN_x, and a metal oxynitride such as AlO_xN_y, SiO_xN_y, HfO_xN_y, and SiC_xO_yN_z. Among the materials, the dielectric film 22 is preferably made of any of AlO_x (for example, Al₂O₃), SiO_x (for example, SiO₂), HfO_x, TiO_x, SiAlO_x, HfAlO_x, ZrAlO_x, HfSiO_x, and ZrSiO_x. It is to be noted that the chemical formulas mentioned above are merely intended to represent the constitutions of the materials, and are not intended to limit the composition. More specifically, x, y, and z attached to O and N may be any value larger than 0, and the abundance ratios of the respective elements including the metal elements are arbitrary. In addition, the dielectric film 22 may be made of a laminated film including a plurality of dielectric layers that differ in material. According to the present embodiment, the dielectric film 22 made of AlSiO nm is used.

The dielectric film 22 can be preferably formed by a gas phase method, for example, a vacuum deposition method, a CVD method, a sputtering method, an ALD method, a PLD method, or the like, or a method of using a supercritical fluid, and is particularly preferably formed by an ALD method.

The thickness of the dielectric film 22 is not to be considered particularly limited, but is preferably 3 nm to 100 nm, more preferably 5 nm to 50 nm.

The conductive film 23 covers the surface of the dielectric film 22 as described above. More specifically, the conductive film 23 covers not only the surface of the dielectric film 22 of the part located on the outermost side of the capacitance forming part 20, but also the surface of the dielectric film 22 of the part located inside the capacitance forming part 20. In addition, the conductive film 23 also covers the surface of the dielectric film 22 covering the surfaces of the support conductors 15.

The conductive film 23 can be made of various conductive materials, and can be made of a metal material containing, as a main material, any of Ni, Cu, Ru, Al, W, Ti, Ag, Au, Zn, Ta, and Nb, an alloy material containing, as main components, two or more selected from these metal materials, a metal nitride such as TiN, TiAlN, TiSiN, TaN, NbN, and WN, a metal oxynitride such as TiON or TiAlON, a conductive polymer such as poly(3,4-ethylenedioxythiophene) (PEDOT), polypyrrole, and polyaniline, or a conductive oxide film such as RuO₂, ZnO, (Zn, Al)O, and NiO. Among these materials, the conductive film 23 is preferably made of TiN or an oxide semiconductor such as TION, ZnO, and RuO. According to the present embodiment, the conductive film 23 made of TiN is used.

The conductive film 23 can be preferably formed by a CVD method, an ALD method, a PLD method, a plating method, a bias sputtering method, a sol-gel method, a method of using conductive polymer filling, or a method of using a supercritical fluid, and is particularly preferably formed by an ALD method. In addition, the conductive film 23 may be made of a laminated film including a plurality of dielectric layers that differ in material. In that case, after film formation is performed by an ALD method, film formation can be performed by another method.

The thickness of the conductive film 23 is not to be considered particularly limited, but is preferably 3 nm or more, more preferably 10 nm or more.

In this regard, as described above, the capacitance forming part 20 includes a plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a, and the internal conductor 18 is formed so as to fill the space provided between these layers.

Forming the internal conductor 18 in this manner will cause the conductive film 23 of the first capacitance forming part 20a, the conductive film 23 of the second capacitance forming part 20b, and the conductive film 23 of the third capacitance forming part 20c to be connected by the internal conductor 18.

The thickness of the internal conductor 18 of the part located between the first capacitance forming part 20a and the second capacitance forming part 20b is preferably made larger than the thickness of the conductive film 23, more preferably, the thickness of the internal conductor 18 is preferably made two times or more as large as the thickness of the conductive film, still more preferably, three times or more as large as the thickness, still more preferably ten times or more as large as the thickness, still more preferably hundred times or more as large as the thickness. Further, this configuration is also the same for the thickness of the internal conductor 18 of the part located between the second capacitance forming part 20b and the third capacitance forming part 20c.

With such a configuration, the ESR of the capacitor 1A will be reduced, and details thereof will be described later.

As illustrated in FIGS. 1 and 3, the sealing part 30 is provided on the first main surface 10a of the insulating substrate 10 to seal together with the insulating substrate 10, the capacitance forming part 20, and define an outer surface 30a located on the side opposite to the side with the insulating substrate 10 as viewed from the capacitance forming part 20. More specifically, the sealing part 30 is located so as to cover the upper side, lateral side, and lower side of the capacitance forming part 20 provided so as to face the first main surface 10a of the insulating substrate 10, and is, when the space inside the capacitance forming part 20 is not perfectly filled with the internal conductor 18, further located so as to embed a space that is not filled with the internal conductor 18 in the space.

The sealing part 30 can be made of various insulating materials, and is preferably made of an insulating material that is excellent in weather resistance. The material of the sealing part 30 can be, for example, a resin material such as a polyimide resin, a polybenzoxazole resin, a polyethylene terephthalate resin, a benzocyclobutene resin, or an epoxy resin. In addition, the resin material can contain various additives, and may contain therein an SiO₂ filler, an Al₂O₃ filler, or the like, for example, for adjusting the thermal expansion coefficient. According to the present embodiment, the sealing part 30 made of an epoxy resin is used.

Further, when it is difficult to secure moisture resistance only with the sealing part 30, a moisture-resistant protective film may be formed between the capacitance forming part 20 and the sealing part 30. For example, before forming the sealing part 30, the moisture-resistant protective film can be formed by providing an inorganic insulator made of SiN, SiO₂, Al₂O₃, HfO₂, ZrO₂, or the like by a CVD method, an ALD method, or the like so as to cover the capacitance forming part 20, or by providing an organic insulator with water repellency, such as a fluorine-based resin or a silane coupling agent resin, so as to cover the capacitance forming part 20. In this regard, the moisture-resistant protective film does not necessarily have to be formed inside of the capacitance forming part 20, and it is sufficient for the film to be formed to cover only the outer surface.

The sealing part 30 can be formed by various coating methods, and for example, a method using a vacuum laminator, a method using an air dispenser, a method using a jet dispenser, a screen printing method, a vacuum printing method, an electrostatic coating method, an inkjet method, a photolithography method, or the like can be used.

The thickness and size of the sealing part 30 are not to be considered particularly limited, and the size is appropriately set depending on the size of the insulating substrate 10. In this regard, the thickness of the sealing part 30 is preferably, for example, 5 μm to 50 μm, and the size is preferably, for example, such a size that covers the entire surface of the first main surface 10a of the insulating substrate 10.

The thickness of the sealing part 30 described above is measured, for example, by observing a section orthogonal to the extending direction of the first main surface 10a of the insulating substrate 10 with the use of an optical microscope.

Specifically, when the longitudinal direction of the capacitor 1A in a plan view of the capacitor 1A, the lateral direction thereof, and the thickness direction (that is, the normal direction of the first main surface 10a) of the capacitor 1A are denoted respectively by Lx, Ly, and Lz, first, the capacitor 1A is subjected to a polishing treatment so as to expose a Lx-Lz section of a part of the capacitor 1A located at the center in the Ly direction. The polishing treatment is performed such that the exposed section is located within an error range of ±100 μm in the Ly direction with the central position as a reference.

Next, a part in the vicinity of the outer surface 30a in the exposed section is observed at a magnification of 1000 times with the use of an optical microscope. The observation range of the section in the Lx direction is a range of ±50 μm with center position of the section in the Lx direction as a reference, and is a range in which neither the support conductor 15 nor the columnar conductor 19 is provided.

Next, in the observation range of the section, the thickness of the sealing part 30 in the Lz direction is measured at ten sites at equal intervals in the Lx direction, and the average value thereof is calculated. The average value calculated in this manner is the thickness of the sealing part 30. In this regard, in FIG. 7, three of the thicknesses of the sealing part 30 in the Lz direction, measured at the ten sites, are illustrated as line segment lengths e1, e2, and e3.

With the foregoing configuration, in the capacitor 1A according to the present embodiment, the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23 is sealed by the insulating substrate 10 and the sealing part 30, and an electrical extension from the capacitance forming part 20 is achieved by the pair of external connection lines.

FIG. 8 is a flowchart illustrating a method for manufacturing the capacitor according to the present embodiment. FIGS. 9 to 23 are schematic sectional views for illustrating respective steps of the manufacturing flow illustrated in FIG. 8. Next, an example of a specific manufacturing method for manufacturing the capacitor 1A according to the present embodiment described above will be described with reference to FIGS. 8 to 23.

The method for manufacturing the capacitor 1A as described below is a method for simultaneously mass-producing a plurality of capacitors 1A by collectively performing treatments for processing up to a middle stage of the manufacturing process to produce an assembly of capacitors in process, thereafter dividing the assembly into individual pieces, and further applying treatments for processing to the individual pieces in process.

First, as illustrated in FIG. 8, in a step S1, a green sheet is produced. Specifically, an Al₂O₃ powder and glass powder are weighed, and the Al₂O₃ powder and the glass powder, an organic solvent such as toluene or ethanol, and a binder such as polyvinyl butyral are mixed. Thereafter, the mixture is formed into a sheet shape, thereby producing a green sheet as a base for the insulating substrate. It is to be noted that after the production of the green sheet, the green sheet is cut to prepare a plurality of green sheets.

Next, as illustrated in FIG. 8, in a step S2, first through-holes and second through-holes are formed in a part of the plurality of green sheets. Specifically, at predetermined positions of the green sheet, the first through-holes to be filled later with a first via conductor that is a part of a positive electrode is provided, and the second through-holes to be filled later with a second via conductor that is a part of a negative electrode is provided.

In this regard, a method for forming the first through-holes and the second through-holes is not to be considered particularly limited, but for example, the first through-hole and the second through-hole can be formed by irradiating the green sheet with laser light. In addition, the first through-holes and the second through-holes may also be formed by processing with a mechanical puncher used or sandblasting.

Next, as illustrated in FIG. 8, in a step S3, the first via conductor is formed in the green sheet with the first through-holes and second through-holes formed. Specifically, a conductive paste is applied to the green sheet so as to embed the first through-holes. It is to be noted that in that regard, the second through-holes are not filled with the conductive paste.

In this regard, the method for applying the conductive paste is not to be considered particularly limited, but for example, a screen printing method can be used.

Next, as illustrated in FIG. 8, in a step S4, the green sheet is subjected to firing. Specifically, the green sheet without the first through-holes, the second through-holes, or the like provided is stacked on the green sheet with the conductive paste applied thereto in the step S3, and the stacked green sheets are subjected to pressure bonding. Then, the laminate of the green sheets subjected to the pressure bonding is subjected to a degreasing treatment, and then the laminate of the green sheets subjected to the degreasing treatment is subjected to firing.

In this regard, in stacking the green sheets, the green sheet without the first through-holes, the second through-holes, or the like provided is stacked on the other main surface facing the one main surface of the green sheet with the conductive paste applied thereto. In addition, in pressure-bonding the green sheets, for example, a uniaxial pressing machine can be used. Furthermore, the green sheets are subjected to firing, for example, under a temperature condition of 700° C. to 1000° C. in an air atmosphere.

Through the steps S1 to S4 described above, the insulating substrate as illustrated in FIG. 9 is obtained. In this regard, the insulating substrate is a so-called multiple substrate where insulating substrates to be finally included respectively in a plurality of capacitors are connected in a matrix, but in FIG. 9, attention is focused on only one of insulating substrates 10, and the peripheral part thereof is illustrated to be omitted by broken lines.

In addition, in the foregoing description, a case in which the first through-holes and the second through-holes are formed in the step S2, and then, the first via conductor is provided in the step S3 has been exemplified, but only the first through-hole may be formed first, and the second through-holes may be formed after the formation of the first via conductor.

In addition, in the foregoing description, a case where the green sheets and the conductive paste are simultaneously subjected to firing has been described as an example, but the first via conductor and the second through-holes may be provided after firing the insulating substrate without the through-hole or the like provided. In that case, the first through-holes and the second through-holes may be provided in the fired insulating substrate by, for example, a sandblasting method, a wet etching method, a dry etching method, or the like, and then, the conductive paste may be applied, and subjected to firing. In addition, the first via conductor may be formed by sputtering, vapor deposition, plating, or the like.

Next, as illustrated in FIG. 8, in a step S5, a conductive paste layer for forming the metal porous body 21 is applied. More specifically, as illustrated in FIG. 10, a conductive paste layer 21p for forming the metal porous body 21 described later is applied onto the first main surface 10a of the insulating substrate 10.

In this regard, before applying the conductive paste for the formation of the metal porous body 21, the second through-holes 12 provided in the insulating substrate 10 is preferably provided with a blocking part that blocks the second through-holes 12 by applying an epoxy resin or the like (not illustrated). This is for preventing the conductive paste from entering the inside of the second through-holes 12.

Next, conductive metal particles 21a, and a binder 21b including an organic solvent such as terpineol and a varnish of ethyl cellulose are weighed and mixed, and based on the mixture, the conductive paste is prepared by using a roll machine. The conductive paste thus prepared is applied onto the first main surface 10a of the insulating substrate 10 so as to have a rectangular pattern shape in plan view as a whole, and dried. According to the present embodiment, the conductive paste containing the metal particles 21a made of Ni is used.

In this case, the conductive paste is overapplied multiple times, and thus, the conductive paste is applied onto the insulating substrate 10 so as to form a layer with a predetermined thickness. The individual conductive pastes applied onto the insulating substrate 10 serve as the metal porous body 21 described above through a firing step, which will be described later. In this regard, in the following description, the layered conductive paste including the metal particles 21a and the binder 21b, formed in this manner, is referred to as a conductive paste layer 21p.

Next, as illustrated in FIG. 8, in a step S6, a resin paste layer is applied. More specifically, as illustrated in FIG. 11, a resin paste layer 21c is further applied onto the conductive paste layer 21p formed in the sheet shape on the first main surface 10a of the insulating substrate 10, so as to have a rectangular shape in plan view as a whole, and dried.

The resin paste layer 21c is intended to partition a plurality of conductive paste layers 21p, which will be described later, and disappear in the firing step, which will be described later, and is made of, for example, an acrylic resin, polyvinyl butyral (PVB), or the like. According to the present embodiment, the resin paste layer 21c made of an acrylic resin is used.

Next, as illustrated in FIG. 8, in a step S7, the conductive paste layer and the resin paste layer are further laminated. More specifically, as illustrated in FIG. 12, on the conductive paste layer 21p and resin paste layer 21c already applied onto insulating substrate 10, the conductive paste layer 21p and the resin paste layer 21c are further laminated so as to be alternately disposed in the normal direction of the first main surface 10a. Thus, a laminate including the plurality of conductive paste layers 21p and a plurality of resin paste layers 21c is formed on the insulating substrate 10.

In this regard, according to the present embodiment, the laminate described above includes three conductive paste layers 21p in total and two resin paste layers 21c in total, but the numbers of conductive paste layers 21p and the resin paste layers 21c are not to be considered particularly limited, and are appropriately set depending on a desired capacitance.

In addition, according to the present embodiment, the layer located farthest from the first main surface 10a of the insulating substrate 10 is formed to serve as the conductive paste layer 21p, but the resin paste layer 21c may be formed to serve as the layer farthest therefrom.

Next, as illustrated in FIG. 8, support conductor holes are formed in a step S8. More specifically, as illustrated in FIG. 13, a plurality of support conductor holes 15h that penetrate the laminate are formed in the laminate at sites located to overlap with the first via conductors 13 as viewed in the normal direction of the first main surface 10a. The plurality of support conductor holes 15h will be filled with support conductors in a step of forming the support conductors, which will be described later. In addition, according to the present embodiment, the section of each of the plurality of support conductor holes 15h is configured to be larger than the section of each of the first via conductors 13.

In this regard, the method for forming the support conductor holes 15h is not to be considered particularly limited, but for example, the support conductor holes 15h can be formed by irradiating the laminate with laser light. In addition, the support conductor holes 15h may also be formed by processing with a mechanical puncher used or sandblasting.

Next, as illustrated in FIG. 8, support conductors are formed in step S9. More specifically, as illustrated in FIG. 14, the support conductor holes 15h are filled with a conductive paste so as to fill the plurality of support conductor holes 15h. The plurality of support conductors 15 formed in this manner protrude from the first main surface 10a toward the laminate, and is surrounded by the laminate. In addition, each of the plurality of support conductors 15 formed in this manner is connected to each of the plurality of first via conductors 13.

According to the present embodiment, a Ni paste is used as the conductive paste filling the support conductor holes 15h. In the case of such a configuration, the support conductors 15 including the same material as the material included in the metal particles 21a (that is, the material included in the metal porous body 21) can be formed, and thus, the support conductors 15 and the metal porous body 21 will be firmly metal-bonded through the firing step, which will be described later.

In this regard, the method for applying the conductive paste filling the support conductor holes 15h is not to be considered particularly limited, but for example, a screen printing method can be used.

Next, as illustrated in FIG. 8, columnar conductors are formed in a step S10. More specifically, as illustrated in FIG. 15, a plurality of columnar conductor holes 19h are formed in the laminate at sites located to overlap with the second through-holes 12 as viewed in the normal direction of the first main surface 10a, so as to penetrate the laminate to reach the second through-holes 12. The plurality of columnar conductor holes 19h will be filled with columnar conductors in a step of forming the columnar conductors, which will be described later. In addition, according to the present embodiment, the section of each of the plurality of columnar conductor holes 19h is configured to be larger than the section of each of the second through-holes 12.

In this regard, the method for forming the columnar conductor holes 19h is not to be considered particularly limited, but for example, the columnar conductor holes 19h can be formed by irradiating the laminate with laser light. In addition, the columnar conductor holes 19h may also be formed by processing with a mechanical puncher used or sandblasting.

Next, as illustrated in FIG. 8, in a step S11, the laminate and the support conductors are subjected to firing. More specifically, as illustrated in FIG. 16, the laminate and the support conductors 15 are fired, and thus, the adjacent metal particles 21a included in the conductive paste layer 21p are made sintered and then metal-bonded, and the metal particles 21a and the support conductor 15 adjacent to the metal particles 21a are joined. In addition, the resin paste layer 21c included in the laminate disappears with heat at the time of the firing, thereby forming a plurality of metal porous bodies 21 stacked apart from each other in the normal direction of the first main surface 10a.

Further, at the time of the firing described above, the blocking parts blocking the second through-holes 12, made of, for example, an epoxy resin, are also burned out by the heat.

In performing the firing described above, the insulating substrate 10 is subjected to a degreasing treatment prior to the firing, and thereafter, the above-described laminate and support conductors 15 are subjected to the firing, for example, under a temperature condition of 400° C. to 900° C. under a reducing atmosphere in which nitrogen and hydrogen are mixed.

It is to be noted that the atmosphere at the time of the firing is preferably a reducing atmosphere as described above, but can be set to be an atmosphere that is equal to or less than the equilibrium oxygen partial pressure of a metal selected as a main component of the metal particles 21a.

In this regard, as described above, the support conductors 15 contains Ni, which is the same material as the material included in the metal particles 21a in the conductive paste layers 21p. In the case of such a configuration, the metal particles 21a and the support conductors 15 are made sintered and then metal-bonded by the firing described above, and thus, the mechanical strength of the joints between the metal particles 21a and the support conductors 15 will be improved.

In addition, while the insulating substrate 10 will be warped unacceptably due to the heat load at the time of the firing described above If all or most of the capacitance forming part 20 is directly bonded to the insulating substrate 10, the above-described support conductors 15 are provided for suppressing the warpage according to the present embodiment, and this matter will be described later.

Next, as illustrated in FIG. 8, a dielectric film is formed in a step S12. More specifically, as illustrated in FIG. 17, the dielectric film 22 is formed to cover the surfaces of the first main surface 10a, metal porous body 21, and support conductors 15, and cover the surface of the insulating substrate 10 in sections that define the second through-holes 12 provided in the insulating substrate 10.

In this regard, the method for forming the dielectric film 22 is not to be considered particularly limited as described above, but an ALD method is preferably used. The use of the ALD method allows a raw material for the dielectric film 22 to be supplied as a gas, thus allowing the selection of the material and the adjustment of the film thickness at an atomic layer level. For that reason, also when the fine pores provided inside the metal porous body 21 are extremely small, a homogeneous and dense dielectric film 22 can be formed. In addition, the use of the ALD method allows the surface of the insulating substrate 10 in the sections that define the second through-holes 12 provided in the insulating substrate 10 to also be easily covered with the dielectric film 22.

In the case of forming the dielectric film 22 by using the ALD method, it is preferable to use, as a raw material gas, a raw material gas that is high in vapor pressure, easily turned into a gas, additionally, high in thermal stability, and high in reactivity such that the raw material gas will spread into the fine pores provided inside the metal porous body 21 and into the second through-holes 12 provided in the insulating substrate 10. From this viewpoint, for example, in the case of forming an AlO_x film, trimethylaluminum (TMA) is preferably used as a raw material, and in the case of forming an SiO_x film, trisdimethylaminosilane (TDMAS) is preferably used as the raw material. According to the present embodiment, the dielectric film 22 is formed with the use of the ALD method.

In addition, the dielectric film 22 is formed, for example, under a temperature condition of 150° C. or higher and 400° C. or lower although the conduction differs depending on the film forming method and the film forming material. While the insulating substrate 10 will be warped unacceptably due to the heat load in forming the dielectric film 22 If all or most of the capacitance forming part 20 is directly bonded to the insulating substrate 10, the above-described support conductors 15 are provided for suppressing the warpage according to the present embodiment, and this matter will be described later.

Next, as illustrated in FIG. 8, as conductive film is formed in a step S13. More specifically, as illustrated in FIG. 18, the conductive film 23 is formed to cover the dielectric film 22 formed in the step S12.

In this regard, the method for forming the conductive film 23 is not to be considered particularly limited as described above, but an ALD method is preferably used. The use of the ALD method allows a raw material for the conductive film 23 to be supplied as a gas, thus allowing the selection of the material and the adjustment of the film thickness at an atomic layer level. For that reason, also when the fine pores provided inside the metal porous body 21 are extremely small, a homogeneous and dense conductive film 23 can be formed. In addition, the use of the ALD method allows the dielectric film 22 provided inside the second through-holes 12 of the insulating substrate 10 to also be easily covered with the conductive film 23.

In addition, the conductive film 23 is formed, for example, under a temperature condition of 200° C. or higher and 600 or lower although the conduction differs depending on the film forming method and the film forming material. While the insulating substrate 10 will be warped unacceptably due to the heat load in forming the conductive film 23 If all or most of the capacitance forming part 20 is directly bonded to the insulating substrate 10, the above-described support conductors 15 are provided for suppressing the warpage according to the present embodiment, and this matter will be described later.

Through the steps S5 to S13 described above, as illustrated in FIG. 18, the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23 is provided so as to face the first main surface 10a of the insulating substrate 10, and furthermore, the configuration of the capacitance forming part 20 includes a plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a.

Next, as illustrated in FIG. 8, an internal conductor is formed in a step S14. Specifically, as illustrated in FIG. 19, the internal conductor 18 is formed so as to cover the conductive film 23 covering the outer surface of the capacitance forming part 20 and the tips of the support conductors 15, and the internal conductor 18 is formed to also cover the conductive film 23 that defines the internal space of the capacitance forming part 20 so as to fill the internal space.

More specifically, the internal conductor 18 is formed so as to fill the space inside each of the plurality of capacitance forming parts stacked apart from each other in the normal direction of the first main surface 10a, and is formed so as to fill the spaces (that is, the space provided between the first capacitance forming part 20a and the second capacitance forming part 20b and the space provided between the second capacitance forming part 20b and the third capacitance forming part 20c) provided between the plurality of capacitance forming parts.

Furthermore, the internal conductor 18 is formed so as to cover the surfaces of the above-described plurality of columnar conductor holes 19h provided in the capacitance forming part 20. In addition, the internal conductor 18 is formed so as to cover the conductive film 23 covering a predetermined part of the insulating substrate 10 on the side with the first main surface 10a, and also cover the conductive film 23 covering the surface of the insulating substrate 10 in the sections that define the plurality of second through-holes 12 provided in the insulating substrate 10.

In this regard, as described above, the internal conductor 18 may be formed by the CVD method, the ALD method, the PLD method, a plating method, a bias sputtering method, a sol-gel method, a method using conductive polymer filling, or a method using a supercritical fluid. According to the present embodiment, the internal conductor 18 made of Ag is formed by a dipping method with an Ag nano paste used.

Next, as illustrated in FIG. 8, second via conductors and columnar conductors are formed on the insulating substrate in a step S15. More specifically, as illustrated in FIG. 20, the plurality of second via conductors 14 and the plurality of columnar conductors 19 are formed so as to fill the plurality of second through-holes 12 and the plurality of columnar conductor holes 19h whose surfaces are covered with the internal conductor 18 in the step S14.

In this regard, as described above, the second via conductors 14 and the columnar conductors 19 may be formed by a thick film forming method such as electrolytic plating or a screen printing method. According to the present embodiment, the second via conductors 14 and columnar conductor 19 made of Ni are both formed by electrolytic plating.

The second via conductors 14 thus formed are joined to the internal conductor 18 covering the side surfaces of the second via conductors 14. In addition, the plurality of columnar conductors 19 formed in this manner protrude from the first main surface 10a toward the capacitance forming part 20, and are surrounded by the conductive film 23 of the capacitance forming part 20 with the internal conductor 18 interposed therebetween to be connected to the conductive film 23.

The second via conductor 14 formed as described above is joined to the columnar conductor 19 at the end of the second via conductor 14 on the side with the capacitance forming part 20. Thus, the second via conductor 14 is not only connected to the conductive film 23 with the internal conductor 18 covering the second via conductor 14 interposed therebetween, but also connected to the conductive film 23 with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween.

Further, when the columnar conductors 19 are formed together with the second via conductors 14 by electrolytic plating, not only the columnar conductors 19, but also film-shaped parts 19a are simultaneously formed so as to cover the outer surface of the internal conductor 18 as illustrated in FIG. 20. Accordingly, the columnar conductors 19 and the film-shaped parts 19a are integrally and continuously formed from the same material.

Next, as illustrated in FIG. 8, a sealing part is formed in a step S16. More specifically, as illustrated in FIG. 21, the sealing part 30 is provided on the first main surface 10a of the insulating substrate 10 provided with the capacitance forming part 20 so as to cover the capacitance forming part 20.

The sealing part 30 is formed by, for example, so-called compression molding. More specifically, a resin sheet is put on the first main surface 10a of the insulating substrate 10, and in this state, evacuation is performed with the use of a vacuum laminator to bring the resin sheet into close contact with the first main surface 10a of the insulating substrate 10. Then, in this state, the resin sheet is heated to 50° C. to 100° C. to laminate the capacitance forming part 20, and thereafter, heated to 100° C. to 200° C. to perform main curing, thereby forming the sealing part 30. It is to be noted that the method for forming the sealing part 30 is not limited to the compression molding described above, and may be performed by so-called transfer molding.

Thus, the capacitance forming part 20 is sealed by the insulating substrate 10 and the sealing part 30, and moisture can be prevented from entering the capacitance forming part 20 from the outside, thereby allowing moisture resistance to be secured. In addition, the capacitance forming part 20 is covered with the sealing part 30, and the capacitance forming part 20 is also physically protected by the sealing part 30. It is to be noted that the curing condition mentioned above is merely an example, and various changes can be made to the condition.

Next, as illustrated in FIG. 8, in a step S17, the insulating substrate is subjected to grinding processing. More specifically, as illustrated in FIG. 22, the second main surface 10b of the insulating substrate 10 located on the side to opposite to the side provided with the capacitance forming part 20 is subjected to plane cutting.

In this regard, for performing the grinding processing, with a grinding tape (not illustrated) attached to the side with the capacitance forming part 20, the insulating substrate 10 is removed by plane cutting at each of sites blocking the first via conductors 13 and the second through-holes 12. Thus, the ends of the first via conductors 13 and second via conductors 14 are exposed on the side with the second main surface 10b.

Next, as illustrated in FIG. 8, in a step S18, first bumps and second bumps are formed on the insulating substrate. More specifically, as illustrated in FIG. 23, the first bumps 16 and the second bumps 17 are formed on the second main surface 10b of the insulating substrate 10 so as to cover the first via conductors 13 and second via conductors 14 provided in the insulating substrate 10.

The first bumps 16 and the second bumps 17 can be simultaneously formed by, for example, electrolytic plating. In that case, a part excluding the vicinities of the sites where the first via conductors 13 and the second via conductors 14 are exposed is covered with an ultraviolet curable resin film as a mask (not illustrated), and the electrolytic plating is performed in this state, thereby allowing the first bumps 16 and the second bumps 17 to be formed to protrude from the second main surface 10b, and further, after the electrolytic plating is completed, the ultraviolet curable resin film as the mask is removed.

It is to be noted that the method for forming the second via conductors 14, first bumps 16, and second bumps 17 described above is not limited to the method of using the electrolytic plating described above, and a combination of a screen printing method, inkjet method, dispenser method, or the like of using a conductive paste with firing can also be used. In that case, the conductive paste preferably contains a metal or a sintering aid that can be fired at a low temperature such that firing can be performed under a temperature condition that has no influence on the resin constituting the sealing part 30.

Next, as illustrated in FIG. 8, in a step S19, the insulating substrate is divided into individual pieces. More specifically, the insulating substrate 10 is divided to divide the plurality of capacitors 1A connected to each other, into individual capacitors.

In this regard, for dividing into the individual capacitors, a groove is formed in at least one of the insulating substrate 10 and sealing part 30, and a force is applied to the insulating substrate 10 and the sealing part 30 so as to bend the insulating substrate 10 and the sealing part 30 from the groove as a starting point, thereby breaking the insulating substrate 10 and the sealing part 30. It is to be noted that diamond scribing, laser scribing, cutting with a dicing machine, or the like can be used as a method for forming the groove. In addition, dividing into the individual capacitors may be performed by directly cutting the insulating substrate 10 and the sealing part 30 by scribing or cutting with a dicing machine.

The capacitor 1A according to the first embodiment described above is manufactured through the steps S1 to S19 described above.

It is to be noted that, in the method for manufacturing the capacitor 1A according to the present embodiment described above, the sealing part may be formed after performing the grinding processing, while a case where the grinding processing is performed after the sealing part is formed has been exemplified. In addition, dividing into the individual capacitors may be performed immediately after performing the grinding processing, or the grinding processing may be performed immediately after dividing into the individual capacitors.

In this regard, the capacitor 1A according to the present embodiment has such a configuration described above, thereby reducing the ESR.

In general, an extended line is provided in a capacitor for electrically connecting a capacitance forming part formed inside the capacitor to a circuit located outside the capacitor, and for reducing the ESR of the capacitor, it is important to increase the area of contact between the capacitance forming part and the extended line, and increase the sectional area of the extended line orthogonal to the energization direction of the extended line and enhance the continuity of the extended line.

In this regard, in the capacitor 1A according to the present embodiment, as described above, the second external connection line as the extended line includes the second via conductor 14 and columnar conductor 19 provided in the insulating substrate 10 and the internal conductor 18 sealed by the insulating substrate 10 and the sealing part 30, and the conductive film 23 of the capacitance forming part 20 is connected to the second via conductor 14 with the internal conductor 18 interposed therebetween or with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween.

In this regard, the internal conductor 18 covers not only the conductive film 23 at sites that define the outer surface of the capacitance forming part 20, but also the conductive film 23 at sites exposed inside the capacitance forming part 20. Thus, the internal conductor 18 is connected to most of the conductive film 23, thereby allowing the area of contact between the conductive film 23 and the internal conductor 18 to be increased. In addition, the internal conductor 18 also covers each of the plurality of columnar conductors 19 protruding from the first main surface 10a toward the capacitance forming part 20. Thus, the area of contact between the internal conductor 18 and the columnar conductor 19 to be also increased. Accordingly, with such a configuration, the area of contact can be increased at each of the interfaces formed by the conductive film 23, the internal conductor 18, and the columnar conductors 19.

In addition, in the capacitor 1A according to the present embodiment, as described above, the thickness of the conductive film 23 is about several hundred nm at the largest, whereas the thickness of the internal conductor 18 is at least two times or more as large as the thickness of the conductive film 23, and the diameters of the plurality of columnar conductors 19 are each about several tens μm at the smallest. Accordingly, with such a configuration, the sectional area of the internal conductor 18 and the sectional area of the columnar conductor 19 are larger than the sectional area of the conductive film 23, and the continuity thereof can be secured.

Accordingly, such a configuration as described above not only allows the area of contact between the conductive film 23 and the second external connection line to be increased, but also allows the sectional area of the second external connection line orthogonal to the energization direction of the second external connection line to be increased and the continuity thereof to be enhanced, thereby allowing, as a result, the ESR to be reduced.

In addition, in the capacitor 1A according to the present embodiment, as described above, the thickness of the internal conductor 18 formed in the space provided between the layers of the plurality of capacitance forming parts stacked is preferably larger than the thickness of the conductive film 23, more preferably, the thickness of the internal conductor 18 is preferably two times or more as large as the thickness of the conductive film 23, and still more preferably three times or more, still more preferably ten times or more, still more preferably 100 times or more as large as the thickness.

In the case of such a configuration, the internal conductor 18 at the site located between the layers has a larger sectional area than the internal conductor 18 located at the other site (for example, the internal conductor 18 at the site covering the conductive film 23 covering the surface of the insulating substrate 10 in the section that defines the second through-hole 12), thus allowing the sectional area of the second external connection line to be further increased, thereby further reducing the ESR.

In addition, in the capacitor 1A according to the present embodiment, as described above, the first external connection line as an extended line includes the first via conductors 13 and support conductors 15 provided in the insulating substrate 10, and the metal porous body 21 of the capacitance forming part 20 is connected to the first via conductors 13 with the support conductors 15 interposed therebetween.

In this regard, the support conductor 15 is provided to protrude from the first main surface 10a toward the capacitance forming part 20, and the area of contact at the interface formed by the thus provided support conductor 15 and the metal porous body 21 is larger than the area of contact at the interface formed by the first via conductor 13 and the metal porous body 21 when the metal porous body 21 is directly connected to the first via conductor 13. Accordingly, with such a configuration, the area of contact can be increased at the interface formed by the metal porous body 21 and the support conductor 15.

Furthermore, as described above, the diameter of the support conductor 15 is about several tens μm at the smallest. Accordingly, the metal porous body 21 is connected to the first via conductor 13 with the support conductor 15 interposed therebetween, thereby allowing the sectional area of the first external connection line to be increased as compared with the case where the metal porous body 21 is directly connected to the first via conductor 13, thereby reducing the ESR.

Accordingly, the capacitor 1A according to the present embodiment will reduce the ESR in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

In this regard, in the capacitor 1A according to the present embodiment, the capacitance forming part 20 is joined to each of the plurality of support conductors 15, and at the same time, as described above, is not substantially directly joined to the insulating substrate 10, or if directly joined thereto, is only slightly joined thereto.

In the case of such a configuration, stress can be reduced, which is generated due to the difference in thermal expansion coefficient between the insulating substrate 10 and the capacitance forming part 20 in the manufacturing process (that is, the firing step, the step of forming the dielectric film 22, and the step of forming the conductive film 23) involving the heat treatment of the capacitor 1A. Thus, the insulating substrate 10 can be effectively kept from being warped due to the stress, and the dielectric film 22 and the conductive film 23 can also be effectively kept from being peeled from the insulating substrate 10 due to warpage of the insulating substrate 10.

In addition, in the capacitor 1A according to the present embodiment, as described above, the plurality of support conductors 15 protrude from the first main surface 10a toward the capacitance forming part 20, and are surrounded by the capacitance forming part 20. Thus, each of the plurality of support conductors 15 is joined to the capacitance forming part 20.

In the case of such a configuration, a so-called anchor effect will be achieved by the plurality of support conductors 15, and the above-described warpage in the insulating substrate 10 can be further suppressed.

In addition, if all or most of the capacitance forming part is directly joined to the insulating substrate, stress may be generated due to the difference in thermal expansion coefficient between the insulating substrate and the capacitance forming part by the influence of heat applied from the outside or heat generated inside after mounting, thereby causing the capacitor 1A to be warped and then causing damage to the joint between the insulating substrate and the metal porous body, but the capacitor 1A according to the present embodiment can effectively keep such a problem from being caused.

Accordingly, the capacitor 1A according to the present embodiment will improve the mounting stability and the reliability after mounting.

In addition, in the capacitor 1A according to the present embodiment, as described above, as viewed in the normal direction of the first main surface 10a of the insulating substrate 10, the first via conductors 13 and the second via conductors 14 are both provided in the region where the capacitance forming part 20 is disposed (that is, the region indicated by the broken line in FIG. 2).

In the case of such a configuration, neither the first external connection line nor the second external connection line will be arranged at a position on the side of the capacitance forming part 20, thus making it possible to minimize the sealing part 30 for the part located on the side of the capacitance forming part 20. Thus, not only the capacitor 1A can be configured to be smaller than conventional capacitors, but also the occupied volume of the part excluding the capacitance forming part 20 in the capacitor 1A is reduced to increase the capacitance.

In addition, in the case of such a configuration described above, the first via conductors 13 and the second via conductors 14 are located to penetrate the insulating substrate 10 in the thickness direction thereof, and thus, the via conductors that differ in polarity are arranged close to each other, with the current paths thereof respectively in opposite directions. Thus, the magnetic fields generated on the via conductors by flowing currents act so as to cancel each other, thus allowing the so-called equivalent series inductance (ESL) to be reduced.

Furthermore, in the capacitor 1A according to the present embodiment, as described above, the first via conductors 13 and the second via conductors 14 are arranged in an array, and one of the via conductors and the via conductor adjacent thereto at the shortest distance differ in polarity from each other. With such a configuration, the above-described effect of reducing the ESL can be maximized.

In addition, in the capacitor 1A according to the present embodiment, as described above, each of the pair of external connection lines that electrically extend the capacitance forming part 20 is configured to include a plurality of via conductors. With such a configuration, the sectional area of the current path can be increased as compared with a case where each of the pair of external connection lines is composed of a single via conductor, thus reducing the ESR.

In addition, in the capacitor 1A according to the present embodiment, as described above, at the boundary part between the second via conductor 14 and the substrate of the insulating substrate 10, the substrate of the insulating substrate 10 is covered with the dielectric film 22, the dielectric film 22 is covered with the conductive film 23, and the conductive film 23 is further covered with the second via conductor 14.

With such a configuration, the close contact between the substrate of the insulating substrate 10 and the second via conductor 14 is improved as compared with a case where the substrate of the insulating substrate 10 and the second via conductor 14 are directly joined, thus keeping moisture from entering through the part. Accordingly, a capacitor with excellent moisture resistance can be obtained.

In addition, in the capacitor 1A according to the present embodiment, as described above, the metal porous body 21 is made of the sintered body of metal grains. In the case of such a configuration, metal joining between the metal grains increases the mechanical strength of the capacitance forming part 20, and also increases the joint area between the metal grains, thus allowing the ESR to be reduced. Furthermore, the effect of being capable of relatively easily forming the metal porous body with open pores is also achieved.

FIG. 24 is a schematic sectional view illustrating one form of a columnar conductor in the capacitor illustrated in FIG. 3. In a capacitor 1A′ according to the present mode, for example, as illustrated in FIG. 24, there is a case where the columnar conductor 19 is formed such that one of the pair of ends of the columnar conductor 19, located on the side opposite to the side with insulating substrate 10 as viewed from the capacitance forming part 20, is formed in a hollow shape, with the sealing part 30 filling the hollow part. The capacitor 1A′ including the thus formed columnar conductor 19 can also achieve the effect described above.

First Modification Example

FIG. 25 is a schematic sectional view of a capacitor according to a first modification example. Hereinafter, a capacitor 1A1 according to the first modification example based on the first embodiment described above will be described with reference to FIG. 25.

As illustrated in FIG. 25, the capacitor 1A1 according to the first modification example is different from the capacitor 1A according to the above-described first embodiment only in the position at which the support conductor 15 is formed.

Specifically, in the capacitor 1A1 according to the first modification example, as viewed in the normal direction of the first main surface 10a of the insulating substrate 10, each of a plurality of support conductors 15a is formed at a position that is not overlapped with either the first via conductors 13 or the second via conductors 14. In this regard, for convenience of description, the support conductor formed at a position that is not overlapped with either the first via conductors 13 or the second via conductors 14 is denoted by reference numeral 15a to be distinguished from the support conductor 15 formed at the position overlapped with the first via conductor 13. It is to be noted that the number of the support conductors 15a is not to be considered particularly limited, and is appropriately set depending on the size of the insulating substrate 10 or a desired capacitance.

In the capacitor 1A1 configured as described above, the support conductor 15a is not directly joined to the first via conductor 13. Accordingly, the first via conductor 13 is joined to the metal porous body 21 of the third capacitance forming part 20c at least at a part of the end surface of the first via conductor 13 on the side with the capacitance forming part 20 to be electrically connected to the metal porous body 21. In addition, the metal porous bodies 21 of the plurality of capacitance forming parts stacked are connected to each other with the support conductor 15a joined to all of the metal porous bodies 21 interposed therebetween.

Also in the case of such a configuration, similarly to the capacitor 1A according to the first embodiment described above, the second via conductor 14 is connected to the conductive film 23 of the capacitance forming part 20 with the internal conductor 18 interposed therebetween or with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween, thus allowing the sectional area of the current path of the second external connection line to be increased. Accordingly, an effect in accordance with the effect described in the first embodiment described above will be achieved, and the ESR will be reduced in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

In addition, with such a configuration, the capacitance forming part 20 is supported by the plurality of support conductors 15a, and thus, the capacitance forming part 20 is not substantially directly joined to the insulating substrate 10, or if directly joined thereto, is only slightly joined thereto. Thus, the mounting stability and the reliability after mounting will be also improved in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

Second Modification Example

FIG. 26 is a schematic sectional view of a capacitor according to a second modification example. Hereinafter, a capacitor 1A2 according to the second modification example based on the first embodiment described above will be described with reference to FIG. 26.

As illustrated in FIG. 26, the capacitor 1A2 according to the second modification example is different from the capacitor 1A according to the above-described first embodiment only in the constitution of the support conductors 15.

Specifically, in the capacitor 1A2 according to the second modification example, as viewed in the normal direction of the first main surface 10a of the insulating substrate 10, a plurality of support conductors include the support conductors 15 formed at positions that are overlapped with the first via conductors 13, and the support conductors 15a formed at positions that are not overlapped with either the first via conductors 13 or the second via conductors 14. It is to be noted that the number of the support conductors 15a is not to be considered particularly limited, and is appropriately set depending on the size of the insulating substrate 10 or a desired capacitance.

Also in the case of such a configuration, an effect that is similar to the effect described in the first embodiment described above will be achieved, and the ESR will be reduced in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

In addition, with such a configuration, the capacitance forming part 20 is supported by the plurality of support conductors 15 and 15a, and thus, the capacitance forming part 20 is not substantially directly joined to the insulating substrate 10, or if directly joined thereto, is only slightly joined thereto. Thus, the mounting stability and the reliability after mounting will be further improved in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

Third Modification Example

FIG. 27 is a schematic sectional view of a capacitor according to a third modification example. Hereinafter, a capacitor 1A3 according to the third modification example based on the first embodiment described above will be described with reference to FIG. 27.

As illustrated in FIG. 27, the capacitor 1A3 according to the third modification example is different from the capacitor 1A according to the above-described first embodiment only in that a moisture-resistant protective film 40 is further formed on the first main surface 10a of the insulating substrate 10 at a position between the capacitance forming part 20 and the sealing part 30.

For example, before forming the sealing part 30, the moisture-resistant protective film 40 can be formed by providing an inorganic insulator made of SiN, SiO2, Al₂O₃, HfO2, ZrO2, or the like by a CVD method, an ALD method, or the like so as to cover the capacitance forming part 20, or by providing an organic insulator with water repellency, such as a fluorine-based resin or a silane coupling agent resin, so as to cover the capacitance forming part 20. In this regard, the moisture-resistant protective film does not necessarily have to be formed inside of the capacitance forming part 20, and it is sufficient for the film to be formed to cover only the outer surface.

In the case of such a configuration, not only the effect described in the first embodiment described above is achieved, but also the moisture-resistant protective film 40 in addition to the sealing part 30 can prevent moisture from entering the capacitance forming part 20 from the outside, thus allowing the moisture resistance to be further improved.

Fourth Modification Example

FIG. 28 is a schematic sectional view of a capacitor according to a fourth modification example. Hereinafter, a capacitor 1A4 according to the fourth modification example based on the first embodiment described above will be described with reference to FIG. 28.

As illustrated in FIG. 28, the configuration of the capacitor 1A4 according to the fourth modification is different from that of the capacitor 1A according to the above-described first embodiment only in that a side sealing part 50 located so as to surround the sides of the insulating substrate 10 and capacitance forming part 20 is further formed.

The side sealing part 50 can be formed by, for example, providing a sealing member containing any of Si, Al₂O₃, ZrO₂, BN, Si₃N₄, AlN, MgO, Mg₂SiO₄, BaTiO₃, SrTiO₃, and CaTiO₃ as a main material or made of an inorganic material such as glass by an inkjet method or the like so as to cover the sides of the insulating substrate 10 and capacitance forming part 20.

The method for manufacturing the capacitor 1A4 with such a side sealing part 50 formed is different from the method for manufacturing the capacitor 1A in that the step S19 (that is, dividing into the individual capacitors) is performed after the step S4 (that is, firing the green sheet) illustrated in FIG. 8, then the side sealing part 50 is formed, and then the step S5 (that is, applying the conductive paste layer onto the insulating substrate) is performed.

In the case of such a configuration, in forming the capacitance forming part 20 on the first main surface 10a of the insulating substrate 10 in the step S5 to step S13 illustrated in FIG. 8, the capacitance forming part 20 is formed within the range surrounded by the side sealing part 50 as viewed in the normal direction of the first main surface 10a. Thus, not only the effect described in the first embodiment described above is achieved, but also positional deviations (that is, deviations in the vertical direction or the horizontal direction in FIG. 2) of the capacitance forming part 20 as viewed in the normal direction can be effectively prevented, and as a result, a capacitor with stable quality can be manufactured.

In addition, the side surface is surrounded by the side sealing part 50, thereby not only enhancing the impact resistance, but also enhancing the resistance to stress generated in processing the capacitor 1A4. Thus, in the capacitor 1A4, the dielectric film 22 and the conductive film 23 in the vicinity of the side sealing part 50 are effectively prevented from being damaged, thereby allowing the withstand voltage of the capacitor 1A4 to be kept from being decreased.

Second Embodiment

FIG. 29 is a schematic sectional view of a capacitor according to a second embodiment. Hereinafter, a capacitor 1B according to the present embodiment will be described with reference to FIG. 29.

The capacitor 1B according to the present embodiment is different from the capacitor 1A according to the first embodiment described above in that both the front surface and the back surface are configured as mounting surfaces for a wiring board or the like.

Specifically, in the capacitor 1B according to the present embodiment, the plurality of support conductors 15 constituting a part of the first external connection line and the plurality of columnar conductors 19 constituting a part of the second external connection line are both formed through the capacitance forming part 20 and the sealing part 30. Thus, the plurality of support conductors 15 and the plurality of columnar conductors 19 are configured to be exposed at an outer surface 30a of the sealing part 30, located on the side opposite to the side with the insulating substrate 10 as viewed from the capacitance forming part 20.

Furthermore, on the outer surface 30a, a plurality of first bumps 16 constituting a part of the first external connection line are provided so as to cover the end surfaces of the plurality of support conductors 15 exposed at the outer surface 30a. Similarly, on the outer surface 30a, a plurality of second bumps 17 constituting a part of the second external connection line are provided so as to cover the end surfaces of the plurality of columnar conductors 19 exposed at the outer surface 30a.

FIG. 30 is a flowchart illustrating a method for manufacturing a capacitor according to the present embodiment, and FIGS. 31 to 35 are schematic sectional views for illustrating each step of the manufacturing flow illustrated in FIG. 30. Next, an example of a specific manufacturing method for manufacturing the capacitor 1B according to the present embodiment described above will be described with reference to FIGS. 30 to 35.

As illustrated in FIG. 30, the method for manufacturing the capacitor 1B mostly conforms to the method for manufacturing the capacitor 1A. Accordingly, in the following description, in the method for manufacturing the capacitor 1B, the description of steps that have contents in common to the method for manufacturing the capacitor 1A will be omitted, and only steps that have different contents from the method for manufacturing the capacitor 1A will be described.

As shown in FIG. 30, in a step S7, the conductive paste layer 21p and the resin paste layer 21c are laminated on the insulating substrate, and at that time, as shown in FIG. 31, a part of the laminated conductive paste layer 21p corresponding to a supernatant part of the binder 21b included in the layer located farthest from the first main surface 10a is intentionally formed to be thicker.

In addition, as illustrated in FIG. 30, support conductors are formed in a step S9. As illustrated in FIG. 32, the support conductors 15 formed herein are intentionally formed to be longer in the axial direction by the amount corresponding to the supernatant part intentionally formed to be thicker in the step S7.

In addition, as illustrated in FIG. 30, parts of the film-shaped parts formed in the step S15 and the conductive film covering the tips of the support conductors formed in the step S13 are removed in a step S15B. More specifically, the film-shaped parts 19a at sites located on the side opposite to the side with the insulating substrate 10 as viewed from the capacitance forming part 20 are selectively removed first, and then, as illustrated in FIG. 33, the conductive film 23 covering the end located on the side opposite to the side with the insulating substrate 10 as viewed from the capacitance forming part 20, of the pair of ends of each of the plurality of support conductors 15, is selectively removed.

Such removal of the film-shaped parts 19a is performed by, for example, a so-called dipping method or the like in which only the film-shaped parts 19a at the sites located on the side opposite to the side with the insulating substrate 10 as viewed from the capacitance forming part 20 are immersed in an etching solution to remove only the film-shaped parts 19a at the sites. The removal of the conductive film 23 is similarly performed by a dipping method or the like.

Removing the conductive film 23 covering the tips of the support conductors 15 in this manner causes, at the time of grinding processing for the tips of the support conductors 15, which will be described later, a part of the conductive film 23 to be unintentionally joined to the support conductors 15 when the conductive film 23 is subjected to the grinding processing together, thereby allowing short circuits between the support conductors 15 and the conductive film 23 to be effectively prevented.

Next, as illustrated in FIG. 30, a sealing part is formed in a step S16. As illustrated in FIG. 34, the sealing part 30 formed herein is formed so as to cover the tips of the support conductors 15 intentionally formed to be longer in the step S9.

In addition, as shown in FIG. 30, in a step S17, the grinding processing is performed. The grinding processing performed herein is performed not only for the insulating substrate 10, but also for the sealing part, the support conductors, and the columnar conductors. More specifically, as illustrated in FIG. 35, not only the side with the second main surface 10b of the insulating substrate 10, located on the side opposite to the side with the capacitance forming part 20 provided, but also the side with the outer surface 30a of the sealing part 30, the ends of the support conductors 15 on the side with outer surface 30a, and the ends of the columnar conductors 19 on the aide with the outer surface 30a are each removed by plane cutting. Thus, the end surfaces of the support conductors 15 and columnar conductors 19 are each configured to be exposed at the outer surface 30a.

In a step S18 illustrated in FIG. 30, the first bumps 16 and the second bumps 17 are formed on the outer surface 30a so as to cover the end surfaces of the support conductors 15 and the end surfaces of the columnar conductors 19, exposed at the outer surface 30a in this manner. The capacitor 1B according to the second embodiment described above is manufactured through all of the steps S1 to S19 and S15B including the respective steps individually described above.

The capacitor 1B according to the present embodiment, configured as described above not only achieves the effect described in the first embodiment described above, but also is capable of an electrical extension from the capacitance forming part 20 on any of the front surface (that is, the outer surface 30a) and the back surface (that is, the second main surface 10b of the insulating substrate 10), thereby allowing a capacitor to be configured to be mountable on either the front surface or the back surface.

Third Embodiment

FIG. 36 is a schematic sectional view of a capacitor according to a third embodiment, and FIG. 37 is a flowchart illustrating a method for manufacturing a capacitor according to the present embodiment. Hereinafter, a capacitor 1C according to the present embodiment will be described with reference to FIGS. 36 and 37.

As illustrated in FIG. 36, the capacitor 1C according to the present embodiment is different from the capacitor 1A according to the above-described first embodiment only in that the capacitance forming part is composed of a single layer.

As illustrated in FIG. 37, the method for manufacturing the capacitor 1C configured as described above is different from the method for manufacturing the capacitor 1A only in that the step of laminating the conductive paste layer 21p and the resin paste layer 21c is not required. Accordingly, in the method for manufacturing the capacitor 1C, as illustrated in FIG. 37, the steps S7 and S8 (that is, applying the resin paste layer onto the conductive paste layer and laminating the conductive paste layer and the resin paste layer) illustrated in FIG. 8 are not performed, and in a step S11C illustrated in FIG. 37, the conductive paste layer and the support conductors are subjected to firing, unlike the step S11 (that is, firing the laminate and the support conductors) illustrated in FIG. 8.

Also in the case of such a configuration, similarly to the capacitor 1A according to the first embodiment described above, the second via conductor 14 is connected to the conductive film 23 of the capacitance forming part 20 with the internal conductor 18 interposed therebetween or with the columnar conductor 19 as well as the internal conductor 18 interposed therebetween, thus allowing the sectional area of the current path of the second external connection line to be increased, and in addition, the first via conductors 13 are connected to the metal porous body 21 of the capacitance forming part 20 with the plurality of support conductors 15 interposed therebetween, thus allowing the sectional area of the current path of the first external connection line to be increased. Accordingly, an effect that is similar to the effect described in the first embodiment described above will be achieved, and the ESR will be reduced in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

When the characteristic configuration (that is, the configuration with both the front surface and the back surface to serve as mounting surfaces for a wiring board or the like) shown in the capacitor 1B according to the second embodiment described above is applied to the capacitor 1C according to the present embodiment, an electrical extension from the capacitance forming part 20 is allowed to be achieved on any of the front surface (that is, the outer surface 30a) and the back surface (that is, the second main surface 10b of the insulating substrate 10), in addition to the effects described above.

Fifth Modification Example

FIG. 38 is a schematic sectional view of a capacitor according to a fifth modification example, and FIG. 39 is an enlarged schematic sectional view of the vicinity of a second via conductor illustrated in FIG. 38. Hereinafter, a capacitor 1C1 according to the fourth modification example based on the third embodiment described above will be described with reference to FIGS. 38 and 39.

As illustrated in FIG. 38, the capacitor 1C1 according to the fifth modification example is different from the capacitor 1C according to the above-described third embodiment in that the support conductors 15 or the columnar conductors 19 (see FIG. 36) are not provided.

More specifically, in the capacitor 1C1, the first external connection line is composed of the first via conductors 13 and the first bumps 16, whereas the second external connection line is composed of the second via conductors 14, the second bumps 17, and the internal conductor 18.

In the capacitor 1C1 configured as described above, the first via conductor 13 is joined to the metal porous body 21 of the capacitance forming part 20 at least at a part of the end of the first via conductor 13 on the side with the capacitance forming part 20 to be electrically connected to the metal porous body 21.

In addition, in the capacitor 1C1, the side surfaces of the second via conductors 14 are covered with the internal conductor 18 covering the surface of the insulating substrate 10 in sections that define the plurality of second through-holes 12 provided in the insulating substrate 10, and the ends of the second via conductors 14 on the side with first main surface 10a are covered with the internal conductor 18 covering the capacitance forming part 20. Thus, the second via conductors 14 are connected to the internal conductor 18, and the above-described second external connection line is connected to the capacitance forming part 20 with the second via conductors 14 and the internal conductor 18 interposed therebetween.

In this regard, as described above, the thickness of the internal conductor 18 at the site connected to the second via conductor 14 is about the same as the thickness of the conductive film 23 in FIGS. 38 and 39 for convenience of drawing, but actually, the thickness of the internal conductor 18 is configured to be considerably larger than the thickness of the conductive film 23 (for example, three times or more).

In the case of such a configuration, the second via conductor 14 is connected to the conductive film 23 of the capacitance forming part 20 with the internal conductor 18 interposed therebetween, thus allowing the sectional area of the current path of the second external connection line to be increased. Accordingly, an effect in accordance with the effect described in the third embodiment described above will be achieved, and the ESR will be reduced in the capacitor including the capacitance forming part 20 including the metal porous body 21, the dielectric film 22, and the conductive film 23.

It is to be noted that the method for manufacturing the capacitor 1C1 according to the present modification example is different from the method for manufacturing the capacitor 1C in that the step S10 (that is, forming the columnar conductor holes) illustrated in FIG. 37 and the formation of the columnar conductors in the step S15 are not performed, and that the formation of the second via conductors in the step S15 is performed after the step S17 (that is, grinding processing). As described above, the formation of the second via conductors in the step S15 following the step S17 allows the second via conductors 14 to be formed from the side with the second main surface 10b of the insulating substrate 10.

Other Modes, Etc.

The shape, configuration, size, number, material, and the like of each of the parts described in the above-described embodiments of the present invention and the modification examples thereof can be variously changed without departing from the scope of the present invention.

In addition, the characteristic configurations described in the above-mentioned embodiments of the present invention and the modification examples thereof can be naturally combined with each other within an allowable range in light of the scope of the present invention.

As described above, the above-mentioned embodiments and modification examples thereof, disclosed herein, are to be considered illustrative in all respects, and not restrictive. The technical scope of the present invention is defined by the claims, and considered including all modifications within the meaning and scope equivalent to the description of the claims.

DESCRIPTION OF REFERENCE SYMBOLS

• • 1A to 1C, 1A1 to 1A4, 1C1, 1A′: Capacitor
  • 10: Insulating substrate
  • 10a: First main surface
  • 10b: Second main surface
  • 11: First through-hole
  • 12: Second through-hole
  • 13: First via conductor
  • 14: Second via conductor
  • 15, 15a: Support conductor
  • 15h: Support conductor hole
  • 16: First bump
  • 17: Second bump
  • 18: Internal conductor
  • 19: Columnar conductor
  • 19a: Film-shaped part
  • 19h: Columnar conductor hole
  • 20: Capacitance forming part
  • 20a: First capacitance forming part
  • 20b: Second capacitance forming part
  • 20c: Third capacitance forming part
  • 21: Metal porous body
  • 21a: Metal particle
  • 21b: Binder
  • 21c: Resin paste layer
  • 21p: Conductive paste layer
  • 22: Dielectric film
  • 23: Conductive film
  • 30: Sealing part
  • 30a: Outer surface
  • 40: Moisture-resistant protective film
  • 50: Side sealing part

Claims

1. A capacitor comprising: an insulating substrate having a first main surface and a second main surface opposite to the first main surface;a capacitance forming part facing the first main surface, the capacitance forming part comprising a conductive metal porous body, a dielectric film covering a surface of the metal porous body, and a conductive film covering the dielectric film;a first external connection line that comprises a first via conductor penetrating the insulating substrate from the first main surface so as to reach the second main surface and connected to the conductive metal porous body; anda second external connection line comprises a second via conductor penetrating the insulating substrate from the first main surface so as to reach the second main surface, and an internal conductor covering the conductive film so as to fill a space inside the capacitance forming part, and the conductive film and the second via conductor are connected with at least the internal conductor interposed therebetween.

2. The capacitor according to claim 1, wherein the second external connection line further comprises a columnar conductor protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part, andthe internal conductor and the second via conductor are connected with at least the columnar conductor interposed therebetween.

3. The capacitor according to claim 2, wherein the columnar conductor extends in a normal direction of the first main surface, andas viewed in the normal direction of the first main surface, the columnar conductor is overlapped with at least a part of the second via conductor.

4. The capacitor according to claim 2, wherein the capacitance forming part comprises a first capacitance forming part and a second capacitance forming part stacked apart from each other in the normal direction of the first main surface, andthe conductive film of the first capacitance forming part and the conductive film of the second capacitance forming part are connected by the internal conductor and the columnar conductor.

5. The capacitor according to claim 4, wherein the internal conductor at a site located between the first capacitance forming part and the second capacitance forming part is larger in thickness than the conductive film.

6. The capacitor according to claim 5, wherein the internal conductor at the site located between the first capacitance forming part and the second capacitance forming part is three times or more as large in thickness as the conductive film.

7. The capacitor according to claim 1, further comprising a support part in the insulating substrate, the support part supporting the capacitance forming part and protruding from the first main surface toward the capacitance forming part, and surrounded by and joined to the capacitance forming part.

8. The capacitor according to claim 7, wherein the support part is a support conductor that forms part of the first external connection line, andthe support conductor is connected to the metal porous body.

9. The capacitor according to claim 8, wherein the support conductor extends in the normal direction of the first main surface, andas viewed in the normal direction of the first main surface, the support conductor is overlapped with at least a part of the first via conductor.

10. The capacitor according to claim 3, further comprising: a support part that supports the capacitance forming part, the support part protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part,the support part is a support conductor that forms part of the first external connection line,the support conductor is connected to the metal porous body,the support conductor extends in the normal direction of the first main surface,as viewed in the normal direction of the first main surface, the support conductor is overlapped with at least a part of the first via conductor; anda sealing part on the first main surface, sealing the capacitance forming part, and defining an outer surface on a side opposite to a side with the insulating substrate as viewed from the capacitance forming part,the support conductor is exposed at the outer surface, andthe columnar conductor is exposed at the outer surface.

11. The capacitor according to claim 8, wherein the support conductor extends in the normal direction of the first main surface, andas viewed in the normal direction of the first main surface, the support conductor is not overlapped with the first via conductor.

12. The capacitor according to claim 8, wherein the support conductor comprises a same material as at least a part of a material included in the metal porous body.

13. The capacitor according to claim 3, further comprising: a support part that supports the capacitance forming part, the support part protruding from the first main surface toward the capacitance forming part and surrounded by the capacitance forming part,the support part is a support conductor that forms part of the first external connection line,the support conductor extends in the normal direction of the first main surface, and is connected to the metal porous body,as viewed in the normal direction of the first main surface, the support conductor is overlapped with at least a part of the first via conductor,the capacitance forming part further comprises a first capacitance forming part and a second capacitance forming part stacked apart from each other in the normal direction of the first main surface,the metal porous body of the first capacitance forming part and the metal porous body of the second capacitance forming part are connected by the support conductor, andthe conductive film of the first capacitance forming part and the conductive film of the second capacitance forming part are connected by the internal conductor and the columnar conductor.

14. The capacitor according to claim 13, further comprising: a sealing part on the first main surface, sealing the capacitance forming part, and defining an outer surface on a side opposite to a side with the insulating substrate as viewed from the capacitance forming part,wherein the support conductor is exposed at the outer surface, andthe columnar conductor is exposed at the outer surface.

15. The capacitor according to claim 1, wherein the first via conductor and the second via conductor are both in a region where the capacitance forming part is disposed as viewed in a normal direction of the first main surface.

16. The capacitor according to claim 15, wherein the capacitor includes: pluralities of the first via conductors, andpluralities of the second via conductors.

17. The capacitor according to claim 16, wherein the pluralities of the first via conductors and the pluralities of the second via conductors are arranged in an array as viewed in the normal direction of the first main surface, andat least one set of adjacent via conductors among the pluralities of the first via conductors and the pluralities of the second via conductors that are a shortest distance from each other differ in polarity from each other.

18. The capacitor according to claim 1, wherein the internal conductor contains at least any one of Ag and a conductive polymer as a main material.