Claims
- 1. A circuit for determining the length of a printed wire connected to an IC pin, the circuit comprising:
a stimulus signal generator; circuitry for conveying an output of the stimulus signal generator to the IC pin; a response signal monitor; circuitry for conveying a signal from the IC pin to the response signal monitor; and means for comparing a signal value received by the signal monitor to a value that is based on the expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin and the expected capacitance of the printed circuit wire per unit length.
- 2. A circuit having two IC pins according to claim 1, wherein the printed wire is connected between the two IC pins, and the location of an open circuit defect in the printed wire is deemed closer to the pin calculated to have the shortest length of printed wire connected to it.
- 3. A circuit according to claim 1, wherein the stimulus signal generator generates a signal whose fundamental frequency is an integer multiple of an AC power line frequency.
- 4. A circuit according to claim 2, wherein the stimulus signal generator generates a signal whose fundamental frequency is an integer multiple of the AC power line frequency.
- 5. A circuit for determining the length of a printed wire connected to an IC pin, the circuit comprising:
equipment for measuring capacitance; analog buses for conveying input and output signals of the equipment to the IC pin through the IC; means for comparing a measured capacitance of the IC pin to an expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin plus the expected capacitance of the printed circuit wire per unit length.
- 6. A circuit as defined in claim 5 and having two or more IC pins and one or more ICs, said pins being connected to common analog buses, the printed wire being connected between said two pins, and the location of an open circuit defect in the printed wire is deemed closer to the pin calculated to have the shortest length of printed wire connected to it.
- 7. A circuit according to claim 5, wherein a stimulus signal generated by the capacitance measuring equipment has a fundamental frequency that is an integer multiple of the AC power line frequency.
- 8. A circuit according to claim 6, wherein a stimulus signal generated by the capacitance measuring equipment has a fundamental frequency that is an integer multiple of the AC power line frequency.
- 9. A circuit for determining whether printed wire is connected to an IC pin, the circuit comprising:
equipment for measuring capacitance; analog buses for conveying input and output signals of the equipment to the IC pin, through the IC; and means for comparing the measured capacitance of the IC pin to an expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin.
- 10. A circuit according to claim 9, said circuit having two or more IC pins connected to common analog buses and the printed wire being connected between said pins, and the location of an open circuit defect in the printed wire is deemed closer to the pin calculated to have the least printed wire capacitance connected to it.
- 11. A circuit according to claim 9, wherein a stimulus signal generated by the capacitance measuring equipment has a fundamental frequency that is an integer multiple of the AC power line frequency.
- 12. A circuit according to claim 10, wherein a stimulus signal generated by the capacitance measuring equipment has a fundamental frequency that is an integer multiple of the AC power line frequency.
- 13. A method for testing an integrated circuit (IC) for open defects in a printed wire connected to an IC pin of the IC, the method comprising:
measuring the capacitance of the IC pin; and comparing the value of the measured capacitance to an expected IC pin capacitance value for the pin unconnected, and determining that an open defect exists proximate the pin when the measured capacitance is less than a predetermined value based on said expected IC pin capacitance.
- 14. A method as defined in claim 13, for an IC having a boundary scan cell associated with each pin of the IC, analog test access buses connected to the boundary scan cells and test bus access pins for accessing said buses, said measuring the capacitance of the IC pin including:
measuring the capacitance of the access buses via the test bus access pins on said IC while no pins are accessed; enabling switches that access a selected pin by loading enabling bits into the boundary scan cell of the selected pin; measuring the capacitance of a selected pin via the access pins; determining the capacitance of the selected pin by subtracting the effects of the capacitance of the bus to obtain said measured capacitance; and said comparing the value including comparing the measured value to the capacitance value expected for the pin if it were unconnected to deduce whether a wire is connected to the pin or how much wire is connected to the pin.
- 15. A method as defined in claim 13, wherein said expected IC pin capacitance is calculated using an expected capacitance of the pin without any printed wire capacitance connected to the pin and an expected capacitance per unit length of the printed circuit wire.
- 16. A method as defined in claim 14, wherein said expected IC pin capacitance is calculated using an expected capacitance of the pin without any printed wire capacitance connected to the pin and an expected capacitance per unit length of the printed circuit wire.
- 17. A method as defined in claim 13, wherein said printed wire is intended to connect two IC pins on the same or different ICs, the method further comprising:
said step of measuring including measuring the capacitance of each of the two IC pins; determining a length of printed wire connected to each IC pin based on an expected capacitance of the pin without any printed wire capacitance connected to the pin and an expected capacitance per unit length of the printed circuit wire; and determining the location of an open circuit defect in the printed wire to be closer to the pin calculated to have the shortest length of printed wire connected to it.
- 18. A method as defined in claim 13, the step of measuring the capacitance including applying a stimulus signal to the pin connected to the wire via a digitally controlled electrical access and detecting a resultant signal at the pin via the digitally controlled electrical access.
- 19. A method as defined in claim 18, wherein when the printed wire connects two IC pins, the method further includes:
determining which pin the open defect is closer to based on which pin has less wire capacitance, including:
measuring the capacitance of each of the two pins, determining the length of the wire using the measured capacitance and the expected capacitance per unit length of the wire.
REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of Provisional Application Serial No. 60/353,961 filed Feb. 5, 2002.
Provisional Applications (1)
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Number |
Date |
Country |
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60353961 |
Feb 2002 |
US |