Patent Application
20180201884
The present disclosure relates generally to compositions and processes to remove residues from semiconductor substrates during manufacturing of semiconductor devices. The compositions of the disclosure are useful for removing etch residues and/or metal oxides from substrates in the presence of other materials, such as metal conductors, barrier materials, insulator materials, and exposed or underlying layers of copper, tungsten, and low-k dielectric materials.
The semiconductor industry is rapidly decreasing the dimensions and increasing the density of electronic circuitry and electronic components in microelectronic devices, silicon chips, liquid crystal displays, MEMS (Micro Electro Mechanical Systems), printed wiring boards, and the like. The integrated circuits within them are being layered or stacked with constantly decreasing thicknesses of the insulating layer between each circuitry layer and smaller and smaller feature sizes. As the feature sizes have shrunk, patterns have become smaller, and device performance parameters tighter and more robust. As a result, various issues which heretofore could be tolerated, can no longer be tolerated or have become more of an issue due to the smaller feature size.
Metal layers (or metal films) are generally susceptible to corrosion. For example, metals or metal alloys such as aluminum, copper, aluminum-copper alloy, tungsten nitride, tungsten (W), cobalt (Co), titanium oxide, other metals and metal nitrides, will readily corrode and dielectrics [ILD, ULK] can etch by using conventional cleaning chemistries. In addition the amount of corrosion tolerated by the integrated circuit device manufacturers is getting smaller and smaller as the device geometries shrink.
At the same time as residues become harder to remove and corrosion must be controlled to ever lower levels, cleaning solutions must be safe to use and environmentally friendly.
Therefore, the cleaning solution should be effective for removing the plasma etch and plasma ash residues and must also be non-corrosive to all exposed substrate materials.
The present disclosure is directed to non-corrosive cleaning compositions that are useful primarily for removing etch residues (e.g., plasma etch and/or plasma ashing residues) and/or metal oxides from a semiconductor substrate as an intermediate step in a multistep manufacturing process. These residues include a range of relatively insoluble mixtures of organic compounds like residual photoresist, organometallic compounds, metal oxides which are formed as reaction by-products from exposed metals or metal alloys such as aluminum, aluminum/copper alloy, copper, titanium, tantalum, tungsten, cobalt, metal nitrides such as titanium and tungsten nitrides, and other materials. The cleaning compositions described herein can remove a broad range of residues encountered on semiconductor substrates and are generally non-corrosive to exposed substrate materials (e.g., exposed metals or metal alloys such as aluminum, aluminum/copper alloy, copper, titanium, tantalum, tungsten, cobalt, and metal nitrides such as titanium and tungsten nitrides).
In one embodiment, the disclosure features compositions including: a) HF; b) at least one organic solvent; c) at least one corrosion inhibitor selected from triazoles, aromatic anhydrides, and combinations thereof; and d) water.
In another embodiment, the disclosure features methods for cleaning semiconductor substrates. Such methods can be performed, for example, by contacting a semiconductor substrate containing post etch residues and/or post ash residues with a cleaning composition of the present disclosure.
In still another embodiment, the disclosure features an article formed by the method described above, in which the article is a semiconductor device (e.g., an integrated circuit).
As defined herein, unless otherwise noted, all percentages expressed should be understood to be percentages by weight to the total weight of the composition. Unless otherwise noted, ambient temperature is defined to be between about 16 and about 27 degrees Celsius (° C.).
In one embodiment, the disclosure describes a composition including: a) HF; b) at least one organic solvent; c) at least one corrosion inhibitor selected from triazoles, aromatic anhydrides, and combinations thereof; and d) water.
In some embodiments, the compositions of this disclosure contain at least one corrosion inhibitor selected from substituted or unsubstituted benzotriazoles. Without wishing to be bound by theory, it is believed that such compositions can exhibit significantly improved compatibility with TiOx that may be present in the semiconductor substrate compared to compositions without any corrosion inhibitor.
Suitable classes of substituted benzotriazole include, but are not limited to, benzotriazoles substituted with alkyl groups, aryl groups, halogen groups, amino groups, nitro groups, alkoxy groups, and hydroxyl groups. Substituted benzotriazoles also include those fused with one or more aryl (e.g., phenyl) or heteroaryl groups.
Suitable benzotriazoles for use as a corrosion inhibitor include, but are not limited to, benzotriazole (BTA), 5-aminobenzotriazole, 1-hydroxybenzotriazole, 5-phenylthiol-benzotriazole, 5-chlorobenzotriazole, 4-chlorobenzotriazole, 5-bromobenzotriazole, 4-bromobenzotriazole, 5-fluorobenzotriazole, 4-fluorobenzotriazole, naphthotriazole, tolyltriazole, 5-phenyl-benzotriazole, 5-nitrobenzotriazole, 4-nitrobenzotriazole, 3-amino-5-mercapto-1,2,4-triazole, 2-(5-amino-pentyl)-benzotriazole, 1-amino-benzotriazole, 5-methyl-1H-benzotriazole, benzotriazole-5-carboxylic acid, 4-methylbenzotriazole, 4-ethylbenzotriazole, 5-ethylbenzotriazole, 4-propylbenzotriazole, 5-propylbenzotriazole, 4-isopropylbenzotriazole, 5-isopropylbenzotriazole, 4-n-butylbenzotriazole, 5-n-butylbenzotriazole, 4-isobutylbenzotriazole, 5-isobutylbenzotriazole, 4-pentylbenzotriazole, 5-pentylbenzotriazole, 4-hexylbenzotriazole, 5-hexylbenzotriazole, 5-methoxybenzotriazole, 5-hydroxybenzotriazole, dihydroxypropylbenzotriazole, 1-[N,N-bis(2-ethylhexyl)aminomethyl]-benzotriazole, 5-t-butyl benzotriazole, 5-(1′,1′-diimethylpropyl)-benzotriazole, 5-(1′,1′,3′-trimethylbutyl)benzotriazole, 5-n-octyl benzotriazole, and 5-(1′,1′,3′,3′-tetramethylbutyl)benzotriazole.
In some embodiments of the disclosure, the compositions include aromatic anhydrides. As used herein, “aromatic anhydride” refers to a molecule containing at least one 5- or 6-membered aromatic ring and an anhydride moiety in the same molecule. In some embodiments, the compositions of this disclosure contain at least one corrosion inhibitor selected from benzoic anhydrides and phthalic anhydrides. In certain embodiments, the benzoic anhydride is 2-sulfobenzoic anhydride.
In some embodiments, the compositions of this disclosure include at least about 0.05% by weight (e.g., at least about 0.1% by weight, at least about 0.2% by weight, or at least about 0.3% by weight) and/or at most about 1% by weight (e.g., at most about 0.7% by weight, at most about 0.6% by weight, or at most about 0.5% by weight) of the corrosion inhibitor.
In some embodiments, the compositions of this disclosure include at least two (e.g., two, three, four, or more) corrosion inhibitors described herein. Without wishing to be bound by theory, it is believed that such compositions can exhibit significantly improved compatibility with SiN that may be present in the semiconductor substrate.
The compositions of this disclosure contain at least one organic solvent. In some embodiments, the organic solvent is selected from the group consisting of alcohols, ketones, esters, and ethers (e.g., glycol diethers). In some embodiments, the compositions of this disclosure contain at least two (e.g., two, three, four, or more) organic solvents.
Classes of alcohols include, but are not limited to, alkane diols (including, but not limited to, alkylene glycols), glycols, alkoxyalcohols (including, but not limited to, glycol monoethers), saturated aliphatic monohydric alcohols, unsaturated non-aromatic monohydric alcohols, and alcohols (e.g., low molecular weight alcohols) containing a ring structure.
Examples of alkane diols includes, but are not limited to, 2-methyl-1,3-propanediol, 1,3-propanediol, 2,2-dimethyl-1,3-propanediol, 1,4-butanediol, 1,3-butanediol, 1,2-butanediol, 2,3-butanediol, pinacol, and alkylene glycols.
Examples of alkylene glycols include, but are not limited to, ethylene glycol, propylene glycol, diethylene glycol, dipropylene glycol, triethylene glycol and tetraethyleneglycol.
Examples of alkoxyalcohols include, but are not limited to, 3-methoxy-3-methyl-1-butanol, 3-methoxy-1-butanol, 1-methoxy-2-butanol, and glycol monoethers.
Examples of glycol monoethers include, but are not limited to, ethylene glycol monomethyl ether, ethylene glycol monoethyl ether, ethylene glycol mono n-propyl ether, ethylene glycol monoisopropyl ether, ethylene glycol mono n-butyl ether, diethylene glycol monomethyl ether, diethylene glycol monoethyl ether, diethylene glycol monobutylether, triethylene glycol monomethyl ether, triethylene glycol monoethyl ether, triethylene glycol monobutyl ether, 1-methoxy-2-propanol, 2-methoxy-1-propanol, 1-ethoxy-2-propanol, 2-ethoxy-1-propanol, propylene glycol mono-n-propyl ether, dipropylene glycol monomethyl ether, dipropylene glycol monoethyl ether, dipropylene glycol monobutyl ether, dipropylene glycol mono-n-propyl ether, tripropylene glycol monoethyl ether, tripropylene glycol monomethyl ether, ethylene glycol monobenzyl ether, and diethylene glycol monobenzyl ether.
Examples of saturated aliphatic monohydric alcohols include, but are not limited to, methanol, ethanol, n-propyl alcohol, isopropyl alcohol, 1-butanol, 2-butanol, isobutyl alcohol, tert-butyl alcohol, 2-pentanol, t-pentyl alcohol, and 1-hexanol.
Examples of unsaturated non-aromatic monohydric alcohols include, but are not limited to, allyl alcohol, propargyl alcohol, 2-butenyl alcohol, 3-butenyl alcohol, and 4-penten-2-ol.
Examples of alcohols containing a ring structure include, but are not limited to, tetrahydrofurfuryl alcohol, furfuryl alcohol, and 1,3-cyclopentanediol.
Examples of ketones include, but are not limited to, acetone, propanone, cyclobutanone, cyclopentanone, cyclohexanone, diacetone alcohol, 2-butanone, 5-hexanedione, 1,4-cyclohexanedione, 3-hydroxyacetophenone, 1,3-cyclohexanedione, and cyclohexanone.
Examples of esters include, but are not limited to, ethyl acetate, glycol monoesters (such as ethylene glycol monoacetate and diethyleneglycol monoacetate), and glycol monoether monoesters (such as propylene glycol monomethyl ether acetate, ethylene glycol monomethyl ether acetate, propylene glycol monoethyl ether acetate, and ethylene glycol monoethyl ether acetate).
In certain embodiments, the compositions of the disclosure include at least about 95 wt % total organic solvent.
The compositions of the present disclosure include water. In certain embodiments, the water is de-ionized and ultra-pure, contains no organic contaminants and has a minimum resistivity of about 4 to about 17 mega Ohms. In some embodiments, the resistivity of the water is at least about 17 mega Ohms. In some embodiments, the compositions of this disclosure include about 0.5 wt % to about 2 wt % of water.
In some embodiments, the compositions of the present disclosure may contain additives such as, additional corrosion inhibitors, surfactants, additional organic solvents, biocides, and defoaming agents as optional components.
Examples of suitable defoaming agents include polysiloxane defoamers (e.g., polydimethylsiloxane), polyethylene glycol methyl ether polymers, ethylene oxide/propylene oxide copolymers, and glycidyl ether capped acetylenic diol ethoxylates (such as those described in U.S. Pat. No. 6,717,019, herein incorporated by reference). Optional surfactants may be cationic, anionic, nonionic or amphoteric.
In some embodiments, the etching compositions of the present disclosure may specifically exclude one or more of the additive components, in any combination, if more than one. Such components are selected from the group consisting of oxygen scavengers, quaternary ammonium salts including quaternary ammonium hydroxides, amines, alkaline bases (such as NaOH, KOH, and LiOH), surfactants other than a defoamer, a defoamer, fluoride-containing compounds other than HF, abrasives, hydroxycarboxylic acids, carboxylic and polycarboxylic acids lacking amino groups, buffering agents, and non-azole corrosion inhibitors.
The compositions of this disclosure may be prepared by simply mixing the components together, or may be prepared by blending two compositions in a kit.
In one embodiment of the present disclosure, there are provided methods for cleaning a semiconductor substrate. Such methods can be performed, for example, by contacting the semiconductor substrate containing post etch residues and/or post ash residues with a cleaning composition of the disclosure. In some embodiments, the method includes rinsing the substrate after the contacting step.
In some embodiments, the method does not substantially remove Co, SiN, or Cu in the semiconductor substrate. For example, the method does not remove more than about 5% by weight (e.g., more than about 3% by weight or more than about 1% by weight) of Co, SiN, or Cu in the semiconductor substrate.
In some embodiments, the etching method further includes forming a semiconductor device (e.g., an integrated circuit device such as a semiconductor chip) from the semiconductor substrate obtained by the method described above.
Semiconductor substrates typically are constructed of silicon, silicon germanium, Group III-V compounds like GaAs, or any combination thereof. The semiconductor substrates may additionally contain exposed integrated circuit structures such as interconnect features (e.g., metal lines and dielectric materials). Metals and metal alloys used for interconnect features include, but are not limited to, aluminum, aluminum alloyed with copper, copper, titanium, tantalum, cobalt, silicon, titanium nitride, tantalum nitride, and tungsten. The semiconductor substrate may also contain layers of interlayer dielectrics, silicon oxide, silicon nitride, silicon carbide, titanium oxide, and carbon doped silicon oxides.
The semiconductor substrate can be contacted with the composition of the disclosure by any suitable method, such as placing the composition into a tank and immersing and/or submerging the semiconductor substrates into the composition, spraying the composition onto the semiconductor substrate, streaming the composition onto the semiconductor substrate, or any combinations thereof. In some embodiments, the semiconductor substrate is immersed into the composition.
The compositions of the present disclosure may be effectively used up to a temperature of about 85° C. In some embodiments, the compositions can be used from about 20° C. to about 80° C. In some embodiments, the compositions can be employed in the temperature range from about 55° C. to about 65° C. In some embodiments, a temperature range of about 60° C. to about 65° C. is employed.
Ranges of time in which the semiconductor substrate is in contact with the compositions of the disclosure can vary widely depending on the particular method, thickness and temperature employed. In an immersion batch type process, a suitable time range is, for example, up to about 10 minutes. In some embodiments, a range for a batch type process is from about 1 minute to about 7 minutes. In some embodiments, a time range for a batch type process is from about 1 minute to about 5 minutes. In some embodiments, a time range for a batch type process is from about 2 minutes to about 4 minutes.
The amount of time in which a single wafer is in contact with a composition of the disclosure may range from about 30 seconds to about 5 minutes. In some embodiments, a time for a single wafer process may range from about 30 seconds to about 4 minutes. In some embodiments, a time for a single wafer process may range from about 1 minute to about 3 minutes. In some embodiments, a time for a single wafer process may range from about 1 minute to about 2 minutes.
To further promote the cleaning ability of the compositions of the present disclosure, mechanical agitation means may be employed. Examples of suitable agitation means include circulation of the composition over the substrate, streaming or spraying the composition over the substrate, and ultrasonic or megasonic agitation during the cleaning process. The orientation of the semiconductor substrate relative to the ground may be at any angle. Horizontal or vertical orientations are preferred.
Subsequent to the cleaning, the semiconductor substrate is optionally rinsed with a suitable rinse solvent for about 5 seconds up to about 5 minutes with or without agitation means. Multiple rinse steps employing different rinse solvents may be employed. Examples of suitable rinse solvents include, but are not limited to, deionized (DI) water, methanol, ethanol, isopropyl alcohol, N-methylpyrrolidinone, gamma-butyrolactone, dimethyl sulfoxide, ethyl lactate and propylene glycol monomethyl ether acetate. Alternatively, or in addition, aqueous rinses with pH>8 (such as dilute aqueous ammonium hydroxide) may be employed. Examples of rinse solvents include, but are not limited to, dilute aqueous ammonium hydroxide, DI water, methanol, ethanol and isopropyl alcohol. In some embodiments, the rinse solvents are dilute aqueous ammonium hydroxide, DI water and isopropyl alcohol. In some embodiments, the rinse solvents are dilute aqueous ammonium hydroxide and DI water. The solvent may be applied using means similar to that used in applying a composition described herein. The composition of the disclosure may have been removed from the semiconductor substrate prior to the start of the rinsing step or it may still be in contact with the semiconductor substrate at the start of the rinsing step. In some embodiments, the temperature employed in the rinsing step is between 16° C. and 27° C.
Optionally, the semiconductor substrate is dried after the rinsing step. Any suitable drying means known in the art may be employed. Examples of suitable drying means include spin drying, flowing a dry gas across the semiconductor substrate, or heating the semiconductor substrate with a heating means such as a hotplate or infrared lamp, Maragoni drying, rotagoni drying, IPA drying or any combinations thereof. Drying times will be dependent on the specific method employed but are typically on the order of 30 seconds up to several minutes.
The present disclosure is illustrated in more detail with reference to the following examples, which are for illustrative purposes and should not be construed as limiting the scope of the present disclosure.
Any percentages listed are by weight (wt %) unless otherwise specified. Controlled stirring during testing was done with a 1 inch stirring bar at 300 rpm unless otherwise noted.
Samples of cleaning compositions were prepared by adding, while stirring, to the calculated amount of organic solvent the remaining components of the formulation. After a uniform solution was achieved, optional additives, if used, were added.
The cleaning of PER (Post Etch Residue) from a substrate was carried out with the described cleaning compositions using a multilayered substrate of photoresist/TiOx/SiN/Co/ILD (ILD=Inter Layer Dielectric) or photoresist/TiOx/SiN/W/ILD that had been patterned lithographically, etched in a plasma metal etcher, and followed by oxygen plasma ashing to remove the top layer of photoresist completely.
The test coupons were held using 4″ long plastic locking tweezers, whereby the coupon could then be suspended into a 500 ml volume Teflon beaker containing approximately 200 milliliters of the cleaning compositions of the present disclosure. Prior to immersion of the coupon into the cleaning composition, the composition was pre-heated to the desired test condition temperature (typically 40° C. or 60° C. as noted) with controlled stirring. The cleaning tests were then carried out by placing the coupon which was held by the plastic tweezers into the heated composition in such a way that the PER layer containing side of the coupon faced the stir bar. The coupon was left static in the cleaning composition for a time period (typically 2 to 5 minutes) while the composition was kept at the test temperature under controlled stirring. When the desired cleaning time was completed, the coupon was quickly removed from the cleaning composition and placed in a 500 ml plastic beaker filled with approximately 400 ml of DI water at ambient temperature (˜17° C.) with gentle stirring. The coupon was left in the beaker of DI water for approximately 30 seconds, and then quickly removed, and rinsed under a DI water stream at ambient temperature for about 30 seconds. The coupon was immediately exposed to a nitrogen gas stream from a hand held nitrogen blowing gun, which caused any droplets on the coupon surface to be blown off the coupon, and further, to completely dry the coupon device surface. Following this final nitrogen drying step, the coupon was removed from the plastic tweezers holder and placed into a covered plastic carrier with the device side up for short term storage no greater than about 2 hours. The scanning electron microscopy (SEM) images were then collected for key features on the cleaned test coupon device surface.
The blanket Co on silicon substrate, W on silicon substrate, TiOx on SiO2 on silicon substrate, SiN on silicon substrate, ILD on silicon substrate were diced into approximately 1 inch×1 inch square test coupons for the materials compatibility tests. The test coupons were initially measured for thickness or sheet resistance by the 4-point probe, CDE Resmap 273 for metallic film (Co, W), or by Elipsometry for dielectric film (TiOx, SiN and ILD) using a Woollam M-2000X. The test coupons were then installed on the 4″ long plastic locking tweezers and treated as described in the cleaning procedure in General Procedure 3 with the Co, W, TiOx, SiN, or ILD layer containing side of the coupon faced the stir bar for 10 minutes.
After the final nitrogen drying step, the coupon was removed from the plastic tweezers holder and placed into a covered plastic carrier. The post-thickness or sheet resistance was then collected on the post-processing test coupon surface by the 4-point probe, CDE Resmap 273 for metallic film (Co and W) or by Elipsometry for dielectric film (TiOx, SiN and ILD) using a Woollam M-2000X.
Formulations Examples 1 and 2 and Comparative Formulation Example 1 were prepared according to General Procedure 1, and evaluated according to General Procedures 2 and 3. The results are summarized in Table 1.
Table 1 demonstrates the markedly improved TiOx compatibility of formulations of the disclosure compared to a formulation without a corrosion inhibitor of the disclosure.
Formulations Examples 3 and 4 were prepared according to General Procedure 1, and evaluated according to General Procedures 2 and 3. The results are summarized in Table 2.
Table 2 demonstrates improved compatibility with SiN of a formulation of the disclosure containing two corrosion inhibitors.
Formulations Examples 5-8 and Comparative Formulation Example 2 were prepared according to General Procedure 1, and evaluated according to General Procedures 2 and 3. The results are summarized in Table 3.
Table 3 demonstrates markedly improved TiO2 and Co etch rates for formulations of the disclosure containing two solvents and a corrosion inhibitor, compared to a two solvent formulation without a corrosion inhibitor.
To further elaborate on the compositions of this disclosure, additional formulation examples are set forth in Table 4.
While the invention has been described in detail with reference to certain embodiments thereof, it will be understood that modifications and variations are within the spirit and scope of that which is described and claimed.
The present application claims priority to U.S. Provisional Application Ser. No. 62/192,243, filed on Jul. 14, 2015, which is hereby incorporated by reference in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/US16/42190 | 7/14/2016 | WO | 00 |
| Number | Date | Country | |
|---|---|---|---|
| 62192243 | Jul 2015 | US |
