Claims
- 1. A semiconductor device, comprising:
a semiconductor substrate having a surface and defining a via hole therein through the surface; an electrode over the surface of the substrate; and a set of one or more transistor element(s) over the surface of the substrate, each transistor element in the set comprising at least one contact that is electrically connected to the electrode, wherein the set of transistor element(s) compactly surrounds the electrode and via hole.
- 2. The semiconductor device as claimed in claim 1, wherein the semiconductor substrate includes a via inner wall that defines the via hole, and the via inner wall electrically connects the electrode with a second electrode disposed on another surface of the substrate.
- 3. The semiconductor device as claimed in claim 1, wherein the set of transistor element(s) is within a distance of not more than 300 microns from a reference point related to the electrode and via hole.
- 4. The semiconductor device as claimed in claim 1, wherein said set comprises at least one bipolar junction transistor, and an aggregate emitter length of the bipolar junction transistor(s) in the set is not less than about 10 microns.
- 5. The semiconductor device as claimed in claim 4, wherein an aggregate collector length and/or aggregate base length of the bipolar junction transistor is not less than about 10 microns.
- 6. The semiconductor device as claimed in claim 1, wherein said set comprises at least one bipolar junction transistor, and a total emitter area of the bipolar junction transistor(s) in the set is not less than about 400 square microns.
- 7. The semiconductor device as claimed in claim 1, further comprising:
a feed having a tree-structure for balancing a feed signal, each semiconductor element having at least one contact that is electrically connected to the feed.
- 8. The semiconductor device as claimed in claim 1, further comprising:
a second feed having a tree-structure for balancing a feed signal, each semiconductor element having at least one contact that is electrically connected to the second feed.
- 9. The semiconductor device as claimed in claim 8, further comprising:
an insulating layer disposed on the electrode; a third electrode disposed on the insulating layer, each transistor element including at least one contact that is electrically connected to the second electrode; and a metal connection that electrically connects the second electrode to a third electrode.
- 10. The semiconductor device as claimed in claim 1, wherein the electrode has a circular or polygonal shape.
- 11. The semiconductor device as claimed in claim 1, at least one of the transistor element(s) continuously surrounding the electrode.
- 12. The semiconductor device as claimed in claim 1, wherein at least one of the transistor element(s) has a circular or polygonal shape.
- 13. A semiconductor device, comprising:
a semiconductor substrate having a surface; an electrode over the surface of the substrate; and a set of one or more transistor element(s) over the surface of the substrate, each transistor element in the set comprising at least one contact that is electrically connected to the electrode, wherein the set of transistor element(s) compactly surrounds the electrode, said set comprising one or more bipolar junction transistor(s), wherein said bipolar junction transistor(s) has or have an aggregate emitter length not less than about 10 microns, and/or a total emitter area of not less than about 400 square microns.
- 14. The semiconductor device as claimed in claim 13, wherein an aggregate collector length and/or aggregate base length of the bipolar junction transistor is not less than about 10 microns.
- 15. The semiconductor device as claimed in claim 13, wherein the set of transistor element(s) is within a distance of not more than 300 microns from a reference point related to the electrode.
- 16. The semiconductor device as claimed in claim 13, the semiconductor substrate defining a via hole therein through the surface; wherein the set of transistor element(s) compactly surrounds the via hole.
- 17. The semiconductor device as claimed in claim 16, wherein the set of transistor element(s) is within a distance of not more than 300 microns from a reference point related to the via hole.
- 18. The semiconductor device as claimed in claim 16, wherein the semiconductor substrate includes a via inner wall that defines the via hole, and the via inner wall electrically connects the electrode with a second electrode disposed on another surface of the substrate.
- 19. A power amplifier semiconductor device, comprising:
a semiconductor substrate having a surface; an electrode over the surface of the substrate; a set of one or more transistor element(s) over the surface of the substrate, each transistor element in the set comprising at least one contact that is electrically connected to the electrode, wherein the set of transistor element(s) compactly surrounds the electrode; and a RF circuit element electrically connected to at least one of the element(s).
- 20. The semiconductor device as claimed in claim 19, wherein the circuit element comprises a RF inductor.
- 21. The semiconductor device as claimed in claim 19, wherein at least one of the element(s) is a bipolar junction transistor, and the circuit element is electrically connected to a collector of the bipolar junction transistor.
- 22. The semiconductor device as claimed in claim 19, wherein the set comprises at least one bipolar junction transistor and said transistor(s) has or have an aggregate emitter length not less than about 10 microns, and/or a total emitter area of not less than about 400 square microns.
- 23. The semiconductor device as claimed in claim 22, wherein an aggregate collector length and/or aggregate base length of the bipolar junction transistor is not less than about 10 microns.
- 24. The semiconductor device as claimed in claim 19, wherein the set of transistor element(s) is within a distance of not more than 300 microns from a reference point related to the electrode.
- 25. The semiconductor device as claimed in claim 19, the semiconductor substrate defining a via hole therein through the surface; wherein the set of transistor element(s) compactly surrounds the via hole.
- 26. The semiconductor device as claimed in claim 25, wherein the set of transistor element(s) is within a distance of not more than 300 microns from a reference point related to the via hole.
- 27. The semiconductor device as claimed in claim 25, wherein the semiconductor substrate includes a via inner wall that defines the via hole, and the via inner wall electrically connects the electrode with a second electrode disposed on another surface of the substrate.
- 28. A method for power amplification comprising:
providing a semiconductor device comprising:
a semiconductor substrate having a surface; an electrode over the surface of the substrate; set of one or more transistor element(s) over the surface of the substrate, each transistor element in the set comprising at least one contact that is electrically connected to the electrode, wherein the set of transistor element(s) compactly surrounds the electrode; and supplying a RF signal to the device, so that the device provides an amplified RF output signal.
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation-in-part of U.S. patent application Ser. No. 09/903,303, filed Jul. 10, 2001.
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09903303 |
Jul 2001 |
US |
Child |
10327512 |
Dec 2002 |
US |