This application claims priority to Chinese Patent Application No. CN202310019895.2, filed on Jan. 6, 2023, which is hereby incorporated by reference in its entirety.
The present disclosure relates to the field of semiconductor technologies, and in particular, to a composite substrate and a manufacturing method therefor, and a semiconductor device structure.
At present, a Metal Organic Chemical Vapor Desposition (MOCVD) method is usually used for a commercial large-scale preparation of a gallium nitride epitaxial wafer. Materials of substrates used for epitaxial growth of GaN through the MOCVD method should be selected, as much as possible, to be the same material, which is of little lattice mismatch and has a low thermal expansion coefficient. However, due to an extremely high melting point and high nitrogen saturation vapor pressure of GaN-based materials, it is hard to prepare a large-area and high-quality GaN substrate. And due to a lack of a substrate that matches the GaN lattice, currently, it is general to use a heterogeneous substrate with lattice mismatch and thermal expansion coefficient mismatch to epitaxially grow a GaN epitaxial wafer. The most commonly used heterogeneous substrates include a sapphire substrate and a silicon substrate.
As a significant gallium nitride heterogeneous epitaxial substrate, silicon substrate has advantages such as high crystal quality, large wafer size, high thermal conductivity (about three times that of sapphire), low price, and controllable substrate conductivity through doping, which has attracted increasing attention from the industry.
In view of this, embodiments of the present disclosure provide a composite substrate and a manufacturing method therefor, and a semiconductor device structure to solve a technical problem of low strength and high probability of fragmentation of silicon substrates.
According to an aspect of the present disclosure, a composite substrate is provided by an embodiment of the present disclosure, and the composite substrate includes: a substrate; and a plurality of strengthening structures disposed within the substrate at intervals, where a material of the plurality of strengthening structures is a poly-crystal material or an amorphous material.
As an optional embodiment, the substrate includes a first region and a second region stacked in a vertical direction, and the plurality of strengthening structures are disposed between the first region and the second region, or completely disposed in the first region, or completely disposed in the second region.
As an optional embodiment, the plurality of strengthening structures penetrate through the first region or penetrate through the second region.
As an optional embodiment, a material of the substrate is single-crystal silicon.
As an optional embodiment, the material of the plurality of strengthening structures is one or more combinations of silicon dioxide, silicon nitride, silicon oxynitride, amorphous silicon, and poly-silicon.
As an optional embodiment, a shape of projection of the plurality of strengthening structures on a plane where the substrate is located includes any one of a polygon, a circle, an ellipse, a strip, and a mesh.
As an optional embodiment, a quantity of the plurality of strengthening structures per unit area gradually increases from a center to an edge; or a size of the plurality of strengthening structures gradually increases from the center to the edge.
As an optional embodiment, a thickness of the plurality of strengthening structures ranges from 1 to 100 μm.
As an optional embodiment, the composite substrate further includes a third region disposed on a side, away from the first region, of the second region, where the plurality of strengthening structures includes a first strengthening structure disposed between the first region and the second region, and a second strengthening structure disposed between the third region and the second region.
As an optional embodiment, a projection area of the second strengthening structure on a plane where the substrate is located completely overlaps, or partially overlaps, or completely does not overlap with a projection area of the first strengthening structure on the plane where the substrate is located.
As an optional embodiment, shapes of projection of the first strengthening structure and the second strengthening structure on a plane where the substrate is located include any one of a polygon, a circle, an ellipse, a strip, and a mesh.
As an optional embodiment, the shapes of projection of the first strengthening structure and the second strengthening structure on the plane where the substrate is located are different.
According to another aspect of the present disclosure, a semiconductor device structure is provided by an embodiment of the present disclosure, and the semiconductor device structure includes: a composite substrate provided by an embodiment of the present disclosure, a nucleation layer, a buffer layer and an active layer, where the nucleation layer, the buffer layer and the active layer are disposed on the composite substrate in sequence, and the active layer is any one of a light-emitting diode, a high-electron-mobility transistor, a high mobility diode, a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), a ultraviolet light-emitting diode (UV-LED), a photo-detector, a hydrogen generator and a solar cell.
As an optional embodiment, the semiconductor device structure is a high-electron-mobility transistor, and the active layer includes a GaN channel layer and an AlGaN barrier layer stacked in sequence, and a source electrode, a drain electrode, and a gate electrode disposed on the AlGaN barrier layer.
As an optional embodiment, the semiconductor device structure is a light-emitting diode, the active layer includes an N-type semiconductor layer, a multiple quantum well stack layer, and a P-type semiconductor layer stacked in sequence, a cathode disposed on the N-type semiconductor layer, and an anode disposed on the P-type semiconductor layer.
According to another aspect of the present disclosure, a manufacturing method for a composite substrate is provided by an embodiment of the present disclosure, and the preparation method includes: forming a first region of a substrate; excavating a groove on a surface of the first region to form a first groove; filling the first groove with a strengthening structure; and laterally epitaxially growing a second region on an area, not covered by the strengthening structure, of the first region to form a composite substrate with the strengthening structure inside the substrate.
As an optional embodiment, a depth of the first groove ranges from 1 to 100 μm.
As an optional embodiment, a thickness of the strengthening structure is greater than or equal to the depth of the first groove.
As an optional embodiment, the preparation method further includes: excavating a groove on a surface of the second region to form a second groove; filling the second groove with a second strengthening structure; and laterally epitaxially growing a third region on an area, not covered by the second strengthening structure, of the second region.
The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are only a part of the embodiments of the present disclosure, but not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present disclosure.
A strength of a silicon substrate is low, and probability of fragmentation is high. The thicker a GaN epitaxial layer is, the greater a stress on the silicon substrate during a cooling process after an epitaxial growth of GaN is, which may cause a fragmentation problem easily.
Therefore, to solve a technical problem described above, it is necessary to provide a composite substrate and a preparation method therefor, and a semiconductor device structure to improve the strength of the silicon substrate and avoid the fragmentation problem.
In the present embodiment, a material of the substrate 1 is single-crystal silicon, and the material of the strengthening structure 2 is one or more combinations of silicon dioxide, silicon nitride, silicon oxynitride, amorphous silicon, and poly-silicon. The strengthening structure 2 maywithstand stress, constrain deformation, and prevent extension of a dislocation, thereby enhancing mechanical strength of the composite substrate. The material of the strengthening structure 2 is the poly-crystal material or the amorphous material. By filling the poly-crystal material or the amorphous material in the single-crystal substrate 1, extension of a dislocation in the single-crystal substrate 1 may be prevented, so that strength of the substrate 1 may be improved, and probability of fragmentation of the composite substrate may be reduced.
In the present embodiment, a shape of projection of the strengthening structure 2 on a plane where the substrate 1 is located includes any one of a polygon, a circle, an ellipse, a strip, and a mesh.
According to the embodiments shown in
It can be understood that the shape of projection, distribution regularity, spacing size, and the like of the strengthening structure 2 on the horizontal plane may be changed, as long as the strengthening structure 2 maywithstand stress, constrain deformation, and prevent extension of a dislocation, and can avoid fragmentation of the composite substrate.
In the present embodiment,
In the present embodiment, a projection area of the second strengthening structure 22 on the plane where the substrate 1 is located completely overlaps with a projection area of the first strengthening structure 21 on the plane where the substrate 1 is located (as shown in
Specifically, when the semiconductor device structure is a high-electron-mobility transistor (as shown in
According to another aspect of the present disclosure,
Step S1: forming a first region of a substrate. The substrate may be a single-crystal silicon substrate. As shown in
Step S2: excavating a groove on a surface of the first region to form a first groove. As shown in
Step S3: filling the first groove with a strengthening structure. As shown in
Step S4: laterally epitaxially growing a second region 12 on an area, not covered by the strengthening structure, of the first region 11 to form a composite substrate with the strengthening structure inside the substrate (as shown in
In some embodiments, the manufacturing method further includes: excavating a groove on a surface of the second region 12 to form a second groove 202; filling the second groove 202 with a second strengthening structure 22; and laterally epitaxially growing a third region 13 on an area, not covered by the second strengthening structure 22, of the second region 12 (as shown in
The present disclosure provides a composite substrate and a manufacturing method therefor, and a semiconductor device structure. The composite substrate includes a substrate and a plurality of strengthening structures, where the plurality of strengthening structures are disposed within the substrate at intervals, and a material of the plurality of strengthening structures is a poly-crystal material or an amorphous material. The composite substrate provided by the present disclosure may withstand stress, constrain deformation, and prevent extension of a dislocation by providing the strengthening structures inside the substrate, thereby enhancing mechanical strength of the composite substrate. On the one hand, by filling the poly-crystal material or the amorphous material in the single-crystal substrate, the extension of the dislocation in single-crystal substrate may be prevented, so that the strength of substrate may be improved, and probability of fragmentation of the composite substrate may be reduced. On the other hand, a lateral epitaxial method may reduce defect density by defect merging, and further reduce the probability of fragmentation of the composite substrate.
It should be understood that the term “including” and its variations used in the present disclosure are open-ended, that is, “including but not limited to”. The term “one embodiment” means “at least one embodiment”, the term “another embodiment” means “at least one other embodiment”. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described may be combined in an appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art may combine and assembly different embodiments or examples described in this specification, as well as features of the different embodiments or examples, without contradiction.
The embodiments described above are only preferred embodiments of the present disclosure, and not intended to limit the protection scope of the present disclosure. Any modification, equivalent replacement, and so on that are made in the spirit and principle of the present disclosure shall fall into the protection scope of the present disclosure.
Number | Date | Country | Kind |
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202310019895.2 | Jan 2023 | CN | national |