Patent Application
20090166866
The application generally relates to integrated circuits (ICs) or semiconductor devices and methods for making such devices. More particularly, this application relates to forming metal contacts to silicon substrates in semiconductor processing for contact diameters less than 60 nm.
Semiconductor devices are built in semiconductor materials, typically silicon wafers (or substrates), through a series of processes. One of these processes forms a contact between a conductive layer (usually containing a metal) and the silicon in the substrate. The metal layers (or lines) are necessary to connect the various devices together on the substrate. The interface between the metal layer and the silicon is often referred to as a metal contact.
The following description can be better understood in light of the Figures, in which:
The Figures illustrate specific aspects of the semiconductor devices and associated methods of making and using such devices. Together with the following description, the Figures demonstrate and explain the principles of the semiconductor devices and associated methods. In the drawings, the thickness of layers and regions are exaggerated for clarity. It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. The same reference numerals in different drawings represent the same element, and thus their descriptions will not be repeated.
The following description supplies specific details in order to provide a thorough understanding. Nevertheless, the skilled artisan would understand that the semiconductor devices and methods for making and using such device can be implemented and used without employing these specific details. For example, while the description focuses on semiconductor devices, it can be modified to be used in other electrical devices that are formed using similar methods. Although the description below focuses on contact metallization between a silicon substrate and tungsten metal lines, this process can be applied to other areas on a semiconductor and using other metals to achieve similar advantages and results.
To be profitable and stay competitive, semiconductor manufacturers are continuously reducing or shrinking the size of semiconductor devices so they can produce more devices for every wafer used. But in some instances, this shrinkage process can create defects in smaller devices when they are shrunk and the component of the semiconductor devices are squeezed closer together. For example, current processes (that operate at dimensions >60 nm) do not provide for low-resistance contact metallization between Tungsten (W) and Silicon (Si). Low resistance between the silicon and the metal are necessary to reduce the power consumption and reduce the heat created since heat in semiconductor devices degrades speed and performance. But current processes do not allow W to form metal contacts with diameters less than 60 nm without resulting in an unacceptable level of defects.
The process for contact metallization contains a series of steps enabling low ohmic contact between the silicon in the source or drain regions and metal lines. The source and drain are two parts of a transistor separated by a gate, the third part of that transistor. The source and drain regions are created by diffusing elements like boron (B), phosphorous (P), arsenic (As) in silicon to change the silicon's electrical properties. Contact metallization is a sequence of deposition, thermal treatments, wet cleans and wet etches (or strip) that forms a low resistance contact to silicon (Si).
The contact metallization process begins with an etching process, or pre-clean, as shown in
Next, a contact metal deposition deposits a layer of metal. An example of this metal deposition is illustrated in
Next, a liner deposition step deposits a protective layer on the contact metal to impede oxidation growth during the silicide formation. An example of this process is illustrated in
Next, a silicide formation step uses a rapid thermal anneal process to melt the contact metal into the silicon in the contact region and form a silicide. An example is illustrated in
Next, a strip process is used to remove the remaining non-reacted metal and sacrificial liner from the top of the contact area and the sidewalls. An example of this process is illustrated in
Next, a pre-adhesion clean follows the strip process and can be used to remove any oxide acting as high resistance layer between the silicide and the later-deposited tungsten (W) metal in the contact region. An example of this process is illustrated in
Next, an adhesion deposition process is used to deposit a thin conducting layer to create an adhesion between the tungsten (to be deposited later) and the silicon. An example of this process is illustrated in
Finally, a metal deposition process deposits the metal for the conducting layer 600. While any metal can be used in conducting layer 600, in some embodiments W is used as the metal. The deposited conducting layer adheres to the silicon and forms a low resistance contact with the silicide 300 in the silicon substrate 102. An example of this process is illustrated in
An advantage of this process outlined above is to form a silicide after the contact openings are formed, instead of forming the silicide regions earlier in the process. This later formation of silicide allows higher temperatures to be used in the processing. Heat and high temperatures have an adverse effect on silicide since higher temperatures cause the metal in the silicide alloy to meld, expand, agglomerate, diffuse, and migrate in the silicon so the area of the silicide extends both deeper and wider in the silicon substrate. This silicide expansion can both dilute the concentration of the silicide, creating a higher resistance in the contact area and extending into other unintended parts of the device impairing or destroying device performance. Moving the silicide formation into a later part of the process flow keeps the silicide formation narrow and concentrated in the predetermined region, enabling devices to shrink down to dimensions of 30 nm while still allowing thermal steps to be used earlier in the flow.
The strip step or removal of the non-reacted silicide material and sacrificial liner provides another advantage because it creates a larger opening in the trench for the tungsten (W) to fill. Because the heat used in the silicide formation causes the remaining non-reacted metal or silicide material to oxidize, this metal is more resistive than the pure tungsten used to fill the contact trenches. The more resistive oxide material generates more heat than the pure metal when current runs through it, and heat degrades performance in semiconductors. Both of these advantages allow for smaller metal contacts in next generation die shrinks.
The process outlined above manufactures metal contacts and structures with several advantageous features. The process allows formation of metal contacts with a radius of about 60 nm or less, and in some embodiments, about 45 nm or less. One structure formed from this process comprises pin-shaped metal contacts with a radius of 35 nm or less, as shown in
Having described the preferred aspects of the devices and associated methods, it is understood that the appended claims are not to be limited by particular details set forth in the above description, as many apparent variations thereof are possible without departing from the spirit or scope thereof.
