Patent Application
20120074523
Embodiments of the present description generally relate to the field of fabricating microelectronic substrates, such as silicon wafers, and, more particularly, to a controlling bowing in a microelectronic substrates that may occur during epitaxial layer deposition.
The subject matter of the present disclosure is particularly pointed out and distinctly claimed in the concluding portion of the specification. The foregoing and other features of the present disclosure will become more fully apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. It is understood that the accompanying drawings depict only several embodiments in accordance with the present disclosure and are, therefore, not to be considered limiting of its scope. The disclosure will be described with additional specificity and detail through use of the accompanying drawings, such that the advantages of the present disclosure can be more readily ascertained, in which:
a and 4b illustrate epitaxial structure bowing on differing substrate sizes.
In the following detailed description, reference is made to the accompanying drawings that show, by way of illustration, specific embodiments in which the claimed subject matter may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the subject matter. It is to be understood that the various embodiments, although different, are not necessarily mutually exclusive. For example, a particular feature, structure, or characteristic described herein, in connection with one embodiment, may be implemented within other embodiments without departing from the spirit and scope of the claimed subject matter. In addition, it is to be understood that the location or arrangement of individual elements within each disclosed embodiment may be modified without departing from the spirit and scope of the claimed subject matter. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the subject matter is defined only by the appended claims, appropriately interpreted, along with the full range of equivalents to which the appended claims are entitled. In the drawings, like numerals refer to the same or similar elements or functionality throughout the several views, and that elements depicted therein are not necessarily to scale with one another, rather individual elements may be enlarged or reduced in order to more easily comprehend the elements in the context of the present description.
Embodiments of the present description relate to the field of epitaxial structures for microelectronic device formation, particularly to heavily doped, substrates having a compensation component embedded along the dopant to prevent bowing of the substrate during deposition of an epitaxial layer.
The substrate 100 may have a front surface 102, a back surface 104, a central axis 106 which is substantially perpendicular to the substrate front surface 102 and the substrate back surface 104, a circumferential edge 108 extending between the substrate front surface 102 and the substrate back surface 104, and a radius 110 extending from the substrate central axis 106 to the substrate circumferential edge 108.
An epitaxial layer 122 may be deposited, such as by chemical vapor deposition, on the substrate front surface 102 (see
The deposition of the epitaxial layer 122 may cause the epitaxial structure 120 to “bow” due to a lattice constant mismatch between the epitaxial layer 122 and the substrate 100.
In one example, where a heavily doped silicon substrate is doped with boron, the lattice constant of the substrate decreases due to the difference in the covalent radius between silicon (about 1.17 Å) and boron (about 0.88 Å). In other words, boron atoms are smaller than silicon atoms causing shrinkage of the silicon lattice, which may cause the substrate to bow. The lattice constant “a” relationship to boron concentration is (in Angstroms):
a[B]=1.17−(1.17−0.88)×[B]/[Si]
where: [B] is the Boron concentration in atoms·cm−3 and [Si] is 5×1022 cm−3
The bow of the epitaxial structure 120 due to lattice mismatch is (in cm):
Bow={3×tEPI×r2E}/t2SUB
where:
tEPI is the epitaxial layer thickness
r is the substrate radius
tSUB is the substrate thickness
E={a(a(Epi)−a(Sub)}/a(Sub)
As the industry moves to larger size/diameter substrates, the current options for reducing bowing are to reduce the thickness of the epitaxial layer 122 or to increase the resistivity of the substrate 100, neither of which may be desired.
In an embodiment of the present description, the substrate 100 is co-doped with a dopant and a compensation component. The compensation component acts to adjust the lattice mismatch between the substrate 100 and the epitaxial layer 122, which reduces or substantially eliminates bowing of the epitaxial structure 120. In one embodiment, the compensation component may be incorporated into the substrate 100 at the same time as the dopant is incorporated during the formation of the substrate ingot, as previously discussed. When the dopant atoms are smaller than substrate atoms, then the compensation component will have atoms larger than substrate atoms. When the dopant atoms are larger than substrate atoms, then the compensation component will have atoms smaller than substrate atoms. Thus, the substrate may be tuned with the addition of the compensation component to have a lattice constant that is substantially the same as that of a selected epitaxial layer, which reduces or substantially eliminates post epitaxial layer strain.
In one embodiment, the substrate may comprise silicon, the dopant may be boron, and the compensation component may be a group IV atom, such as germanium and tin, which are larger than boron atoms to compensate for lattice shrink caused by the boron.
In a specific embodiment, the substrate may comprise silicon, the dopant may be boron, and the compensation component may be germanium. Germanium atoms have a covalent radius of about 1.22 Å, which will compensate for a smaller boron atom covalent radius of 0.88 Å. In one embodiment, the concentration level of the germanium may be about 5 grams per 1 kilogram of silicon for a substrate resistivity between about 0.005 and 0.01 ohm·cm. For germanium doping, the segregation coefficient is about 0.7, which is very similar to the boron segregation coefficient. Therefore, the germanium and boron concentrations may change in a similar manner during the crystal growth as shown in
In another embodiment, the substrate may comprise silicon, the dopant may be boron, and the compensation component may be tin. Tin atoms have a covalent radius of about 1.41 Å, which will compensate for the smaller boron atom covalent radius of 0.88 Å. In an embodiment, the concentration level of the tin may be about 1 gram per 1 kilogram of silicon for a substrate resistivity between about 0.005 and 0.01 ohm·cm.
Unless explicitly noted otherwise, reference to the heavily doped substrates as “N++” or “P++” is understood to also refer to substrates having doping levels conventionally referred to as N+ and N+++ or P+ and P+++, respectively. Furthermore, unless explicitly noted otherwise, reference to the lightly doped epitaxial layer as “N” or “P” should be understood to also refer to substrates having doping levels conventionally referred to as N- or P-, respectively.
It is also understood that the subject matter of the present description is not necessarily limited to specific embodiments described. The subject matter may be applied to other heavily doped substrate applications. Furthermore, the subject matter may also be used in any appropriate application outside of the microelectronic device fabrication field, as will be understood to those skilled in the art.
The detailed description has described various embodiments of the devices and/or processes through the use of illustrations, block diagrams, flowcharts, and/or examples. Insofar as such illustrations, block diagrams, flowcharts, and/or examples contain one or more functions and/or operations, it will be understood by those skilled in the art that each function and/or operation within each illustration, block diagram, flowchart, and/or example can be implemented, individually and/or collectively, by a wide range of hardware, software, firmware, or virtually any combination thereof.
The described subject matter sometimes illustrates different components contained within, or connected with, different other components. It is understood that such illustrations are merely exemplary, and that many alternate structures can be implemented to achieve the same functionality. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Thus, any two components herein combined to achieve a particular functionality can be seen as “associated with” each other such that the desired functionality is achieved, irrespective of structures or intermediate components. Likewise, any two components so associated can also be viewed as being “operably connected”, or “operably coupled”, to each other to achieve the desired functionality, and any two components capable of being so associated can also be viewed as being “operably couplable”, to each other to achieve the desired functionality. Specific examples of operably couplable include but are not limited to physically mateable and/or physically interacting components and/or wirelessly interactable and/or wirelessly interacting components and/or logically interacting and/or logically interactable components.
It will be understood by those skilled in the art that terms used herein, and especially in the appended claims are generally intended as “open” terms. In general, the terms “including” or “includes” should be interpreted as “including but not limited to” or “includes but is not limited to”, respectively. Additionally, the term “having” should be interpreted as “having at least”.
The use of plural and/or singular terms within the detailed description can be translated from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or the application.
It will be further understood by those skilled in the art that if an indication of the number of elements is used in a claim, the intent for the claim to be so limited will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. Additionally, if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should typically be interpreted to mean “at least” the recited number.
The use of the terms “an embodiment,” “one embodiment,” “some embodiments,” “another embodiment,” or “other embodiments” in the specification may mean that a particular feature, structure, or characteristic described in connection with one or more embodiments may be included in at least some embodiments, but not necessarily in all embodiments. The various uses of the terms “an embodiment,” “one embodiment,” “another embodiment,” or “other embodiments” in the detailed description are not necessarily all referring to the same embodiments.
While certain exemplary techniques have been described and shown herein using various methods and systems, it should be understood by those skilled in the art that various other modifications may be made, and equivalents may be substituted, without departing from claimed subject matter or spirit thereof. Additionally, many modifications may be made to adapt a particular situation to the teachings of claimed subject matter without departing from the central concept described herein. Therefore, it is intended that claimed subject matter not be limited to the particular examples disclosed, but that such claimed subject matter also may include all implementations falling within the scope of the appended claims, and equivalents thereof.
