The present disclosure relates to forming copper layers in semiconductor devices. The present disclosure is particularly applicable to forming hillock-free copper layers in semiconductor devices.
Copper hillocks are usually generated during copper dual damascene processes. Copper hillocks may cause inter layer shorts (ILSs) within semiconductor devices, may introduce nuisance counts, and may cause ineffective monitoring of yield defect densities. Based on these issues, there is a need to remove copper hillocks from copper layers.
Various methods have been developed in an attempt to remove copper hillocks from copper layers. In one method, after chemical mechanical polishing (CMP) to expose a copper layer, the copper layer may be annealed to stimulate the formation of copper hillocks. The copper hillocks may then be removed with an additional polishing step. Alternatively, the copper layer may be annealed in a reducing gas to suppress the formation of copper hillocks.
Further, to promote the adhesion of a barrier layer above the copper layer, the copper layer may be treated with an ammonia (NH3) plasma treatment. However, the NH3 plasma treatment may not be able to efficiently prevent the formation of copper hillocks and may also cause carbon (C) depletion from interlayer dielectric layers (ILDs). Hydrogen (H2) plasma treatment has been used to remove a copper oxide (CuO) film that may form on the copper layer and promote copper hillock formation. However the H2 from the H2 plasma treatment has negative effects on the resistance and leakage of the copper layer through secondary reactions that occur in the process chamber, such as silicon (Si) reacting with hydrogen forming silane that then reacts with copper to form copper silicide (CuSix) on the copper layer, which increases the resistance and leakage of the copper layer.
A need therefore exists for methodology enabling formation of hillock-free copper layers without increasing the resistance or leakage of the copper layer, and the resulting product.
An aspect of the present disclosure is an efficient method for fabricating copper layers without copper hillocks.
Another aspect of the present disclosure is a copper layer on a substrate without copper hillocks.
Additional aspects and other features of the present disclosure will be set forth in the description which follows and in part will be apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present disclosure. The advantages of the present disclosure may be realized and obtained as particularly pointed out in the appended claims.
According to the present disclosure, some technical effects may be achieved in part by a method including: providing a copper layer above a substrate, planarizing the copper layer, performing H2 plasma treatment on the copper layer in a first chamber, and forming a barrier layer over the copper layer in a second chamber, different from the first chamber.
An aspect of the present disclosure includes performing the H2 plasma treatment at 200 to 400° C. Another aspect includes performing the H2 plasma treatment for 5 to 60 seconds. An additional aspect includes performing the H2 plasma treatment at 200 to 600 watts (W). A further aspect includes planarizing the copper layer by CMP. An aspect also includes planarizing the copper layer in a different chamber than the first chamber. Another aspect includes the different chamber being the second chamber. A further aspect includes forming an ILD over the barrier layer. Another aspect includes annealing the copper layer prior to planarizing. Yet an additional aspect includes forming the barrier layer of a nitride, a silicon carbon nitride (SiCNH), or a combination thereof.
Another aspect of the present disclosure is a device including: a substrate, a H2 plasma treated copper layer above the substrate, and a barrier layer over the copper layer, deposited in a different chamber than the H2 plasma treatment, wherein the copper layer is free of copper hillocks.
Aspects include the copper layer including enlarged copper grain boundaries as compared to non-H2 plasma treated copper layers. Another aspect includes the barrier layer including a nitride barrier layer, a SiCNH barrier layer, or a combination thereof. An additional aspect includes an ILD over the barrier layer. A further aspect includes the copper layer being H2 plasma treated at 200 to 400° C. Another aspect includes the copper layer being H2 plasma treated at 200 to 600 W for 5 to 60 seconds.
Another aspect of the present disclosure includes: providing a copper layer above a substrate, annealing the copper layer in a first chamber, CMP the copper layer in the first chamber, performing H2 plasma treatment on the copper layer at 200 to 400° C. and 200 to 600 watts in a second chamber, different from the first chamber, and forming a barrier layer over the copper layer in the first chamber.
An additional aspect includes performing the H2 plasma treatment for 5 to 60 seconds. A further aspect includes forming the barrier layer by depositing a nitride, SiCNH, or a combination thereof. Another aspect includes forming an ILD over the barrier layer.
Additional aspects and technical effects of the present disclosure will become readily apparent to those skilled in the art from the following detailed description wherein embodiments of the present disclosure are described simply by way of illustration of the best mode contemplated to carry out the present disclosure. As will be realized, the present disclosure is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of exemplary embodiments. It should be apparent, however, that exemplary embodiments may be practiced without these specific details or with an equivalent arrangement. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring exemplary embodiments. In addition, unless otherwise indicated, all numbers expressing quantities, ratios, and numerical properties of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term “about.”
The present disclosure addresses and solves the current problem of copper hillocks attendant upon forming copper layers. In accordance with embodiments of the present disclosure, the copper layer is treated in a dedicated chamber with an H2 plasma treatment to reduce the formation of copper hillocks.
Methodology in accordance with embodiments of the present disclosure includes providing a copper layer above a substrate, planarizing the copper layer, performing H2 plasma treatment on the copper layer in a first chamber, forming a barrier layer over the copper layer in a second chamber, different from the first chamber, and forming an ILD over the barrier layer.
Adverting to
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Next, the copper layer 301 may be planarized to be co-planar with the top surface of the layers 103, as illustrated in
As illustrated in
The H2 plasma treatment 501 enlarges grooves of the grain boundaries of the copper layer 401, which then act as buffer zones to suppress copper hillock formation. Use of the H2 plasma treatment 501 also provides high efficiency for copper oxide (CuO) reduction to suppress the formation of copper hillocks and also provide adhesion between the copper layer 401 and subsequent layers above the copper layer 401.
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The embodiments of the present disclosure achieve several technical effects, including copper layers without copper hillocks and without increased resistance or leakage. Embodiments of the present disclosure enjoy utility in various industrial applications as, for example, microprocessors, smart phones, mobile phones, cellular handsets, set-top boxes, DVD recorders and players, automotive navigation, printers and peripherals, networking and telecom equipment, gaming systems, and digital cameras. The present disclosure therefore enjoys industrial applicability in any of various types of highly integrated semiconductor devices.
In the preceding description, the present disclosure is described with reference to specifically exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the present disclosure, as set forth in the claims. The specification and drawings are, accordingly, to be regarded as illustrative and not as restrictive. It is understood that the present disclosure is capable of using various other combinations and embodiments and is capable of any changes or modifications within the scope of the inventive concept as expressed herein.