The present invention relates to a method of wafering a crystal, in particular large crystals such as sapphire, silicon or silicon carbide crystals for optical or electronic applications.
Industrially grown crystals such as sapphire crystals may typically weigh a few kilograms to hundreds of kilograms and have approximately conical/cylindrical irregular outer shapes. From this irregular 3D shape, as illustrated in the photograph of
It is understood that, in a general case, the extracted core may have round, rectangular or any other section. It is also understood that “disc” or “wafer” are generic terms for parallel parts sliced of the said core, irrelevant to shape or thickness it has.
In conventional processes, the crystalline structure axes are determined by measurements performed with X-ray or optical measurement tools, and the optimum distribution of cores to be extracted from a specific crystal may be performed with the aid of a human operator that decides on the best layout.
These processes are however time intensive and costly. Moreover, there is a certain amount of waste due to internal defects present in the crystal and that end up in the discs or wafers that are sliced out of the selected cores. As the growth of such crystals is time consuming and costly, there would be an advantage in reducing the amount of waste material and the discs or wafers with defects.
In view of the foregoing, it is an object of this invention to provide a system and method for wafering industrially grown crystals that reduces waste and increases the yield of the wafering process.
It is advantageous to provide a wafering processing for industrially grown crystals that allows to produce crystal discs or wafers of very high quality with a low rate of defects.
It is advantageous to provide a process for wafering industrially grown crystals that is rapid and economical, in particular that increases automation and reduces human operator intervention.
Objects of this invention have been achieved by providing the crystal wafering method according to claim 1.
Disclosed herein is a method of producing wafers from an industrially grown crystal comprising the steps of:
In an embodiment, the offset position has an amplitude varying in a range of 0 to said slicing pitch (G) thickness of the wafers.
In an advantageous embodiment, the scanning of the crystal comprises an optical scanning of the crystal.
In an advantageous embodiment, the core is placed in a holder, the holder and core positioned in the slicing machine.
In an advantageous embodiment, the crystal axis of the core is measured once more after the core has been cut out of the crystal and the core axis position is adjusted by means of the holder such that the slicing tool cuts wafers orthogonally to the adjusted crystal axis.
In an advantageous embodiment, a largest diameter core (Dmax) cut out of the crystal is positioned such that a minimum number of defects are found, by computation using the 3D volumetric digital model, in the wafers to be cut out of the crystal.
In an advantageous embodiment, the absolute value of the offset is calculated from a reference position on the surface of the crystal prior to the coring operation.
In an advantageous embodiment, the scanning step of defects and geometry of the crystal is performed after a cropping operation of top and/or bottom ends of the raw crystal.
In an advantageous embodiment, the crystal comprises a plurality crystal axes, the method comprising generating flat planes intersecting the core or the wafers, the flat planes parallel to an axis of the core and orthogonal to the crystal axes, computing a number of defects between said flat planes and an outer contour of the core or wafers, selecting one of said flat planes for cutting for which a maximum number of defects are positioned within the removed area between the flat plane and the outer contour.
In an advantageous embodiment, a non-circular pattern such as a pattern for semi-conductor chips to be cut out of a wafer are oriented according to one of a plurality of crystal axes (C2, C3) computed such that a minimum number of defects are found within the area of the chips or within a minimum number the chips, and a maximum number of defects are found within a removed area between an outer contour of the pattern of chips and an outer circular periphery of the wafer.
In an advantageous embodiment, said pattern of chips is included in a 3D volumetric digital model of the crystal for computation of the offset to take into account the defects positioned in a waste area between the outer diameter of the wafer and the chips to be cut out of the wafer.
Also disclosed herein is a system for producing wafers from an industrially grown crystal comprising: a scanner for scanning a crystal in volume and a program module configured for forming a 3D volumetric digital model of the crystal from an output of the scanner, the program module further configured for recording 3D spatial coordinates of defects detected by the scanner, wherein the program module is configured to compute an offset position (O) of a slicing tool along a selected crystal axis configured to have a minimum number of wafers with defects.
In an advantageous embodiment, the scanner for scanning the crystal comprises an optical scanner.
In an advantageous embodiment, the system further comprises:
In an advantageous embodiment, the system further comprises:
The system may be configured to carry out any of the above described embodiments of a method to produce wafers.
Further objects and advantageous aspects of the invention will be apparent from the claims, and from the following detailed description and accompanying figures.
Referring to the figures, a raw industrially grown crystal 1 has a roughly conical irregular 3D shape 9 and possesses a crystalline structure that defines one or more crystal axes corresponding to specific orientation of the crystal lattice. For instance, in the case of sapphire crystals there is an optical axis (also commonly named the c-axis) C1 that eliminates the inherent birefringent properties of the sapphire crystal. The selected crystal axis C1 may lie also within the crystal plane that is the most resistant to forces applied perpendicular to that plane. This plane can be as high as 20% harder to process, compared to other crystallographic orientations. In many applications, it is desired to cut the wafers at a specified angle to one or several axes, for example orthogonally to the optical axis C1.
For semi-conductor circuits, the orientation of the crystal lattice is also important and the wafers should be cut with respect to a specific direction in the crystal. The crystal lattice directions may be determined by various per se well known measurement means, for instance using optical or x-ray measurement systems.
Once the axes are determined, the orientation of cylindrical cores, from which the disc or wafers shall be cut, may be defined within the volume of the raw crystal. For many applications, the desired diameters Dn of the wafers are pre-defined, whereas in a raw crystal, wafers of different diameters or surface areas may be extracted for potentially different applications or for the same application. With regards to sapphire crystals for instance, different diameters wafers may be used to produce lenses of different sizes for optical instruments. Typically, the larger diameter wafers are more valuable and rarer, and obviously less of them may be extracted (sometimes only one) per raw crystal.
After determination of the selected cores, appropriate core cutting tools 6 may be used to cut out the cylindrical cores 2, 2a, 2b, 2c.
For the subsequent wafer slicing process, the core is typically placed in a polymer holder or support 8 that is bonded to the crystal core and sacrificed during the wafer slicing process.
The support 8 may be manufactured by additive processes such as 3D printing, or by moulding processes, or subtractive processes such as machining out of a block of support material and adjusted for the shape and size of the core. In this regard, although the crystal axis, such as the optical axis C1, is determined to extract a core, its measurement may be slightly inaccurate and a further correction for the crystal axis may be performed by the position of the core 2 within the support 8. This will allow for instance the wafers to be cut with greater accuracy orthogonally to the measured crystal axis C1, the support 8 being positioned within the wafer slicing machine.
A disc or wafer slicing machine is typically formed of a plurality of wires (typically diamond coated wires or blades) that are arranged at a regular spacing and that cut through the core orthogonally to a specific direction (for example, the optical axis).
It may be noted that the coring direction may be defined by a crystal axis, but is not always equal to it. For example, in some applications the sapphire is cut at and angle of 20.5 degrees off to the optical axis. The term ‘crystal direction’ as used herein corresponds to the ‘coring direction’ which as mentioned may be parallel to a crystal lattice axis or at a defined angle with respect to the crystal lattice axis.
A cooling and lubrification fluid may be used during coring and slicing, such process typically taking hours or days. The coring and slicing processes of wafers are per se well known processes and do not need to be further described herein. The two discs at the core ends may be rejected as waste and the slices are then typically re-inspected to determine those that are free of defects, or having defects below an accepted threshold, those having defects above the threshold being rejected. In many industrial wafering processes, it is typical for about 5% to 30% of sliced discs to be rejected due to internal crystal defects, this however depending very much on the quality of the crystal itself and diameter of the discs or wafers.
According to an aspect of the invention, prior to the coring process, but optionally subsequent to a boule cropping and top end and bottom end grinding or slicing process, a full 3D scan of the crystal is performed and the three-dimensional X, Y, Z coordinates of each defect within the volume of the crystal are mapped. These X, Y, Z coordinates may be mapped relative to a geometrical reference (point, line, surface) fixed relative to the crystal or relative to an edge of the core. The raw crystal, or a holder fixed to the raw crystal may be marked with a reference point or shape. A digitalized 3D model of the crystal may thus be constructed with the defects positioned therein.
The crystal axes are measured by per se known measurement instruments such as using x-ray and these crystal axes directions are also recorded in the digitalized 3D model of the crystal.
The cores may then be selected for cutting out of the crystal in the selected crystal axis direction, the positions of the cores being optimized in order to ensure that the most valuable cores, which are the largest cores, have the least defects within their volume. This optimization may be performed with the aid of a computer program, that seeks to minimize the number of defects in a core of a given diameter by varying the position of the core within the raw crystal and counting the defects for each position.
The computer aided optimization process may thus be configured to place the largest diameter core in the most optimal position, namely the position with the least amount of defects within the volume of the core, and subsequently position the remaining smaller diameter cores in the remaining volume around the largest core. If there is a largest core and a second largest core and then cores of smaller size than the second largest, the optimization process may position the second largest core in an optimal position for the least amount of defects within this core prior to positioning the remaining cores. Depending on the application, the cores may have pre-defined diameters, or their diameter may be different from a single large core with the largest possible diameter within the raw crystal and other cores of smaller diameters in order to optimize the volume of useful material and reduce the volume of waste material. The latter would depend on the requirements for the wafers depending on the intended applications. Alternatively, the optimisation could be done to maximise value of all extracted cores jointly.
Depending on the position of the cutting grid wires along the crystal axis there may be, according to an aspect of the invention, a certain number of discs with defects 4 ranging between a minimum number of discs with defects and a maximum number of discs with defects. The spacing between the cutting wires corresponds to the range of possible axial positions for the wire that can be adjusted to optimize the number of non-defective discs, i.e. discs not including defects or including only defects below an acceptable threshold that is defined by the requirements of the application.
According to an aspect of the invention, the position of the cutting wires is adjusted with an offset of an amount O that is in a range between 0 and the grid spacing G between cutters 7. The offset O may be added to an absolute value from a reference plane or point, for instance an end face 5 of the core or any other fixed reference point or shape on the raw crystal 1, crystal core 2, or the holder 8. This process may be automated in a simple manner using the digital 3D model of the crystal in which the X, Y, Z positions of the defects and the crystal axis direction are recorded, whereby the calculation of the optimal offset may be done at any time prior to the wafer slicing, including prior to the coring of the crystal cores 2 from the raw crystal 1. The position of the offset O may be adjusted for any other reference positions, for instance provided on the core holder. The offset position and correction of the position of the crystal with respect to the machine may be made either by repositioning the core on the holder, or adjusting the geometry of the holder to present a reference surface thereon that adjusts a position of the holder 8 with respect to the cutting machine, or that sends instructions to the cutting machine to adjust the position of the holder such that the calculated offset correctly positions the cutting grid with respect to a reference position of the core or its holder.
In the calculation of the offset, the thickness of the material that is removed during the slicing process is taken into account whereby the optimization process may vary the offset from 0 to the grid pitch G in order to determine the number of wafer slices with defects below a pre-defined accepted threshold, whereby some defects may be within the thickness B of the removed material and thus no longer present in the wafers, or defects that may be in two adjacent wafers are shifted into a single wafer.
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If a crystal is used for an application in which chips should be extracted as shown in
Number | Date | Country | Kind |
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22178401.0 | Jun 2022 | EP | regional |
Filing Document | Filing Date | Country | Kind |
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PCT/EP2023/064884 | 6/2/2023 | WO |