This application is a 371 application of PCT/JP2020/049063 having an international filing date of Dec. 28, 2020, which claims priority to JP2020-041006 filed Mar. 10, 2020, the entire content of each of which is incorporated herein by reference.
The present invention relates to a current sensing device.
Conventionally, current sensing devices have been proposed that comprise a resistive element-incorporating substrate in which a resistive element for current sensing is incorporated in a laminate having a plurality of insulating layers (ceramic layers) laminated therein (see Patent Literature 1 and Patent Literature 2, for example).
In Patent Literature 1, metal vias are embedded on the inside of vias extending through a plurality of laminated insulating layers and are connected to electrodes of a resistor, in order to increase the heat-dissipating effect of the resistor incorporated in a laminate substrate.
In Patent Literature 2, in a structure similar to that of Patent Literature 1, the number of a plurality of first (second) sensing via conductors arrayed in a predetermined direction is adjusted so that, without adjusting the via diameter of each of the first (second) sensing via conductors, the width W of a resistive film of a resistor is increased in a simulated manner by connecting the plurality of first (second) sensing via conductors in parallel. Thus, the disclosed technique adjusts the width of the resistive film in a simulated manner. In this way, it is possible to easily design the resistance value of a current sensing resistor provided in a laminate without changing the diameter of each of the first and second sensing via conductors connected to the resistive film of the current sensing resistor.
In current sensing devices, there is a need to suppress the influence of temperature coefficient of resistance (TCR). It is an objective of the present invention to suppress the influence of TCR in an incorporating substrate.
One aspect of the present invention provides a current sensing device including: an insulating resin substrate; a current sensing element arranged in the resin substrate; a current wire provided via an insulating layer with respect to the current sensing element to flow a current through the current sensing element; a plurality of current vias connecting the current sensing element and the current wire through the insulating layer; and a voltage sensing via connected to the current sensing element to measure a voltage drop.
Because the voltage via is connected to an electrode terminal of a shunt resistor directly without interposing a current wire or the like, the TCR of the current sensing device can be reduced.
Preferably, the current vias may be provided on a first surface side of the resin substrate, and the voltage via may be provided on a second surface side of the resin substrate.
In this configuration, the current vias and the voltage via are separated from each other so that the influence of TCR can be reduced.
When the current vias and the voltage via are provided on one of the first surface side and the second surface side of the resin substrate, a wire connecting the current vias and the voltage via may preferably be severed.
In this configuration, the current vias and the voltage via are electrically separated from each other so that the influence of TCR can be reduced.
Preferably, the current sensing element may be a shunt resistor, and the shunt resistor may have a thickness of more than or equal to 0.5 mm.
By increasing the thickness of the shunt resistor, the current vias and the voltage via can be separated away from each other in the thickness direction.
Preferably, the first surface and the second surface of the resin substrate are respectively flush with a first surface and a second surface of the current sensing element. Preferably, the resin substrate and the current sensing element may be coated with a resin layer.
In this configuration, lamination may be performed in the direction of either the first surface side or second surface side to realize a vertical integrated structure easily.
The present specification incorporates the disclosure of JP Patent Application No. 2020-041006 that forms the basis of the priority claim of the present application.
According to the present invention, it is possible to suppress the influence of TCR in an incorporating substrate.
In the following, the current sensing device according to embodiments of the present invention will be described with reference to the drawings.
As illustrated in
The resin substrate 11 has the first surface S1 and the second surface S2, and the shunt resistor 1 correspondingly has a first surface S1 and a second surface S2. The resin substrate 11 and the shunt resistor 1 are formed so that their respective first surfaces S1 and the second surfaces S2 are respectively approximately flush with each other.
The insulating resin substrate 11 and the shunt resistor 1 are integrated by means of a resin layer 15 generated by applying and curing a low temperature-curing resin, such as epoxy resin that cures at a low temperature of 200° C. or lower, to areas between the side surfaces of the resin substrate 11 and the shunt resistor 1 and to the first surfaces S1 and the second surfaces S2. In the resin layer 15 formed on the first surface S1 side of the electrode 5a and the electrode 5b, a pair of through holes 21a, 21a (contact holes: CH) are formed at positions on the electrode 5a and the electrode 5b closer to the resistive body 3, the through holes 21a, 21a exposing the first surface S1 of the electrodes 5a, 5b.
In the through holes 21a, 21a, electrically conductive vias (which may also be referred to as metal vias or conducting vias) 22a, 22a are respectively embedded. The electrically conductive vias 22a, 22a can be used as vias for voltage sensing. On the first surface side, first voltage wires 23a can be formed together with the vias 22a, 22a.
Also in the resin layer 15 formed on the second surface S2 side of the electrode 5a and the electrode 5b, a pair of through holes 21b, 21b (contact holes: CH) are formed, exposing the second surface of the electrodes 5a, 5b.
In the through holes 21b, 21b, electrically conductive vias (which may also be referred to as metal vias or conducting vias) 22b, 22b are embedded. The electrically conductive vias 22b, 22b can be used as current sensing vias. On the second surface side, first current wires 18 can be formed together with the vias.
Further, by applying and curing resin on the first surface S1 of the resin layer 15 on the first surface S1 side, a resin layer 17a can be formed. The resin layer 17a also has through holes 25a, 25a formed therein to expose the first voltage wires 23a, 23a. On the first surface side, second voltage sensing wires 27a, 27a are formed together with the electrically conductive vias 24a, 24a. Thus, a voltage electrically connected to the first surface S1 of the resin layer 17a by means of the electrodes 5a, 5b and the voltage wires can be sensed from the first surface S1 side.
Further, by mounting, on the first surface S1 side, an electronic component (such as an IC) 41 for sensing voltage and connecting the electronic component to the second voltage sensing wires 27a, 27a, a voltage signal can be sensed by computation or the like.
In this way, it is possible to form a new resin layer and successively laminate, mount, and form wires provided in the new resin layer and an electronic component, such as a semiconductor integrated circuit, as needed.
In the structure illustrated in
As will be described later, the influence of TCR may also be suppressed by providing the current path and the voltage vias 22a, 22b on either the first surface S1 or the second surface S2 in an appropriate arrangement.
As illustrated in
As illustrated in
The shunt resistor 1 is accommodated/provisionally fixed flush in the accommodating portion 11a.
As illustrated in
As illustrated in
Similarly, in the resin layer 15 on the second surface S2 side, the through holes 21b, 21b, for example, exposing the second surface S2 of the electrodes 5a, 5b are formed.
As illustrated in
As illustrated in
Further, on the second surface S2 too, the vias 22b, 22b are formed in the second surface S2, and the wires 18, 18 are formed in a predetermined region including the vias 22b, 22b, through a patterning step, for example.
Subsequently, a step of coating a resin layer (laminating), laser processing and the like may be repeated as needed, to form a three-dimensionally wired laminate structure.
Thus, by successively forming a resin layer (inter-layer insulating film), a circuit pattern and the like on at least one of the first surface S1 and the second surface S2 of the insulating resin substrate 11, it is possible to form a multilayer integrated structure including a current sensing device.
The integrated circuit 41 may be mounted on, incorporated in, or separate from the current sensing device A comprising the laminate, and is wired and connected. As a whole, the current sensing module X is formed. The IC has an A/D conversion circuit 63, an amplification circuit 65, a microcomputer 67 and the like incorporated therein, and outputs signals corresponding to a voltage signal to various devices. With this structure, it is possible to configure the current sensing module X capable of measuring a current flowing between the wires 18, 18 by means of the shunt resistor 1.
Table 1 illustrates physical property values used for simulation.
Of the resistive body 3 of the shunt resistor 1, the material was a CuMn alloy, the resistivity was 43 μΩ cm, and the TCR was 0 ppm/K. The thickness was 1.3 mm.
Of the electrodes 5a, 5b of the shunt resistor 11, the material was Cu, the resistivity was 1.7 μΩ cm, and the TCR was 4,000 ppm/K. The thickness was 1.3 mm.
Of the wiring pattern, the material was Cu, the resistivity was 1.7 μΩ cm, and the TCR was 4,000 ppm/K, The thickness of the pattern was 70 μm.
Of the electrode vias, the material was Cu, the resistivity was 1.7 μΩ cm, and the TCR was 4,000 pm/K. The via diameter (Φ) was 0.4 mm, and the height was 0.1 mm.
As illustrated in
The entire length of the shunt, resistor 1 is 8.5 mm. The width of the shunt resistor is 3 mm, and its thickness is 1.3 mm. Specifically, the thickness of the shunt resistor is more than or equal to 0.5 mm. The maximum thickness value may be on the order of 3 mm, in view of processability, electrically conductivity and the like. In consideration of the mounting of the shunt resistor 1 in the resin substrate 11, the thickness may preferably be between 0.5 to 1.5 mm. More specifically, the thickness may be said to be the thickness of the electrodes 5a, 5b. As illustrated in
It will be seen that, when the voltage vias and the current vias illustrated in
Thus, by arranging the voltage vias and the current vias at positions less susceptible to the influence of the current path, such as on the first surface and the second surface of the insulating resin substrate 11 separately, it is possible to perform voltage sensing that is less susceptible to the characteristics of the copper of the electrodes, and with a decreased influence of TCR. It also becomes possible to reduce the via arrangement dependency.
As illustrated in
As illustrated in
As illustrated in
In this way, it is possible to lower the TCR compared to when the clearance wires 18a are connected. Specifically, the TCR can be made less than or equal to 200 ppm/K, such as on the order of 165 ppm/K.
As described above, even when the voltage vias and the current vias are provided on the first surface of the insulating resin substrate, it is possible to reduce the influence of TCR by cutting a wire between the voltage vias and the current vias.
In the foregoing embodiments, the configurations and the like that have been illustrated are not limiting and may be modified, as appropriate, within a range such that the effects of the present invention can be obtained. The configurations and the like may also be modified otherwise as appropriate and implemented without departing from the objectives of the present invention.
The constituent elements of the present invention may be selected as needed, and an invention having a selected configuration is also included in the present invention.
The present invention may be utilized for a current sensing device.
Number | Date | Country | Kind |
---|---|---|---|
2020-041006 | Mar 2020 | JP | national |
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/JP2020/049063 | 12/28/2020 | WO |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2021/181835 | 9/16/2021 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
8142237 | Condamin | Mar 2012 | B2 |
8193898 | Tonouchi | Jun 2012 | B2 |
9839132 | Fujidai | Dec 2017 | B2 |
20080030208 | Aratani | Feb 2008 | A1 |
20140110160 | Banba | Apr 2014 | A1 |
Number | Date | Country |
---|---|---|
5298336 | Sep 2013 | JP |
2014-239142 | Dec 2014 | JP |
2015-002333 | Jan 2015 | JP |
2015-017832 | Jan 2015 | JP |
WO 2013-002308 | Jan 2013 | WO |
Entry |
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JP-5298336, machine translation (Year: 2013). |
International Search Report, English translation, from Application No. PCT/JP2020/049063, dated Mar. 9, 2021, 3 pages. |
Written Opinion, including English translation, from Application No. PCT/JP2020/049063, dated Mar. 9, 2021, 6 pages. |
Number | Date | Country | |
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20230100174 A1 | Mar 2023 | US |