Patent Application
20250113718
Embodiments of the present disclosure generally relate to the field of semiconductor device manufacturing. In particular, the disclosure relates to encapsulation layers and methods of forming encapsulation layers.
Optical devices often have displays such as liquid crystal displays (LCDs) organic light emitting-diode (OLED) displays, and quantum dot (QD) displays. Such displays can be fragile and sensitive to moisture, pressure, or particle contamination. To prevent damage to the underlying illumination source, an encapsulation layer is disposed over the illumination source to prevent damage. The inclusion of an encapsulation layer with high thickness, however, may hinder the optical device with respect to device brightness and color definition. Further, the encapsulation layer may require multiple chambers for fabrication, leading to decreased throughput.
Therefore, there is a need for improved encapsulation layers and methods of forming encapsulation layers that have a reduced thickness and increased throughput.
In one embodiment, an optical device is disclosed. The optical device includes a substrate, an illumination source, a capping layer, an encapsulation layer, and a passivation layer. The encapsulation layer includes a first atomic layer deposition (ALD) layer, a chemical vapor deposition (CVD) layer, and a second ALD layer.
In another embodiment, a method is disclosed. The method includes disposing a capping layer over an illumination layer. The illumination layer is disposed over a substrate in a processing chamber. A first atomic layer deposition (ALD) layer is disposed over the capping layer. A chemical vapor deposition (CVD) layer is disposed over the first ALD layer. A second ALD layer is disposed over the CVD layer. A passivation layer is disposed over the second ALD layer.
In yet another embodiment, an optical device is disclosed. The optical device includes a substrate, an illumination source, a capping layer, a first passivation layer, a polymer layer, and an encapsulation layer. The encapsulation layer includes a second passivation layer, and an active matrix organic light emitting diode (AMOLED) layer.
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.
Embodiments of the present disclosure generally relate to the field of semiconductor device manufacturing. In particular, the disclosure relates to thin film encapsulation barriers and methods of forming thin film encapsulation barriers.
In one embodiment of the cluster processing system 100, the cluster processing system 100 may include one or more processing chambers 122. The processing chamber 122 may be a deposition chamber (e.g., physical vapor deposition (PVD) chamber, chemical vapor deposition (CVD) chamber, plasma enhanced chemical vapor deposition (PECVD) chamber, atomic layer deposition (ALD) chamber, plasma enhanced atomic layer deposition (PEALD) chamber, or other deposition chambers), annealing chamber (e.g., high pressure annealing chamber, rapid thermal processing (RTP) chamber, or laser anneal chamber), etch chamber, cleaning chamber, pre-cleaning chamber, curing chamber, lithographic exposure chamber, or other similar type of semiconductor processing chamber. The processing chamber 122 may be configured to perform more than one semiconductor processing process, e.g., the processing chamber 122 may perform both PEALD and PECVD.
The processing volume 205 is fluidly coupled to a vacuum source, such as to one or more dedicated vacuum pumps, through a vacuum outlet 214, which maintains the processing volume 205 at sub-atmospheric conditions and evacuates the processing gas and other gases therefrom. A substrate support 215, disposed in the processing volume 205, is disposed on a movable support shaft 216 sealingly extending through the chamber base 204, such as being surrounded by bellows (not shown) in the region below the chamber base 204. Herein, the processing chamber 122 is configured to facilitate transferring of a substrate 217 to and from the substrate support 215 through an opening 218 in one of the one or more sidewalls 202, which can be sealed with a door or a valve (not shown) during substrate processing.
The substrate 217, disposed on the substrate support 215, is maintained at a desired processing temperature using one or both of a heater, such as a resistive heating element 219, and one or more cooling channels 220 disposed in the substrate support 215. The one or more cooling channels 220 are fluidly coupled to a coolant source (not shown), such as a modified water source having relatively high electrical resistance or a refrigerant source. In at least one embodiment, the substrate support 215 or one or more electrodes thereof is electrically coupled to a second power supply 221, which supplies a bias voltage thereto. The temperature of the substrate 217 and the substrate support 215 is maintained at less than about 100° C. in the processing chamber 122, such as about 60° C. to about 90° C. The substrate 217 may be spaced apart from the showerhead 207 by about 650 mm to about 1200 mm.
The processing chamber 122 further includes a system controller 223 which is used to control the operation of the processing chamber 122 and implement the methods set forth herein. The system controller 223 includes a programmable central processing unit, herein the central processing unit (CPU) 224, that is operable with a memory 226 (e.g., non-volatile memory) and support circuits 228. The support circuits 228 are coupled to the CPU 224 and include cache, clock circuits, input/output subsystems, power supplies, and combinations thereof coupled to the various components of the processing chamber 122, to facilitate control thereof. The CPU 224 is one of any form of general purpose computer processor, such as a programmable logic controller (PLC), for controlling various components and sub-processors of the processing chamber 122. The memory 226, coupled to the CPU 224, is non-transitory and is typically one or more of readily available memories such as random access memory (RAM), read only memory (ROM), floppy disk drive, hard disk, or any other form of digital storage, local or remote.
Typically, the memory 226 is in the form of a computer-readable storage media containing instructions (e.g., non-volatile memory) that, when executed by the CPU 224, facilitates the operation of the processing chamber 122. The instructions in the memory 226 are in the form of a program product such as a program that implements the methods of the present disclosure. The program code may conform to any one of a number of different programming languages. In one example, the disclosure may be implemented as a program product stored on computer-readable storage media for use with a computer system. The program(s) of the program product define functions of the embodiments (including the methods described herein).
The capping layer 302 has a thickness of about 600 Å to about 1000 Å. The capping layer 302 may include organic materials, such as Tris(8-hydroxyquinolinato)aluminium (ALq3), a hole-transporting layer (HTLs), an electron injection layer (EILs), a hole injection layer (HIL), or combinations thereof.
The encapsulation layer 303 includes a first atomic layer deposition (ALD) layer 305, a chemical vapor deposition (CVD) layer 306, and a second ALD layer 307. The encapsulation layer 303 has a thickness of less than about 1 μm. The first ALD layer 305 has a thickness of less than about 50 Å. The CVD layer 306 has a thickness less than about 1 μm. The second ALD layer 307 has a thickness of less than about 10 Å. The thickness of the encapsulation layer 303 being less than about 1 μm may reduce the color cross-talk of the illumination source 301, increasing the color definition of the optical device 300.
In some embodiments, the first ALD layer 305 and second ALD layer 307 have an elemental composition of about 38% to about 60% nitrogen (N), about 39% to about 50% silicon (Si), and about 5% to about 17% hydrogen (H). The N/Si ratio for the first ALD layer 305 and second ALD layer 307 is about 0.6 to about 1.5. The first ALD layer 305 and second ALD layer 307 have a refractive index at 633 nm of about 1.7 to about 2.1. The CVD layer 306 has an elemental composition of about 42% to about 46% nitrogen (N), about 54% to about 58% silicon (Si), and about 27% to about 35% hydrogen (H). The N/Si ratio for the CVD layer 306 is about 0.7 to about 0.9. The CVD layer 306 has a refractive index at 633 nm of about 1.6 to about 2.1.
The encapsulation layer 303 has a refractive index greater than about 1.8, such as about 1.85 to 2.1. The high refractive index may reduce the layer to layer reflection, increasing the brightness of optical device 300.
The thickness of the encapsulation layer 303 being less than about 1 μm further allows for more conformal deposition of the encapsulation layer 303, decreasing the non-uniformity percentage (NU %) of the encapsulation layer 303. The NU % is the variation in thickness across the encapsulation layer 303. The NU % of the encapsulation layer 303 is about 3% to about 5%. The conformity and NU % of the encapsulation layer 303 may decrease the number of seamlines in the encapsulation layer 303. The encapsulation layer 303 has a water vapor transmission rate (WVTR) of less than about 5×10−5 g/m2/day. A decrease in the number of seamlines may result in an increase in the ability of the encapsulation layer 303 to protect the illumination source from contaminants, such as water vapor.
The encapsulation layer 303 has a stress of about −1000 MPa to about 300 MPa. The difference in stress (Δ Stress) is less than about 50 MPa from the center of the substrate 217 to the edge of the substrate 217. The reduction in the Δ Stress across the substrate 217 may be due to the increased conformity, decreased NU %, and a decrease in seamlines.
At operations 401, a capping layer 302 is disposed over an illumination source 301, as shown in
At operation 402, a first atomic layer deposition (ALD) layer 305 is disposed over the capping layer 302, as shown in
The PEALD process may use a plasma gas to initiate the plasma in the processing chamber. The plasma gas may include N2, NH3, H2, He, Ar, or a combination thereof. The flow rate of the plasma gas is between 0 sccm and about 10000 sccm, e.g., N2 may have a flow rate from about 0 sccm to about 10000 sccm, NH3 may have a flow rate of about 0 sccm to about 1000 sccm, H2 may have a flow rate of about 0 sccm to about 6000 sccm.
The PEALD process may use a purge gas to purge the processing chamber between deposition processes. The purge gas may include N2, Ar, H2, He, NH3, or a combination thereof. The flow rate of the purge gas is between 5 sccm and about 120 sccm for about 5 second to about 10 seconds.
The PEALD process may use a precursor gas and a carrier gas to deposit the second ALD layer 307. The precursor gas may include trisilylamine (TSA), SiH4, silicon, silicon nitride, or combinations thereof. The carrier gas may include Ar, H2, N2, He, or a combination thereof. The flow of the precursor gas during the PEALD process is from about 100 sccm to about 600 sccm for about 5 second to about 10 seconds.
At operation 403, a chemical vapor deposition (CVD) layer 306 is disposed over the first ALD layer 305, as shown in
The PECVD process may us a precursor gas to deposit the CVD layer 306. The precursor gas may include trisilylamine (TSA), SiH4, silicon, silicon nitride, or combinations thereof. The flow of the precursor gas during the PECVD process is from about 100 sccm to about 600 sccm. The deposition rate of the PECVD process is about 2000 Å/min to about 3000 Å/min.
The PECVD process may use a plasma gas to initiate the plasma in the processing chamber. The plasma gas may include N2, NH3, H2, Ar, He, or a combination thereof. The flow rate of the plasma gas is between 0 sccm and about 10000 sccm, e.g., N2 may have a flow rate from about 0 sccm to about 10000 sccm, NH3 may have a flow rate of about 0 sccm to about 1000 sccm, H2 may have a flow rate of about 0 sccm to about 6000 sccm.
At operation 404, a second ALD layer 307 is disposed over the CVD layer 306, as shown in
The PEALD process may use a plasma gas to initiate the plasma in the processing chamber. The plasma gas may include N2, NH3, H2, Ar, He, or a combination thereof. The flow rate of the plasma gas is between 0 sccm and about 10000 sccm, e.g., N2 may have a flow rate from about 0 sccm to about 10000 sccm, NH3 may have a flow rate of about 0 sccm to about 1000 sccm, H2 may have a flow rate of about 0 sccm to about 6000 sccm.
The PEALD process may use a purge gas to purge the processing chamber between deposition processes. The purge gas may include N2, Ar, H2, He, or a combination thereof. The flow rate of the purge gas is between 5 sccm and about 120 sccm for about 5 second to about 10 seconds.
The PEALD process may use a precursor gas and a carrier gas to deposit the second ALD layer 307. The precursor gas may include trisilylamine (TSA), SiH4, silicon, and silicon nitride, or combinations thereof. The carrier gas may include Ar, H2, He, N2, or a combination thereof. The flow of the precursor gas during the PECVD process is from about 100 sccm to about 600 sccm for about 5 second to about 10 seconds.
Operations 402-404 may be performed within a single processing chamber 122. Performing the PEALD and PECVD processes in a single processing chamber 122 may increase the throughput of the optical devices 300. In some embodiments, the operations 402-404 may be repeated until the desired encapsulation layer 303 thickness is achieved.
At operation 405, a passivation layer 304 is disposed over the second ALD layer 307.
The flexible encapsulation layer 603 includes a second passivation layer 604 and an active matrix organic light emitting diode (AMOLED) layer 610. The AMOLED is configured to be an illumination source. The AMOLED layer 610 may be an on-cell touch AMOLED (e.g., a touch screen panel). The second passivation layer 604 may include a silicon nitride, a SiONx, SiOx, or a combination thereof. The AMOLED layer 610 includes a Tris(8-hydroxyquinolinato)aluminium (ALq3), a hole-transporting layer (HTLs), an electron injection layer (EILs), a hole injection layer (HIL), or combination thereof. The flexible encapsulation layer 603 has a thickness of less than about 1 μm. The passivation layer 604 has a thickness of about 4000 Å to about 6000 Å. The AMOLED layer 610 has a thickness of about 1500 Å to about 2500 Å.
The reduction in the thickness of the flexible encapsulation layer 603 may reduce the color cross-talk of the illumination source 601, increasing the color definition of the optical device 600. The flexible encapsulation layer 603 has a refractive index greater than about 1.8, such as about 1.85 to 2.1. The high refractive index may reduce the layer to layer reflection, increasing the brightness of flexible optical device 600. The encapsulation layer 603 has an increased critical elongation (Ecr) requirement. An increase in the Ecr enables a reduction in the trend slope of defect size vs. time, indicating increased bendability while still maintaining the optical properties of the flexible optical device 600.
In summation, an optical device and method of making an optical device are disclosed. The optical device includes an encapsulation layer having a first atomic layer deposition (ALD) layer, a chemical vapor deposition (CVD) layer, and a second ALD layer. The CVD layer is disposed between the first and second ALD layers. The encapsulation layer has a thickness less than about 1 μm. The thickness and conformality of the encapsulation layer decreases the non-uniformity of the encapsulation layer by about 3% to about 5%. Further, the number of seamlines in the encapsulation layer is reduced. The reduction of seamlines results in a decrease in the water vapor transmission rate, increasing the ability of the encapsulation source to protect the illumination source from contaminants. The encapsulation layer further has stress of about −1000 MPa to about 300 MPa. The difference in stress (Δ Stress) is less than about 50 MPa from the center of the substrate to the edge of the substrate.
While the foregoing is directed to examples of the present disclosure, other and further examples of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application claims benefit of PCT Application No: PCT/US2024/048499, filed Sep. 26, 2024 (Attorney Docket No. 44022859WO01), which claims benefit of U.S. provisional patent application Ser. No. 63/586,303, filed Sep. 28, 2023, all of which is incorporated by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 63586303 | Sep 2023 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/US2024/048499 | Sep 2024 | WO |
| Child | 18907141 | US |
