Claims
- 1. A process for preparing a dielectric layer on a silicon wafer, said process comprising:
- (a) depositing a dielectric layer on a silicon wafer using water and TEOS in a plasma-enhanced chemical vapor deposition apparatus;
- (b) thermally heating the silicon wafer including the dielectric layer produced by step (a) under reduced pressure; and
- (c) annealing the dielectric layer on the silicon wafer of step (b) under an atmosphere including oxygen gas.
- 2. A process of claim 1 wherein the dielectric layer is an intermetal dielectric layer.
- 3. A process of claim 1 wherein the dielectric layer is a silicon dioxide layer.
- 4. A process of claim 1 wherein the heating step is conducted at a temperature of from about 200.degree. C. to about 450.degree. C.
- 5. A process of claim 4 wherein the heating step is conducted at a temperature between about 350.degree. C. and about 450.degree. C.
- 6. A process of claim 1 wherein the heating step is conducted at a pressure of less than about 10 torr.
- 7. A process of claim 6 wherein the heating step is conducted at a pressure of less than about 1 torr.
- 8. A process of claim 6 wherein the heating step is conducted at a pressure of less than about 0.1 torr.
- 9. A process of claim i wherein the annealing step is conducted in an atmosphere comprising from about 1% to about 100% oxygen gas, and from about 0% to about 99% inert gas.
- 10. A process of claim 9 wherein the annealing step is conducted in an atmosphere comprising from about 1% to about 15% ozone.
- 11. A process of claim 9 wherein the inert gas is selected from the group consisting of nitrogen, the noble gases, and mixtures thereof.
- 12. A process of claim 9 wherein the annealing step is conducted in an atmosphere comprising from about 20% to about 50% oxygen gas, and from about 50% to about 80% inert gas.
- 13. A process of claim 12 wherein the inert gas is selected from the group consisting of nitrogen, the noble gases, and mixtures thereof.
- 14. A process of claim 1 wherein the heating step (b) is conducted at a pressure of less than 0.01 torr.
- 15. A process of claim 4 wherein the heating step (b) is conducted in a traditional furnace apparatus for a time of about 30 minutes to about 60 minutes.
- 16. A process of claim 4 wherein the heating step (b) is conducted in a rapid thermal anneal chamber for a time of 30 seconds to 60 seconds.
- 17. A process of claim 1 wherein the annealing step (c) is conducted at a temperature between about 200.degree. C. to about 400.degree. C.
- 18. A process for preparing a dielectric layer on a silicon wafer, said process comprising:
- (a) depositing a dielectric layer on a silicon wafer using water and TEOS in a plasma-enhanced chemical vapor deposition apparatus;
- (b) thermally heating the silicon wafer including the dielectric layer produced by step (a) under reduced pressure, said heating being conducted at a temperature of from about 200.degree. C. to about 450.degree. C. and said reduced pressure being less than about 0.1 torr; and
- (c) annealing the dielectric layer on the silicon wafer of step (b) under an atmosphere including oxygen gas.
CROSS-REFERENCE TO RELATED APPLICATION
This is a continuation in part of the earlier U.S. patent application Ser. No. 07/967,472 (VLSI 1601), filed Oct. 23, 1992, abandoned the disclosure of which is hereby incorporated herein in its entirety.
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Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
967472 |
Oct 1992 |
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