Embodiments of the subject matter described herein relate generally to workpiece processing. More particularly, embodiments of the subject matter relate to detecting the presence of a workpiece, such as a semiconductor wafer, in a carrier head of a chemical mechanical planarization/polishing system.
For a variety of workpieces (e.g., semiconductor wafers, optical blanks, memory disks, etc.), manufacture requires the substantial planarization of at least one major workpiece surface. For ease of description and understanding, the following description will concentrate on exemplary embodiments that are pertinent to semiconductor wafers. It should be understood, however, that a carrier head as described herein may be utilized to planarize a wide variety of workpieces in addition to semiconductor wafers. Furthermore, as appearing herein, the term “planarization” is used in its broadest sense and includes any chemical and/or mechanical process that may be utilized to smooth (e.g., remove irregular topographical features from, change the thickness of, etc.) or polish the surface of a workpiece.
The technique of chemical mechanical polishing, also known as chemical mechanical planarization (referred to herein collectively as “CMP”), has been widely adopted for the planarization of semiconductor wafers. CMP processes produce a substantially smooth, planar face along a major surface of the wafer (referred to herein as the wafer's front surface) to prepare the workpiece surface for subsequent fabrication processes (e.g., photoresist coating, pattern definition, etc.). During CMP, an unprocessed wafer is transferred to a carrier head, which then presses the wafer against a polishing surface (e.g., a polish pad) supported by a platen. Polishing slurry is introduced between the wafer's front surface and the polish pad (e.g., via conduits provided through the polish pad and/or a dispenser located above the polish pad), and relative motion (e.g., rotational, orbital, and/or linear) is initiated between the polish pad and the wafer carrier. The mechanical abrasion of the polish pad and the chemical interaction of the slurry produce a substantially planar topography along the wafer's front surface.
One known type of carrier head generally includes a flexible membrane or bladder that contacts the back (i.e., the unpolished) surface of the work piece during the CMP process. Multiple pressure chambers or plenums are provided behind the bladder to form a number of annular pressure zones across the bladder's working face. The pressure within each zone is independently adjusted to vary the force applied to the wafer's back surface at different locations. Occasionally, the wafer is improperly positioned in the carrier or the bladder does not properly create suction to the wafer in the carrier head. It is important to verify that the wafer is properly held before the start of the polishing process to prevent damage to the wafer or the polishing tool. In this regard, a sensor can be utilized to detect the presence of a wafer in the carrier head. A carrier head that incorporates a capacitive sensor (for wafer presence detection) is disclosed in U.S. Pat. No. 6,568,991.
The wafer detection technique disclosed in U.S. Pat. No. 6,568,991 can distinguish between two wafer presence states: wafer unloaded and wafer loaded. This technique is practical and effective at detecting these two states. However, this technique is unable to determine other in-process states that might arise during polishing of the wafer, such as a broken wafer, a loose wafer, the beginning and end of a wafer “burping” cycle, abnormal process conditions, wafer purging, etc. Moreover, the capacitive sensor utilized by this technique can be sensitive to the presence of water on or near the bladder. In other words, the presence of a film of water on the bladder might result in a false wafer detection even though a wafer is not actually loaded onto the carrier head.
A carrier head for a CMP system and related operating methods are provided. The carrier head utilizes a sensor that detects the proximity of a workpiece relative to the carrier head. The sensor subsystem is capable of generating a continuous analog output that ranges between a first output level corresponding to a wafer unloaded condition and a second output level corresponding to a wafer loaded condition. Different output levels and/or certain output signal characteristics can also be analyzed to detect corresponding in-process conditions.
The above and other aspects may be found in an embodiment of a carrier head for supporting a workpiece. The carrier head includes a body, a structure coupled to the body, the structure being configured to hold a workpiece, and a capacitive sensor coupled to the body. The capacitive sensor is configured to generate an analog output that indicates workpiece presence status relative to the carrier head. The status can include a workpiece unloaded status, a workpiece loaded status, and at least one workpiece in-process status.
The above and other aspects may be carried out by an embodiment of a method of controlling a CMP process for a workpiece. The method involves: obtaining a workpiece presence signal that indicates proximity of the workpiece to a carrier head of a CMP system; identifying an attribute of the workpiece presence signal, the attribute being indicative of a CMP process status of the workpiece; and controlling operation of the CMP system in a manner dictated by the attribute.
The above and other aspects may be found in an embodiment of a CMP system having a polishing pad for polishing a workpiece, a carrier head configured to hold the workpiece against the polishing pad during planarization, and to hold the workpiece during transport to and from the polishing pad, a capacitive sensor coupled to the carrier head and configured to produce a workpiece presence signal that indicates proximity of the workpiece to the carrier head, and a processing architecture coupled to the capacitive sensor. The processing architecture is configured to receive the workpiece presence signal, detect CMP process related attributes of the workpiece presence signal, and control operation of the CMP system in response to detected CMP process related attributes.
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
A more complete understanding of the subject matter may be derived by referring to the detailed description and claims when considered in conjunction with the following figures, wherein like reference numbers refer to similar elements throughout the figures.
The following detailed description is merely illustrative in nature and is not intended to limit the embodiments of the subject matter or the application and uses of such embodiments. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary or the following detailed description.
Techniques and technologies may be described herein in terms of functional and/or logical block components, and with reference to symbolic representations of operations, processing tasks, and functions that may be performed by various computing components or devices. Such operations, tasks, and functions are sometimes referred to as being computer-executed, computerized, software-implemented, or computer-implemented. In practice, one or more processor devices can carry out the described operations, tasks, and functions by manipulating electrical signals representing data bits at memory locations in the system memory, as well as other processing of signals. The memory locations where data bits are maintained are physical locations that have particular electrical, magnetic, optical, or organic properties corresponding to the data bits. It should be appreciated that the various block components shown in the figures may be realized by any number of hardware, software, and/or firmware components configured to perform the specified functions. For example, an embodiment of a system or a component may employ various integrated circuit components, e.g., memory elements, digital signal processing elements, logic elements, look-up tables, or the like, which may carry out a variety of functions under the control of one or more microprocessors or other control devices.
The following description may refer to elements or nodes or features being “connected” or “coupled” together. As used herein, unless expressly stated otherwise, “connected” means that one element/node/feature is directly joined to (or directly communicates with) another element/node/feature, and not necessarily mechanically. Likewise, unless expressly stated otherwise, “coupled” means that one element/node/feature is directly or indirectly joined to (or directly or indirectly communicates with) another element/node/feature, and not necessarily mechanically.
In addition, certain terminology may also be used in the following description for the purpose of reference only, and thus are not intended to be limiting. For example, terms such as “upper”, “lower”, “above”, and “below” refer to directions in the drawings to which reference is made. Terms such as “front”, “back”, “rear”, “side”, “outboard, and “inboard” describe the orientation and/or location of portions of the component within a consistent but arbitrary frame of reference which is made clear by reference to the text and the associated drawings describing the component under discussion. Such terminology may include the words specifically mentioned above, derivatives thereof, and words of similar import. Similarly, the terms “first”, “second” and other such numerical terms referring to structures do not imply a sequence or order unless clearly indicated by the context.
For the sake of brevity, conventional techniques related to semiconductor wafer processing, chemical mechanical planarization/polishing, capacitive sensors, and other functional aspects of the systems (and the individual operating components of the systems) may not be described in detail herein.
The carrier head and workpiece detection techniques and technologies described herein are suitable for use with a CMP system that processes semiconductor wafers. Appropriate CMP systems are disclosed in U.S. Pat. No. 7,229,339, U.S. Pat. No. 6,568,991, and U.S. patent application Ser. No. 11/553,572, titled Carrier Head for Workpiece Planarization/Polishing (the relevant content of these documents is incorporated by reference herein). Briefly, a CMP system uses one or more carrier heads to transport wafers to and from a polishing pad located on a platen. A carrier head is also used to hold a wafer against the polishing pad during the polishing/planarizing portion of the CMP procedure. CMP systems and their operation will not be described in detail here.
For the orbital CMP system, polishing platen 22 is generally configured to move polishing pad 24 in an orbital manner, while carrier head 20 rotates wafer 30 about an axis 34 (as depicted in
Although not separately depicted in
Carrier head 200 may be generally disc-like in shape and comprises an upper surface 204, a lower surface 206, and an annular rim portion 208. The outer annular portion of lower surface 206 is defined by a retaining ring 210 (also referred to as a wear ring). Retaining ring 210 encircles a flexible bladder 211 (hidden from view in
As mentioned above, carrier head 200 is also provided with a workpiece detection sensor 202, which may be disposed through a central portion of carrier head 200 as shown in
For this embodiment, workpiece detection sensor 202 takes the form of a capacitive sensor. The capacitive sensor generally operates in accordance with known principles. In particular, an electrical excitation signal is applied to a capacitive element having a variable capacitance that changes when the electric field of the capacitive element is disturbed. In the context of this particular application, disturbance of the electric field is caused by the presence of the wafer near the capacitive sensor. If no wafer (or other non-insulating object) is located near the capacitive sensor, then the electric field generated by the capacitive element will not be disturbed and the capacitance will be relatively high. On the other hand, if a wafer (or other non-insulating object) is within close proximity of the capacitive sensor, then the electric field will be affected and the capacitance will be lowered. In practice, workpiece detection sensor 202 cooperates with a suitably configured receiver/processor component that measures the capacitance of the capacitive element (in real time or substantially real time) and generates an analog output signal in response to the changing capacitance. Thus, workpiece detection sensor 202 is capable of generating an analog output that indicates workpiece presence status relative to carrier head 200. For example, workpiece detection sensor 202 generates an analog output that indicates a workpiece unloaded status, a workpiece loaded status, and at least one workpiece in-process status, where an “in-process” status refers to a status that occurs between loading and unloading of the workpiece. The analog output produced by workpiece detection sensor 202 may also be referred to herein as a “workpiece presence signal.” This workpiece presence signal, which can be monitored, processed, and/or analyzed in the manner described in more detail below, indicates proximity of the workpiece to carrier head 200.
In certain embodiments, workpiece detection sensor 202 generates an output voltage having a magnitude that varies with the distance between sensor 202 and the workpiece. Sensor 202 can generate a continuous range of output voltages between a first voltage corresponding to a workpiece unloaded status and a second voltage corresponding to a workpiece loaded status. In other words, the loaded and unloaded conditions may represent the output range of sensor 202, and different in-process conditions may result in distinguishable voltages and/or workpiece presence signal attributes that fall within this output range. In other system embodiments, the detected or measured output range limits of sensor 202 may correspond to conditions other than “workpiece loaded” and “workpiece unloaded.”
Notably, workpiece detection sensor 202 is not limited to only two detection states (workpiece loaded or unloaded), and sensor 202 can generate a range of output values that indicate different operating states and conditions of the CMP procedure. Moreover, exemplary embodiments of carrier head 200 employ a capacitive sensor that is suitably configured to be insensitive to the presence of water (and/or other fluids such as polishing slurry). Thus, a liquid film or layer of water near sensor 202 will not create a false wafer detection. Consequently, carrier head 200 need not include safeguards or features that are intended to eliminate false wafer detections due to water. For example, carrier head 200 need not inflate its bladder 211 to distance water or other liquids away from sensor 202 during measurements.
For this particular embodiment, workpiece detection sensor 202 is mounted at or near the center of the body of carrier head 200, and the sensing surface is oriented toward bladder 211. More specifically, bladder 211 covers sensor 202, as depicted in
Bladder 211 comprises a flexible base diaphragm 230 having a first working surface 232, which contacts a workpiece (e.g., a semiconductor wafer) during planarization/polishing, and a second surface 234 opposite surface 232. A plurality of annular ribs (e.g., five) extends from surface 234 to partially define a plurality (e.g., five) of concentric pressure chambers or plenums. Working outward from the center of bladder 211, the ribs are numbered 236, 238, 240, 242, and 244. Similarly, the plenums are numbered 246, 248, 250, 252, and 254. Plenum 246 is laterally defined by rib 236, plenum 248 by ribs 236 and 238, plenum 250 by ribs 238 and 240, plenum 252 by ribs 240 and 242, and plenum 254 by ribs 242 and 244.
It will be noted that bladder 211 includes an additional rib 256 disposed along the outer circumference of diaphragm 230. Rib 256 extends from the upper peripheral edge of bladder 211 to the lower peripheral edge of bladder 211. An inner surface of rib 256 is coupled (e.g., integrally) to an outer annular surface of rib 244, and an end portion of rib 256 is coupled to the outer peripheral edge of diaphragm 230. To help distinguish rib 256 in
The annular ribs may be integrally formed with diaphragm 230 and may each comprise a vertical column having first and second substantially opposite end portions. The annular ribs are preferably oriented substantially orthogonally to the plane of diaphragm 230. In preferred embodiments, each annular rib comprises a strain relief member (e.g., an annular brim having a generally J-shaped cross-section) disposed intermediate the first and second end portions. The strain relief members permit greater vertical displacement of the annular ribs and, consequently, permit a greater range of motion substantially orthogonally to working surface 232 (referred to as a “longer throw”). However, it will be appreciated by one skilled in the art that any or all of the provision of strain relief members is optional and, similarly, that each of the annular ribs may assume a variety of other shapes (e.g., an annular lip having a generally L-shaped cross-section) suitable for attachment to the housing of carrier head 200.
Workpiece detection subsystem 300 is suitably configured to detect CMP procedure conditions associated with the status of wafer 310 relative to carrier head 302. As described above, a membrane or bladder 316 may be positioned between sensor 304 and wafer 310. The bladder 316 is used to support the back surface of the wafer 310 during the polishing process. For this embodiment, the size of capacitive sensor 304 (e.g., an analog capacitive sensor) may be reduced by positioning its amplifier 306 remotely. Here, the sensor 304 is preferably connected to processing architecture 308, which acts upon the information acquired from sensor 304. A remote sensor amplifier 306 also improves physical access to the amplifier 306 during calibration procedures. The gain of the amplifier 306 is adjusted during calibration until the sensor 304 can easily distinguish between desired conditions of interest. The communication path between the sensor 304 and the processing architecture 308 may use, for example, electrical wire, fiber optics or wireless radio technology.
Processing architecture 308 may be realized as the main processing component of the host CMP system, or it may be a separate processing component that is devoted to workpiece detection subsystem 300. Processing architecture 308 is suitably configured to receive the workpiece presence signal generated by sensor 304 (or an amplified or converted version thereof), and detect CMP procedure related attributes of the workpiece presence signal. Processing architecture 308 may also be configured to control operation of the CMP system, using CMP system operation logic 314, in response to the detected CMP procedure related attributes. For example, processing architecture 308 can analyze the workpiece presence signal to determine whether wafer 310 is properly loaded (as shown in
As used herein, an “attribute” of a workpiece presence signal is any measurable, detectable, calculable, or observable feature, value, trend, slope, characteristic, waveform, shape, or pattern of the workpiece presence signal. Examples of such attributes include, without limitation: a particular voltage level; a local or global minima or maxima; an abrupt rise or fall in the signal; a change in the rising or falling slope in the signal; or the like. An embodiment of the system described herein may utilize waveform analysis, signal processing, averaging, and/or comparison techniques to analyze, detect, and identify certain attributes of interest.
CMP control procedure 400 may begin by initializing the workpiece detection sensor (task 402). This may involve calibration if needed and the generation and application of an excitation signal for the workpiece detection sensor. Notably, task 402 may be performed prior to the actual CMP routine. Once the CMP procedure begins (task 404), procedure 400 obtains a workpiece presence signal that originates from the sensor (task 406). As mentioned above, the workpiece presence signal indicates the proximity of the workpiece relative to the respective carrier head of the CMP system. Procedure 400 can monitor the CMP procedure using this workpiece presence signal (task 408) and/or identify one or more attributes of the workpiece presence signal (task 410), where such attributes are indicative of the CMP procedure status of the workpiece.
CMP control procedure 400 may then control the operation of the CMP system in a manner dictated by the detected attribute(s) of the workpiece presence signal (task 412). Thus, the CMP system may be controlled to respond in a certain way, depending upon the results of task 410. A number of detectable attributes and the manner in which task 412 responds to such attributes will be described below with reference to
Referring to
As explained above, certain traits, attributes, and/or characteristics of signal 500 can be analyzed and monitored for purposes of controlling the CMP system. Beginning at the left side of signal 500, the relatively stable low voltage value indicates a wafer unloaded status 502. For this example, a reading of about 3.17 volts indicates that no wafer is present. Accordingly, if the system obtains a reading above a certain calibrated threshold voltage (e.g., 3.5 volts), then it might conclude that “wafer unloaded” is not true. Conversely, if the system obtains a reading below a certain calibrated threshold voltage (e.g., 3.2 volts), then it might conclude that “wafer unloaded” is true. In practice, multiple threshold values may be employed for purposes of generating warning messages, error messages, process commands, or the like.
The upward rise in signal 500 is caused by the loading of the wafer onto the carrier head. The relatively stable high voltage value indicates a properly loaded wafer status 504. For this example, a reading of about 9.6 volts indicates that the wafer has been properly loaded. Accordingly, if the system obtains a reading below a certain calibrated threshold voltage (e.g., 8.0 volts), then it might conclude that “wafer loaded” is not true. Conversely, if the system obtains a reading above a certain calibrated threshold voltage (e.g., 9.0 volts), then it might conclude that “wafer loaded” is true. In practice, multiple threshold values may be employed for purposes of generating warning messages, error messages, process commands, or the like.
Another detectable attribute shown in
The downward fall in signal 500 following the burping cycle corresponds to the beginning of the polishing process itself Signal 500 falls to about 3.9 volts because the carrier head inflates its bladder (i.e., the independent pressurizable plenums) to press the wafer against the polishing pad. This inflation causes the wafer to move away from the workpiece detection sensor. The period during which signal 500 is relatively stable at 3.9 volts indicates the polishing procedure 510. At the conclusion of the polishing procedure 510, the CMP system may perform a wafer purge to loosen the wafer from the polishing pad. Wafer purging may be accomplished by delivering water through holes in the polishing pad. Alternatively, wafer purging may be accomplished by delivering water to the surface of the polishing pad using a suitable conduit. Wafer purging typically causes the wafer to move slightly towards the workpiece detection sensor. Accordingly, signal 500 rises a bit at the beginning of wafer purging. Reference number 512 indicates the wafer purging procedure.
The significant rise in signal 500 following the wafer purge corresponds to the carrier head acquiring the wafer by deflating the bladder. In other words, the wafer resumes its loaded state. The carrier head typically moves away (e.g., raises up) from the polishing platen at this time. This wafer acquisition status is identified by reference number 514. Thereafter, the drop in signal 500 corresponds to unloading of the wafer (reference number 516). As depicted in
As illustrated by the example of
The workpiece presence signal may also be utilized to detect abnormal operating conditions or statuses that might arise during the CMP procedure. For example, it is possible to detect when the carrier head loses or almost loses acquisition of the workpiece. In this regard,
Signal 600 includes a downward spike 602 prior to wafer unloading. This spike 602 indicates that full acquisition of the wafer was temporarily lost. However, the wafer was reacquired before becoming unloaded. If this type of downward spike is detected during a period when the wafer is normally expected to be loaded, then the system can take corrective action. For example, the system might initiate a wafer reacquisition routine or it may move the wafer towards the polishing platen. Thus,
As another example, it is possible to detect when the wafer separates or “floats” from the polishing pad during the polishing step (i.e., if “hydroplaning” occurs). In this regard,
Signal 700 includes a discontinuity 702 (e.g., a bulge) during the polishing procedure. This discontinuity 702 indicates that the wafer has drifted away from the polishing pad and toward the workpiece presence sensor. However, the wafer was eventually forced against the polishing pad for completion of the polish. If this type of discontinuity is detected during the polishing period, then the system can take corrective action. For example, the system might terminate the polishing step, double check the pressure applied by the carrier head, increase the pressure applied by the carrier head, perform burping of the wafer, or the like. Thus,
As another example, it is possible to detect when a wafer breaks during the polishing step. In this regard,
Signal 800 includes a discontinuity 802 that occurs during the polishing procedure. This discontinuity 802 indicates that the wafer may be broken. If this type of discontinuity is detected during the polishing period, then the system can take corrective action. For example, the system might terminate the polishing immediately to prevent damage to the CMP system components. Thus,
As illustrated by the above examples, attributes or characteristics of the workpiece presence signal can be analyzed to determine abnormal or unusual operating conditions or statuses of the CMP system and initiate corrective or responsive actions. The attribute(s) may be indicative of the following, without limitation: improper loading of the workpiece on the carrier head; a broken workpiece occurring during polishing; lost acquisition of the workpiece during loading/unloading; workpiece separation from the polishing pad; or the like. The workpiece detection sensor is suitably configured to produce an output signal having characteristics indicative of these different statuses. Referring again to
It should be appreciated that a workpiece presence signal having a continuous analog output (as described herein) could also be used to detect or calculate the process endpoint dynamically, to determine when the procedure needs to transition from one state to another state (e.g., a “bulk” polish process to a “soft” polish process), to determine whether it is necessary to adjust the pressure in the bladder of the carrier head, to dynamically adjust the CMP process recipe, or the like. Moreover, the techniques and methodologies described here could also be combined with other CMP monitoring and control systems, e.g., endpoint detection (for example, optical reflectivity measurements), film thickness measurement (for example, eddy current measurements), or the like.
As mentioned above, certain embodiments of a CMP may utilize a capacitive sensor that generates an analog output that indicates the presence of a wafer.
Power supply 906, which provides 24 VDC in certain embodiments, has a positive terminal coupled to driver circuit 908, and a negative terminal coupled to system chassis 904 (which provides chassis ground). Driver circuit 908 may be implemented as a printed circuit assembly, a printed circuit board, or the like. Driver circuit 908, which is powered by power supply 906, is suitably configured to generate the activation signals for capacitive sensor 900. In addition, driver circuit 908 is suitably configured to receive and process the return signals from capacitive sensor 900. In certain embodiments, driver circuit 908 may include or cooperate with an impedance isolation circuit or arrangement. The impedance isolation circuit may be utilized in implementations where the capacitive sensor has a low output impedance and the corresponding analog input circuit has a low input impedance. In practice, the impedance isolation circuit may employ an operational amplifier between the output of the capacitive sensor and the analog input circuit.
Capacitor 910 is connected between mounting structure 909 and the common (ground) terminal of capacitive sensor 900. This may be accomplished using cabling, wiring, and suitable connection terminals. For one embodiment, capacitor 910 is a 47 nF capacitor. In this embodiment, capacitor 912 is connected between system chassis 904 and the common (ground) terminal of driver circuit 908. This may be accomplished using cabling, wiring, and suitable circuit board connection terminals. For one embodiment, capacitor 912 is a 47 nF capacitor. Capacitors 910/912 provide AC current paths for power supply 906 that enhance the quality and stability of the sensor signals. For example, during operation of CMP system 902, some AC current follows a path (represented by reference number 920) from capacitive sensor 900, to wafer 916, through the water 922 maintained by CMP system 902, and to system chassis 904.
This circuit arrangement and the use of capacitors 910/912 results in the return of more AC current (used to drive capacitive sensor 900) to power supply 906. This reduces noise in the measured sensor signal and improves the accuracy of the presence detection described above. Capacitors 910/912 remain in their respective conductive paths regardless of whether the carrier head is rotating, thus providing consistent output signal quality throughout the CMP cycle.
While at least one exemplary embodiment has been presented in the foregoing detailed description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiment or embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. Rather, the foregoing detailed description will provide those skilled in the art with a convenient road map for implementing the described embodiment or embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the scope defined by the claims, which includes known equivalents and foreseeable equivalents at the time of filing this patent application.
The subject matter of this application is related to the subject matter disclosed in U.S. patent application Ser. No. 11/553,572, titled Carrier Head for Workpiece Planarization/Polishing.