The invention relates to a device including a substrate, a metallization layer and an imide layer, wherein the imide layer is configured to improve an adhesion between a metallization layer and a mold compound, the mold compound used for housing the device.
Devices including a substrate, a metallization layer and an imide layer are used in semiconductor technology, e.g., for power semiconductors. Due to different thermal expansion coefficients, wafers including an imide layer are sensitive to wafer bow effects.
One embodiment provides a device including a substrate, a metallization layer on a main surface of the substrate, an imide layer on the metallization layer, at least one contact opening through the imide layer and a plurality of non-contact openings in the imide layer. The non-contact openings are dimensioned to provide for an increased surface area of the imide layer or a surface area of the imide layer which is not reduced by more than 10 percent.
The accompanying drawings are included to provide a further understanding of embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and together with the description serve to explain principles of embodiments. Other embodiments and many of the intended advantages of embodiments will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.
a illustrates a schematic representation of one embodiment of a surface view of a device.
b illustrates a schematic representation of one embodiment of a cutting plane AB of a device according to
c illustrates a schematic representation of one embodiment of a surface view of a device.
d illustrates a schematic representation of one embodiment of a cutting plane CD of a device according to
In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
It is to be understood that the features of the various exemplary embodiments described herein may be combined with each other, unless specifically noted otherwise.
With reference to the accompanying
a illustrates a schematic representation of a surface view of a device. The surface view on the device 100 illustrates a rectangular surface area representing the surface of the device 100, the surface area including different structures. The device 100 includes a substrate below the surface area illustrated in
The surface view further illustrates an insulation region 106 on an area around the second contact opening 104b to insulate the second contact opening 104b from the first contact opening 104a and from the third contact openings 104c. In this embodiment the insulation region 106 has a frame structure around the second contact opening 104b and a funnel-formed structure towards the first contact opening 104a. This structure may be used for super-junction device designs, for example. However, the insulation region 106 may also have another kind of form, for example, a pure frame around the second contact opening 104b without a funnel-formed structure. It is also possible to form a plurality of insulated electrodes, or contact openings respectively, by using a plurality of non-connected insulation regions 106 or by using an insulation region 106 with non-connected sub-regions respectively. The metallization layer 102 can also be surrounded by an insulation region 106 at borders of the device 100. Also different structures of contact openings 104a, 104c and non-contact openings 105 with or without insulation regions 106 may be formed.
It can be seen from the embodiment according to
The non-contact openings 105 or holes, respectively, have a round form, however, may also be differently formed, for example, in a rectangular or hexagonal manner. It can be seen from
The non-contact openings 105 in the imide layer 103 are configured to permit a mold compound to flow into the non-contact openings 105. By this flowing process, the mold compound may stick to the imide layer 103 utilizing a greater adhesion area. The contact area between the imide layer 103 and the mold compound is increased, resulting in a better de-lamination performance. The depth of the imide layer 103 has to be designed relative to the opening area of the holes 105, so as to increase the surface area of the imide layer towards the mold compound. To achieve this design goal, the imide layer 103 may have a thickness in the range of 1 μm to 40 μm, whereas lateral dimensions of the holes 105 may be in the range of 1 μm to 50 μm.
In one embodiment including a raster of non-contact openings 105 or holes, respectively, in the imide layer 103, a volume reduction of the imide layer 103 is caused by the holes 105. A reduced volume of the imide layer reduces wafer bow effects and reduces other negative effects due to the imide layer.
The contact openings 104a, 104b, 104c and the plurality of non-contact openings 105 may be formed, for example, by a photolithographic process or by some other kind of etching process. The contact openings 104a, 104b, 104c and the plurality of non-contact openings 105 may be formed in the same semiconductor processing process, for example. An etching process, for example, may result in different depths of the plurality of non-contact openings 105. A size-sensitive etching process, for example, may be applied for forming the non-contact openings 105.
Other embodiments may include an additional adhesion layer between the metallization layer and the imide layer 103, wherein the non-contact openings 105 may extend through the imide layer 103 and the adhesion layer to the metallization layer 102. The adhesion layer is adapted to improve an adhesion between the metallization layer and the imide layer. The adhesion layer may consist of a dielectric material, e.g., silicon nitride or silicon oxide, while the imide layer is composed of a polyimide chemical group, for example, PI, PBMI, PBI, PBO, PAI, PEI, PISO or PMI being robust against temperature and/or humidity variations.
Other embodiments include a plurality of adhesion layers, wherein the non-contact openings 105 may extend via the imide layer 103 and the plurality of adhesion layers to the metallization layer or wherein the non-contact openings may extend to one of the adhesion layers or to the imide layer. The non-contact openings may also extend to an inner region of the imide layer or to an inner region of one of the adhesion layers without extending to the metallization layer.
A schematic representation of the device 100 according to
The device 100 includes a substrate 101, a metallization layer 102 on the main surface of the substrate 101 and an imide layer 103 on the metallization layer 102. The contact openings 104a, 104c can be seen from this sectional view of the device 100. The first contact opening 104a opens the imide layer 103 in the middle of the device 100, wherein the third contact openings 104c open the imide layer 103 on the left and right side of the device 100 while leaving a small margin filled with imide layer 103 corresponding to the cutting plane AB illustrated in
The adhesion layer of other embodiments may be deposited between the metallization layer 102 and the imide layer 103. The adhesion layer may have the same structure as the imide layer with contact openings 104a, 104b, 104c and holes 105 in same regions of the main surface of the substrate.
c illustrates a schematic representation of one embodiment of a surface view of a device. The surface view on the device 110 illustrates a rectangular surface area representing the surface of the device 110, the surface area including different structures. The device 110 is similar to the device 100 according to
A schematic representation of the device 110 according to
The device 110 includes a substrate 101, a metallization layer 102 on the main surface of the substrate 101 and an imide layer 103 on the metallization layer 102. The contact opening 104a can be seen from this sectional view of the device 100. The contact opening 104a is bonded or soldered by the wire 107 for connecting the metallization layer or a region of the metallization layer to an outside terminal.
It is also possible to utilize different kinds of rasters, for example, with a non-regular offset 220 or with distances 210 unequal to lateral dimensions 211 or with a random or pseudo-random distribution of holes. Also different sizes of holes, e.g., with different diameters of individual holes or different forms (round, triangular, hexagonal etc.) of individual holes can be used.
Chip layout designs using non-contact openings, for example, using optimized hexagonal raster holes, may provide imide coverages in the range of 28% to 36%, that is a reduction in imide coverage by a factor of greater than two versus a layout without using holes.
In one or more embodiments, non-contact openings or holes, respectively, may have diameters in the range of 25 μm to 35 μm, for example. A (gross) hole area may be in the range of 5E-04 mm2 to 10E-04 mm2, for example, providing contact areas in the range of 0.8E-03 mm2 to 1.2 E-03 mm2 and a relation of contact area versus hole area between 1.3 and 1.8.
For a number of holes chosen to 3500, for example, a relation of contact area to mold area may result in a value of 5.5 to 6 and a contact area gain in the range of 25%.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.