This application relates generally to electronic circuitry, and more particularly to isolation of electronic devices on a substrate.
In a described example, an arrangement includes a substrate with a first surface and an opposing second surface. The substrate includes a trench extending into the substrate from the first surface, a die mounting area adjacent to the trench, a first plurality of leads, and a second plurality of leads. The second plurality of leads are spaced from the die mounting area to electrically isolate the second plurality of leads. A first mold compound fills the trench and is in the space between the trench and the second plurality of leads, a first die is attached to the first surface of the substrate and a second die is attached to a surface of the first mold compound in the trench.
In example arrangements, the problem of providing electrical isolation between semiconductor devices mounted on a substrate is solved by providing a portion of the substrate with an insulating material arranged for mounting a first semiconductor device that is electrically isolated from a second semiconductor device mounted to another portion of the substrate.
In this description, the term “trench” is used. As used in this description, a trench is a portion of a substrate where material is removed to form an opening at one surface of the substrate and having a recessed portion into the substrate at the opening with a bottom of the substrate material, and having sides extending from the opening into the substrate to the bottom of the recess. A trench can have a rectangular or square opening or other shaped opening at the surface with sides extending into the substrate, the sides forming a periphery of the trench and a bottom contacting the sides in the recess; alternatively the trench can extend entirely across the substrate so that the trench includes an opening and a recess into the substrate material in the opening with two opposing sides contacting the bottom of the recess, the trench having two opposing ends that are open at the periphery of the substrate. In the arrangements, the trench is filled with a dielectric material to form a “filled trench.” As used in this description the term “filled trench” includes the trench and the dielectric material in the trench.
In a described example, a packaged device includes a substrate with a first surface and an opposing second surface. The substrate includes a die pad having a trench formed therein and a die mounting area spaced from the trench. The trench extends partially into the die pad. The substrate further includes a first plurality of leads, and a second plurality of leads, with the second plurality of leads being spaced from, and electrically isolated from, the die pad. The packaged device further includes a first mold compound in the trench to form a filled trench and the first mold compound in the space between the second plurality of leads and the die pad, such that the first mold compound has a surface coplanar with a first surface of the die pad. A first die is attached to the die mounting area of the die pad and a second die is attached to the first mold compound in the filled trench, such that the first mold compound in the filled trench electrically isolates the second die from the first die. The packaged device further includes electrical connections between the first die and the second die, the first die and the first plurality of leads, and the second die and the second plurality of leads. A second mold compound covers the first die, the second die, and at least portions of the substrate.
In another described arrangement, a method includes attaching a first die to a first surface of a substrate, where the substrate comprises the first surface and an opposing second surface, attaching a second die to a first mold compound in a filled trench extending into the first surface of the substrate, electrically connecting the first die to the second die, the first die to the substrate, and the second die to the substrate, and covering the first die, the second die, the first mold compound and at least a portion of the substrate with a second mold compound.
In another described arrangement, a method includes forming a trench in a substrate, where the substrate comprises a die pad and leads, inserting a first mold compound into the trench, and inserting the first mold compound between the die pad and the leads. The method further includes attaching a first die to a die mounting area, where the die mounting area and the trench are on the die pad and where the die mounting area is spaced from the trench and attaching a second die to a surface of the first mold compound in the trench. The method further includes electrically connecting the first die to the second die, the first die to the substrate, and the second die to the substrate, and covering the first die, the second die, at least a portion of the substrate and the first mold compound with a second mold compound.
Some types of semiconductor packaging may co-package a first die with a second die, where the arrangement benefits from one of the dies being electrically isolated from the other die. In accordance with some arrangements, a first die may be a field-affect transistor (“FET”) die and a second die may be a driver or controller die, both of which are mounted on a first surface of a conductive substrate or lead frame. Both the FET die and the driver die may be attached to the substrate using a die attach, with the FET die attached by conductive die attach and the driver die attached using a nonconductive die attach. In a non-limiting illustrative arrangement, the driver die may be biased at a different potential than a ground coupled to the FET die and the system benefits from the driver die being electrically isolated from the FET die. Other arrangements should be appreciated in which the driver die may benefit from being isolated from the FET die. However, the nonconductive die attach used to attach the driver die to the substrate may not be sufficient to prevent leakage failures due to electro-migration and dendrite formation. Thus it may be beneficial to provide other or additional arrangements for isolating one die from the other die in a package, such as the driver die from the FET die.
In this description, the term “half etch” is used for a partial etch of the substrate. The term “half-etch” includes partial etches that extend half way, or more than or less than half way, through the thickness of the substrate. The half etch or partial etch may be achieved using a “half-etch process.” As used herein, in the half-etch process, part of the total thickness of the substrate is removed by etching, leaving a thinner portion as part of the finished substrate. In some half etch processes, partial etches are performed starting from the two opposing sides of the substrate, leaving two layers, one starting at the first surface and extending partway into the thickness of the substrate; while the second layer may start at the opposing second surface and extend partway into the thickness of the substrate. In some arrangements, the first layer and the second layer overlap such that the partial etches in the two layers may meet to form an opening that extends entirely through the substrate between the two opposing sides.
In this description, the term “die pad” refers generally to an area of the substrate configured to allow semiconductor dies to be mounted thereto.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are not necessarily drawn to scale. Elements may be described as “encapsulated” herein. When a package is formed using mold compound, the packaged integrated circuit is referred to as “encapsulated” and the process for molding may be referred to as “encapsulation.” As used herein, when a die mounted to a substrate is described as encapsulated, portions of the substrate remain exposed to form leads or terminals for the packaged device, even though it is described as “encapsulated” or it is described as being formed by “encapsulation.” Elements are described herein as “coupled.” When an element is coupled to another element, it can be directly connected, or it can be connected through intervening elements, elements connected through intervening elements are also coupled to one another as meant herein.
The term “semiconductor device” as used herein means devices formed on a semiconductor substrate. The semiconductor substrate can be a silicon wafer. Additional semiconductor substrate materials useful with the arrangements include other semiconductor wafers, such as gallium arsenide, gallium nitride, indium, indium phosphide, gallium phosphide, germanium, and silicon germanium. Silicon on insulator (SOI) substrates, epitaxial semiconductor layers on other materials, such as SiGe layers, and other layers of semiconductor material can be used. The semiconductor devices can be discrete devices such as field effect transistors (FETs), bipolar junction transistors (BJT's), sensors, LEDs, bulk acoustic wave devices (BAW devices), photosensors, and analog devices. In addition, the term “semiconductor devices” includes integrated circuit (IC) devices with many hundreds, thousands or more devices integrated to form a single IC. The semiconductor devices are fabricated using semiconductor processes to form multiple identical devices on a substrate, and once processing reaches a certain stage, the identical devices are separated from the substrate into individual semiconductor devices referred to as dies. A die is one of the multiple semiconductor devices formed on the substrate, and the process for separating the individual dies from one another is referred to as “singulation.”
The lead frame strip 100 and each of the substrates 102 may be formed from a conductive metal material, such as copper, brass, stainless steel, or Alloy-42 (a nickel iron alloy) and may be formed through the use of either a chemical etching or mechanical stamping process. The lead frame strip may be coated with thin platings to enhance solderability or to reduce corrosion or prevent tarnishing. Nickel, silver, palladium, gold and combinations of these can be used for the platings. As is further described hereinbelow, the lead frame strip 100 will eventually be subjected to a singulation process to separate each one of the substrates 102 from each other to form individual packaged devices.
The packaged device 200 includes a substrate 202, which may be a lead frame. In alternative arrangements, the substrate 202 may be a molded interconnect substrate (MIS), a pre-molded lead frame (PMLF), or another conductive substrate or conductive lead frame. Substrate 202 has a die pad 204 and a plurality of leads 206. The die pad includes a die mounting area 205. The plurality of leads 206 includes a first plurality of leads 208 and a second plurality of leads 210, such that the second plurality of leads 210 are isolation leads that are spaced from and electrically isolated from the first plurality of leads 208. The first plurality of leads 208 may include both control pins 207 and source/ground pins 209. The second plurality of leads 210 may be a high voltage drain lead. The substrate 202 includes a first surface 212, which may be referred to as a top surface as the substrate 202 is oriented in
The lead frame used as the substrate in
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The packaged device 200 further includes a first die 216 and a second die 218 that are attached to the first surface 212 of the substrate 202 on the die pad 204. The dies can be any semiconductor devices, including discrete devices such as power transistors, inductors, capacitors, sensors, photocells, or resistors either singly or in multiple arrays, and can include integrated circuitry having several or even thousands of transistors coupled to perform a particular function. Example power transistors include power FET devices. Example integrated circuits include switching controllers for controlling power FETs in power supplies and power conversion applications, gate driver devices for power FETs, as well as analog to digital converters and processors. The first die 216 is attached to the die mounting area 205. The second die 218 is attached to the first mold compound 220 that fills the filled trench 226 portion of the substrate 202. The perimeter 228 of the filled trench 226 extends beyond an outer perimeter of the second die 218 so that the first mold compound 220 extends laterally beyond an outer perimeter of the second die 218. The first mold compound 220 electrically isolates the second die 218 from the first die 216. In some aspects the second die 218 is a driver or controller die and the first die 216 is a transistor die, such as a field-effect transistor (“FET”). The FET may be a lateral FET or a vertical FET. Wire bonds 222 connect the first die 216 and the second die 218, the first die 216 and the substrate 202, and the second die 218 and the substrate 202. In some arrangements, the wire bonds 222 connect the first die 216 and the second die 218, the first die 216 and the first plurality of leads 208, and the second die 218 to the second plurality of leads 210.
A second mold compound 224 covers at least portions of the first die 216, the second die 218, and the substrate 202. The second mold compound 224 may be referred to as an “overmold” because the second mold compound 224 may be applied to portions of the substrate 202 and at least partially cover elements added to the substrate 202, such as the first die 216 and the second die 218, after the components have been added or built upon the substrate 202. In some aspects, the second mold compound 224 may be a dielectric or similar insulating material. In some additional aspects, the first mold compound 220 and the second mold compound 224 are formed of different materials. In alternative aspects, the first mold compound and the second mold compound can be of same or similar materials. The second mold compound is coterminous with the first mold compound, such that a surface of the second mold compound shares a surface with a surface of the first mold compound.
The substrate 302, which may also be referred to as a lead frame, has a die pad 304 and a plurality of leads 306. The plurality of leads 306 includes a first plurality of leads 308 and a second plurality of leads 310, such that the second plurality of leads 310 are isolation leads that are spaced from and electrically isolated from the first plurality of leads 308. The first plurality of leads 308 may include both control pins 307 and source/ground pins 309. The second plurality of leads 310 may be a high voltage drain lead. The substrate 302 includes a first surface 312, which may be referred to as a top surface, and an opposing, second surface 314, which may be referred to as a bottom surface. The substrate 302 further includes a half etch or trench 326 formed into the first surface 312 of the substrate 302. In particular, the trench 326 is formed in the die pad 304 portion of the substrate 302 and is spaced apart from a die mounting area 305 of the die pad 304. The trench 326 includes an outer perimeter 328. In an example arrangement, the trench 326 has a length L1 and a width W1, such that the length L1 is greater than the width W1. Although not visible in the arrangement as illustrated in
Still referring to
The packaged device 300 further includes the first die 316 attached to the first surface 312 of the substrate 302 on the die pad 304. The second die 318 is attached to the first mold compound 320 portion of filled trench 326. The perimeter 328 of the filled trench 326 extends beyond an outer perimeter of the second die 318 so that the first mold compound 320 extends laterally beyond an outer perimeter of the second die 318. In some aspects, the outer perimeter 328 of the filled trench 326 extends beyond the outer perimeter of the second die 318 by approximately 100 μm. In some additional aspects, the outer perimeter 328 of the filled trench 326 may extend beyond the outer perimeter of the second die 318 by between 10 and 120 μm. The first mold compound 320 in the filled trench 326 electrically isolates the second die 318 from the first die 316. In some aspects the second die 318 is a driver or controller die and the first die 316 is a transistor die, such as a lateral field-effect transistor (“FET”). The first die and the second die 316, 318 can be any semiconductor devices including discrete transistors, passives such as inductors, capacitors, resistors either singly or in arrays, and including integrated circuitry such as gate drivers and controllers for power FETs, microprocessors, digital signal processors, mixed signal processors, analog to digital converters, and microcontrollers. Electrical connections 322 electrically connect the first die 316 and the second die 318, the first die 316 and the substrate 302, and the second die 318 and the substrate 302. In some arrangements, the electrical bonds 322 connect the first die 316 and the second die 318, the first die 316 and the first plurality of leads 308, and the second die 318 to the second plurality of leads 310. In yet some arrangements, the electrical connections 322 are wire bonds. In additional arrangements, the electrical connections 322 can be made by ribbon bonds. In further arrangements, the first die 316 can be connected to leads on the substrate using “flip-chip” bonding, where conductive posts formed on bond pads on the die are connected to the substrate using solder on the ends of the posts. The second die 318 is mounted to the insulating mold compound 320 in the filled trench 326, however, and so flip chip bonding is not appropriate for the second die.
A second mold compound (not shown for simplicity) that is similar to the second mold compound 224 illustrated in
The second die 418 has a width W3 that is less than the width W2 of the portion of the first mold compound 420 in the filled trench 426. In some aspects, the width W3 may be between 1000 and 1200 μm. Although not explicitly shown, the outer perimeter of the trench 426 and the portion of the first mold compound 420 that fills the filled trench 426 extends laterally beyond an outer perimeter of the second die 418. For example, sidewalls 440 of the portion of the first mold compound 420 in the filled trench 426 extend laterally away from sidewalls 442 of the second die 418 to a width W4. The distance between the outer perimeter of the first mold compound 420 that fills the filled trench 426 and, correspondingly, the width W4 between the sidewalls 440 of the first mold compound 420 and the sidewalls 442 of the sidewalls of the second die 418 provides electrical isolation between the second die 418 and the first die 416. In some aspects the second die 418 is a driver or controller die and the first die 416 is a transistor die, such as a lateral field-effect transistor (“FET”).
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Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.