Claims
- 1. In a fault-tolerant digital data processing system of the type having plural functional units, including any of a central processing unit, a memory unit, a peripheral device, and a peripheral device controller, the improvement comprising
- A. first and second bus means connected to at least selected ones of said functional units, each said bus means for transferring information-representative signals, including at least one of a data, address, and control signal between said selected functional units,
- B. each of said selected functional units including, and being associated with, bus interface means for transferring said information-representative signals between the associated functional unit and at least one of said first and second bus means, and
- C. the bus interface means of a first said selected functional unit including strobe means for normally applying duplicate timing signals synchronously and simultaneously to said first and second bus means for transfer to said other selected functional units, said timing signals being indicative of a timing of said transfer of information-representative signals on said first and second bus means,
- D. each said other selected functional unit including
- i. logic means coupled to said first and second bus means for monitoring timing signals received on them and producing tracking signals in response thereto,
- said logic means including means for producing local strobe signals based on a logical combination of said timing signals and said tracking signals,
- ii. means for responding to said local strobe signals for at least initiating processing of information-representative signals received by that functional unit on both said first and second bus means.
- 2. In a fault-tolerant digital data processing system according to claim 1, the further improvement wherein the bus interface means associated with at least one of said selected functional units includes means for normally transferring duplicate ones of said information-representative signal synchronously and simultaneously on said first and second bus means.
- 3. In a fault-tolerant digital data processing system according to claim 2, the further improvement wherein at least at selecteds ones of said functional units include means for processing, in the absence of selected fault condition, duplicate information-representative signals received on said first and second bus means.
- 4. In a digital data processing system according to claim 2, the further improvement where said selected bus interface means includes means responsive to fault on one of said bus means for processing signals received only on the other of said bus means.
- 5. In a processing system according to claim 1, the further improvement wherein at least one of said selected functional units includes first and second processing sections, each said processing section being coupled with said first and second bus means for communicating with others of said functional units, each of said first and second processing sections being responsive to duplicate input signals received substantially synchronously and simultaneously with the other processing section to produce, in the absence of fault, identical resultant signals synchronously and simultaneously with that other processing section.
- 6. In a digital data processing system according to claim 5, the further improvement comprising
- a further functional unit, coupled to said first and second bus means,
- said further functional unit for processing input signals received identically, synchronously and simultaneously with said first selected functional unit to generate, in absence of fault, output signals identically, synchronously, and simultaneously therewith.
- 7. In a digital data processing system according to claim 5, the further improvement comprising comparison means coupled to said first and second processing sections for comparing resultant signals produced thereby and for generating a fault signal in the event those resultant signals do not match.
- 8. In a method for operating a fault-tolerant digital data processing system of the type having plural functional units, including any of a central processing unit, a memory unit, a peripheral device, and a first peripheral device controller, the improvement comprising the steps of
- A. providing first and second buses for transferring information-representative signals, including at least one of a data, address, and control signal between selected ones of said functional units,
- B. transferring information-representative signals between at least one of said selected functional units and said first and second buses for transfer to at least one other said selected functional unit,
- C. normally applying duplicate timing signals synchronously and simultaneously to said first and second buses for transfer to said selected functional units, said timing signals being indicative of a timing of said transfer of information representative signals on said first and second bus means,
- D. within each of said selected functional units,
- monitoring timing signals received on said first and second buses to produce tracking signals in response thereto,
- producing a local strobe signal based on a logical combination of said timing signals and said tracking signals, and
- responding to said local strobe signal to at least initiate processing of information-representative signals received by that functional unit on said first and second buses.
- 9. In a method according to claim 8, the further improvement comprising the step of providing, within at least one of said selected functional units, first and second processing sections, each said processing section communicating with others of said selected functional units over the first and second buses, and each said section responding to identical input signals received synchronously and simultaneously with the other processing section to produce, in the absence of selected fault, identical resultant signals synchronously and simultaneously with the other processing section.
- 10. In a method according to claim 9, the further improvement comprising the step of comparing signals produced by the first and second processing sections for generating a fault signal in the event those compared signals do not match.
- 11. In a method according to claim 9, the further improvement comprising the step of providing a further functional unit coupled to said first and second buses for processing input signals received identically, synchronously and simultaneously with another of said functional units to generate, in absence of fault, resultant signals identically, synchronously, and simultaneously therewith.
- 12. In a method according to claim 8, the further improvement comprising the step of normally transferring duplicate ones of said information-representative signal synchronously and simultaneously on said first and second bus means.
- 13. In a method according to claim 8, the further improvement comprising the step of responding to said duplicate timing signals to transfer said information-representative signals between said selected functional units on least one of said first and second buses.
- 14. In a method according to claim 13, the further improvement comprising the step of processing, in the absence of selected fault condition, duplicative information-representative signals received synchronously and simultaneously on said first and second input/output buses.
- 15. In a method according to claim 14, the further improvement comprising the step of responding to fault on one of said buses for processing signals received only on the other of said buses.
REFERENCE TO RELATED APPLICATIONS
This application is a continuation-in-part of U.S. patent application Ser. No. 904,827, filed Sept. 8, 1986 now U.S. Pat. No. 4,750,177, issued June 7, 1988, which is a continuation of U.S. patent application No. 307,436, filed Oct. 1, 1981. This application is, further, a continuation-in-paert of U.S. patent application Ser. No. 018,629, filed Feb. 25, 1987.
US Referenced Citations (16)
Foreign Referenced Citations (1)
Number |
Date |
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WO8100925 |
Apr 1981 |
WOX |
Non-Patent Literature Citations (5)
Entry |
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"Fault Tolerant Systems" and Error Detection, T. Anderson et al, Fault Tolerance Principles and Practice, Prentice-Hall, 1981, pp. 93-145. |
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Continuations (1)
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307436 |
Oct 1981 |
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Continuation in Parts (1)
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904827 |
Sep 1986 |
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