The present disclosure relates to double self-aligned phase change memory device structures and methods of making the same.
Phase change memory (PCM) is a type of non-volatile computer memory that utilizes differences in the electrical resistivity of the crystalline and amorphous phase states of memory materials. Devices that incorporate PCM typically comprise substrates on which a particular memory material (e.g., a chalcogenide) is deposited.
The memory material is characteristically deposited within structures (such as holes, trenches, or the like) in or on the surfaces of the substrate. Patterned electrodes are also deposited on the substrate to allow for the conduction of current. The conduction of current is effected through the deposited memory material, with the level of current being dependent on the resistivity and heating efficiency of such memory material and its alloy properties on phase change.
Memory materials used in the manufacture of PCM devices include germanium antimony telluride (GST) and germanium-telluride (GeTe). The GST materials can function in principle very effectively as phase change material for a volume, v, having characteristic dimensions as small as 5 nm. The trend is to make PCM devices based on GST with characteristic dimensions in the regime of 30 to 10 nm or less in future generations of devices.
To confine the heat for phase change, PCM material-containing structures may be fabricated with surrounding or otherwise associated dielectric material, and the structure may embody aspect ratios or dimensional characteristics that facilitate heating efficiency. The deposition of the phase change memory material can be carried out by vapor deposition processes, e.g., chemical vapor deposition (CVD) or atomic layer deposition (ALD), to produce films of useful character for phase change memory applications inside a cavity, e.g., a hole or trench in a substrate.
In addition to the deposition of phase change memory materials into existing substrate surface structures such as cavities, e.g., holes or trenches, phase change memory device structures can also be fabricated as confined cell equivalent structures by initially forming the phase change memory material, and then surrounding the phase change memory material with dielectric material. The phase change memory material in such applications may be in a very small cell structure having correspondingly small top and bottom contact areas, e.g., areas on the order of 5-10 nm×50-100 nm (thickness of contact metal x width of contact metal) permitted by current lithography capability, with the phase change memory material extended at a height of 30 nm or more. In such cell structures, the phase change memory material is surrounded by thermally and electrically insulating materials.
The present disclosure relates to double self-aligned phase change memory device structures and methods of making the same.
In one aspect, the disclosure relates to a double self-aligned phase change memory device structure, comprising spaced-apart facing phase change memory film members symmetrically arranged with respect to one another, each of the phase change memory film members at an upper portion thereof being in contact with a separate conductive element, and each of the phase change memory film members being in a range of from 5 nm to 25 nm in thickness.
In another aspect, the disclosure relates to a method of forming a memory device structure of the disclosure, comprising the process flow illustrated in
In a further aspect, the disclosure relates to a method of forming a memory device structure of the disclosure, comprising the process flow illustrated in
Other aspects, features and embodiments of the disclosure will be more fully apparent from the ensuing description and appended claims.
The present disclosure relates to double self-aligned phase change memory device structures and methods of making the same.
In one aspect, the disclosure relates to a double self-aligned phase change memory device structure, comprising spaced-apart facing phase change memory film members symmetrically arranged with respect to one another, each of the phase change memory film members at an upper portion thereof being in contact with a separate conductive element, and each of the phase change memory film members being in a range of from 5 nm to 25 nm in thickness.
Such memory device structure may be fabricated with a protecting layer disposed on facing surfaces of said phase change memory film members. The protecting layer may extend downwardly from an upper end of each phase change memory film member over the facing surface thereof to a lower portion of the phase change memory film member. In various embodiments, the structure may be fabricated, with a dielectric material between the protecting layers of the phase change memory film members.
In the memory device structure, each of the phase change memory film members may be of any suitable thickness, e.g., a thickness in a range of from 8 to 20 nm, a thickness in a range of from 10 to 15 nm, a thickness in a range of from 5 to 15 nm, or any other suitable thickness effective for performance of the memory device structure in a phase change memory implementation.
In various embodiments, each phase change memory film member may have a height appropriate to the phase change memory implementation of the structure, e.g., in a range of from 20 to 80 nm, in a range of from 30 to 75 nm, or any other suitable range of height values.
The phase change memory material itself may comprise any suitable material, e.g., a chalcogenide, such as a germanium-antimony-tellurium alloy, or a germanium telluride alloy.
In some embodiments of the memory device structure of the disclosure, the phase change memory material film members may be arranged in a confined cell arrangement comprising a cross-spacer structure wherein the phase change memory material film members are positioned transversely to and reposed on titanium nitride members. In such cross-spacer structure, the contact area of each phase change memory film member and the titanium nitride member on which it is reposed may be in a range of for example from 50 to 150 nm2, a range of from 80 to 120 nm2, or any other suitable contact area range.
The memory device structure of the disclosure may include arrangements in which each phase change memory material film member comprises an upper planar segment, an intermediate angular transition segment, and a lower planar segment, arranged so that the upper planar segment and lower planar segment of each phase change memory material film member are generally parallel to one another and to respective upper planar and lower planar segments of the other phase change memory material film member facing it, wherein transverse spacing distance between upper planar segments of the respective phase change memory material film members is greater than transverse spacing distance between lower planar segments of the respective phase change memory film members. In such structural arrangements, the intermediate angular transition segment may be of a generally planar character, or may be in a curvate or other non-planar conformation.
In other embodiments of the every device structure of the present disclosure, each phase change memory material film member may comprise an upper planar segment and a lower planar segment, elevationally spaced apart from one another, and arranged so that the upper planar segment and lower planar segment of each phase change memory material film member are generally parallel to one another and to respective upper planar and lower planar segments of the other phase change memory material film member facing it, wherein transverse spacing distance between upper planar segments of the respective phase change memory material film members is greater than transverse spacing distance between lower planar segments of the respective phase change memory film members.
The present disclosure further contemplates various methods of forming memory device structures of the disclosure, as hereinafter more fully described, and including the process flow illustrated in
The features, aspects, and advantages of the double self-aligned phase change memory device structures of the present disclosure, and methods of making the same, are more fully illustrated with respect to the ensuing description of
An anisotropic etch of the GST next is conducted to yield the structure shown in
Each of the phase change memory film members 104, 106 comprises a bottom upwardly extending segment 116 that is coupled to a top upwardly extending segment 112 by an angled transitional segment 114 therebetween. The transitional segment 114 may have any suitable angle in relation to the top and bottom segments 112, 116 of the phase change memory film members, e.g., 45°. Layers 108, 110, 122 and 124 comprise titanium nitride (TiN), and layers 118 and 120 are layers of protective material for the TiN in the double self-aligned phase change memory device structure.
In the
In the
Such a modified phase change memory device structure is shown in
While the disclosure has been set out herein in reference to specific aspects, features and illustrative embodiments, it will be appreciated that the utility of the disclosure is not thus limited, but rather extends to and encompasses numerous other variations, modifications and alternative embodiments, as will suggest themselves to those of ordinary skill in the field of the present disclosure, based on the description herein. Correspondingly, the invention as hereinafter claimed is intended to be broadly construed and interpreted, as including all such variations, modifications and alternative embodiments, within its spirit and scope.
This application is a U.S. national phase under the provisions of 35 U.S.C. §371 of International Patent Application No. PCT/US13/67145 filed Oct. 28, 2013, which in turn claims the benefit of priority under 35 USC 119 of U.S. Provisional Patent Application No. 61/720,283 filed Oct. 30, 2012 in the name of Jun-Fei Zheng for DOUBLE SELF-ALIGNED PHASE CHANGE MEMORY DEVICE STRUCTURE. The disclosures of such International Patent Application No. PCT/US 13/67,145 and U.S. Provisional Patent Application No. 61/720,283 are hereby incorporated herein by reference, in their respective entireties, for all purposes.
Filing Document | Filing Date | Country | Kind |
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PCT/US2013/067145 | 10/28/2013 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
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WO2014/070682 | 5/8/2014 | WO | A |
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Number | Date | Country | |
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20150280115 A1 | Oct 2015 | US |
Number | Date | Country | |
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61720283 | Oct 2012 | US |