This Application claims the benefit of priority to Japanese Patent Application 2014-131007, filed on Jun. 26, 2014, the contents of which are hereby incorporated by reference.
The present invention relates generally to semiconductor devices utilizing optical interconnects, and more particularly, to improving coupling efficiency between such devices.
As semiconductor devices process larger amounts of information, higher communication speeds between such devices are desirable. In order to address this desire, silicon photonics, an optical communication technology in which data is transferred among computer chips by optical rays, has been increasingly developed.
Traditional microchips (ICs or chips) utilize electrical interconnections between embedded devices and other chips to process and move data. Silicon photonic chips utilize optical interconnects to allow communication to occur between devices and chips through the propagation of light. Optical, or light, coupling refers to a method of interconnecting two devices to transfer an optical signal using light waves, and is often accomplished through the use of a coupling device or coupler. Optical coupling devices are often made up of a planer waveguide and a diffractive grating coupler (DGC) formed on a silicon-on-insulator (SOI) device and a second planer waveguide. Such waveguides may be used as multimode waveguides; however, single mode waveguides may be preferable due to the relative quality of communication and attenuation of light propagating in the waveguide.
One embodiment of the present invention provides a light coupling structure. The light coupling structure may include: a silicon based waveguide including a diffractive grating coupler for directing a light signal; a polymer waveguide in which the light signal may propagate between the silicon based waveguide and optical wiring; a total internal reflection (TIR) mirror formed within the polymer waveguide at an angle such that at least a portion of the light signal, either directed from the diffractive grating coupler or from the optical wiring via the polymer waveguide, intersects the TIR mirror and is reflected into the other of the diffractive grating coupler or the polymer waveguide; and the optical wiring, optically coupled to the polymer waveguide such that light may pass between the optical wiring and the polymer waveguide.
A second embodiment of the present invention provides a semiconductor device. The semiconductor device may include: a silicon photonics chip formed by a silicon-on-insulator (SOI) structure and including a silicon based waveguide with a diffractive grating coupler on a buried oxide layer of the SOI structure; and a polymer waveguide in which a light signal may propagate between the silicon photonics chip and a separate optical medium; and a total internal reflection (TIR) mirror formed within the polymer waveguide at an angle such that at least a portion of a light signal traveling from either the silicon photonics chip or the polymer waveguide intersects the TIR mirror and is reflected towards the other of the silicon photonics chip or the polymer waveguide.
A third embodiment of the present invention provides a method for forming a light coupling structure. The method may comprise: forming a polymer waveguide on an organic substrate; removing an angular portion of the polymer waveguide such that an angled void is created within the polymer waveguide having at least two parallel surfaces to create a total internal reflection (TIR) mirror; forming a via plug filled with an electric conducting material in the polymer waveguide; soldering a silicon photonics chip, having a diffractive grating coupler, to the via plug such that electric signals may pass between the silicon photonics chip and the polymer waveguide by way of the via plug, the silicon photonics chip positioned such that at least a portion of a light signal traveling from the polymer waveguide can be directed at the diffractive grating coupler by the TIR mirror and at least a portion of a light signal traveling from the silicon photonics chip can be directed at the TIR mirror by the diffractive grating coupler.
Embodiments of the present invention provide a light coupling structure for coupling between a silicon photonic chip and an organic structure, such as a circuit board.
Embodiments of the present invention will be described herein with reference to the drawings; however, the present invention is not limited to the disclosed embodiments and examples.
Circuit board 107 may be composed of, for example, a composite epoxy material, and may have mounted a plurality of Si-Ph chips 103 allowing optical communication between circuit board 107 and CPU or ASIC 102 thereon. CPU or ASIC 102 is used for various kinds of data processing and may be mounted on circuit board 107 by conventional C4 connections 106. CPU or ASIC 102 may electronically communicate to Si-Ph chips 103 through metal wirings 108 embedded in circuit board 107, such that communication between the CPU or ASIC may be attained.
Metal wirings 108 may be connected to Si-Ph chips 103 from CPU or ASIC 102 through via plugs (not shown) so that optical communication to another MCM can be achieved via the Si-Ph chips. Si-Ph chips 103 are amounted to circuit board 107 through light coupling structure 104, disposed between circuit board 107 and Si-Ph chips 103. Light coupling structure 104 may be formed in the organic substrate. Si-Ph chips 103 may comprise a parallel data transfer capability, such as 24 channels in transmission, and/or reception through the bundle of 24 single mode optical fibers. Additional or alternative communication capabilities may be used. For example, Si-Ph chips 103t may be operated in a transmission mode and Si-Ph chips 103r may be operated in a receiver mode.
Light coupling structure 104 generally comprises a single mode-polymer waveguide (SM-PWG) and an optical element, e.g., a total internal reflection (TIR) mirror, and in one embodiment receives optical signals from Si-Ph chips 103t and transfers received light to optical wirings 105 through a coupling mechanism. In turn, Si-Ph chip 103r, in this embodiment, would receive light signals from Si-Ph chips 103t of a connected MCM through optical wirings 105 of light coupling structure 104. Optical wirings 105 may be formed as a planer waveguide or may be formed as optical fiber(s). In one embodiment, a plurality of optical wirings may be collected into a single bundle as shown in
In one embodiment, optical wirings 105 may also be a waveguide allowing single mode light propagation, which may desirable for communication quality and attenuation of the light signals when long distance communication is requested. In other embodiments, the waveguide may be implemented in multi-mode optical communication.
Over light coupling structure 104, at least one Si-Ph chip 103 is placed, through proper electronic contacts such as solder balls (not shown). In one embodiment, light coupling structure 104 is formed with optical grade polymer materials such as polycarbonate, poly-methyl methacrylate, poly alkylsiloxane, silsesquioxane, epoxy resin, epoxy-silicone resin, chelate polymer or the like. In general, light coupling structure 104 comprises an optical waveguide, preferably an SM-PWG, for allowing single mode light propagation in light coupling structure 104. Layers of the waveguide may be formed by known methods, such as spin-coating or dry film lamination techniques.
The top view of SM-PWGs 202 is shown, with one end of SM-PWGs 202 overlapping Si-Ph chip 103, and the other end coupled to optical fiber 105 acting as the optical wiring. Optical fiber 105 may be a single mode optical fiber or a single mode waveguide. The overlapped region depicted contains at least a portion of light coupling structure 104, and shows diffractive grating coupler (DGC) 203 overlying TIR mirror 204 such that the optical signal may be interconnected between Si-Ph chip 103 and SM-PWGs 202. Each of DGCs 203 is formed by arrayed ridges of silicon, where the length of each ridge runs across (substantially perpendicular to) the direction of light propagation, and the length of each ridge across the light propagation axis is adjusted such that along the series of ridges, the respective lengths taper or shorten as they near the light propagation directions, i.e., the length of ridges in the center region is longer than ridges within edge regions. This helps to improve the light coupling efficiency. A detailed construction of the light coupling structure is detailed with regard to
Si-Ph chip 103 comprises a silicon semiconductor deposited on a buried oxide (BOX) layer. Si-Ph chip 103 further comprises a planer waveguide 206 connected to DGC 203 on the BOX layer such that the Si-Ph chip 103 may send and receive optical signals and propagate optical signals through waveguides 206 acting as optical wiring connections to other semiconductor devices. DGC 203 of planer waveguide 206 in Si-Ph chip 103 may be formed on the cladding layer thereof such that the optical signal propagating in waveguide 206 may be sent outside the waveguide, and in turn the optical signal propagating in the optical wirings 105 may be introduced into waveguide 206.
Now, with reference to
In one embodiment, DGC 203 is covered by, at least, passivation layer 103d. Passivation layer 103d may be composed of, for example, silicon dioxide, silicon carbide, silicon nitride, etc. depending on a particular application and their refractive indices.
Si-Ph chip 103 is disposed on light coupling structure 104 with a slight air gap 301. Air gap 301, in one embodiment, is obtained utilizing electronic conductive spacers such as solder balls (not shown). In another embodiment, air gap 301 may be omitted, which may be desirable depending on strength and process durability under fabrication processes of passivation layer 103d.
As depicted, SM-PWG 202 in light coupling structure 104 includes outer layers 202a and 202c, acting as cladding layers, and inner layer 202b, acting as the core within which optical signals may propagate. Outer layers 202a and 202c, in one embodiment, are about 5 micrometers, and inner layer 202b may be about 8 micrometers. TIR mirror 204 is formed within SM-PWG 202 at a slant angle θTIR, with respect to the horizontal direction of the figure and extends transversely across at least the core of SM-PWG 202. TIR mirror 204 is defined inside SM-PWG 202 by substantially parallel polymer surfaces leaving a given space therebetween. TIR mirror 204 may reflect an optical signal propagating inside core layer 202b toward DGC 203, which in turn may introduce the optical signal into planar waveguide 103c in a receiver mode.
The inside of the parallel polymer surfaces of TIR mirror 204 is filled with an appropriate inert gas material such as air, nitrogen, He, Ne, Ar, CO2, etc., which each may provide varying reflection performances. An optical signal propagating inside waveguide 103c may be guided into core layer 202b of SM-PWG 202 by reflection of TIR mirror 204 in a transmitter mode. The slant angle θTIR of TIR mirror 204 may provide relatively large tolerances for the relative alignment between Si-Ph chip 103 and light coupling structure 104.
In one embodiment, one of solder ball 530 or 531 may not provide electrical contact, but may instead be positioned as a “dummy” spacer so as to ensure a parallel configuration with even spacing between Si-Ph chip 103 and SM-PWG 202.
Optical signal (light) 510 is diffracted by DGC 203 and can be reflected by TIR mirror 204 in directions TX and RX. Inner surfaces of TIR mirror 204 may be defined by a polymer material cut by a laser cutting technology leaving void space 520 between the opposite surfaces. This void space 520 provides the difference in the refractive indexes from the polymer materials for providing the appropriate reflection conditions. Void space 520 is typically filled with air, which may provide an appropriate reflection property—though other gases may be used.
In turn, the tolerances in the X-direction may be kept in the interference order of the wavelength of an optical signal. In the depicted example, the wavelength of the light is 1.31 micrometers. The coupling loss in the TX direction can be as low as 1.76 dB and that in the RX direction is as low as 1.89 dB. The tolerance in the Z direction 7.0 micrometers (TX direction) and 3.0 micrometers (RX direction). Both in the TX and RX directions, the decrements of coupling losses are not so significant and positioning in the X direction may be adjusted depending on requirements of a particular implementation—thus allowing a wide variation of positioning between Si-Ph chips 103 and SM-PWG 202.
wherein Iinput is the light intensity of the input light and Ioutput is the light intensity of the throughput.
As shown in
The shape of each periodic ridge is an almost rectangular shape in the described embodiment, but is not limited thereto—the shape of the ridge may differ in alternative embodiments depending on the diffraction performance required. An optical signal propagating in the planer waveguide is diffracted by the periodic grating along two directions (Pup and Pdown) as the nature of DGC 203.
In the current depiction and embodiment, the useful light diffraction is Pup, and improvement of intensity in the Pup direction may be achieved by optimization of optical parameters. In addition, in this embodiment, poly-silicon overlay 103e is deposited on the outer surface of DGC 203 so as to improve directionality. Poly-silicon overlay 103e, in one embodiment, may be around 0.15 micrometers. This overlay coating is compatible with standard CMOS processes. Other possible strategies for improving the directionality may also be utilized. Ridge 103f, as depicted, is made up of both poly-silicon overlay 103e and a portion of planer waveguide 103c. The ridge portions of planar waveguide 103c making up the various ridges 103f may be etched from the larger planar waveguide 103c material by photolithography processes to set the ridge height h depending on the desired diffraction efficiency of DGC 203.
Phase matching of the diffraction according to an embodiment of the present invention is defined as follows:
wherein ntop is the refractive index of the silicon dioxide used as the passivation layer and k0 is the vacuum wavenumber of light for the optical signal and is given as k0=2π/λ. The parameter θ is the diffraction angle of outgoing and/or incoming light to the diffractive grating coupler. The parameter neff is the effective refractive index in the region of diffractive grating. The parameter m is a positive integer and the parameter Λ is the grating period.
The optimization of the phase matching was conducted so as to maximize the directionality D under the given optical parameters. The directionality D is defined as follows:
In the optimization, the directionality was set as the object function under the constraint condition of the optical parameters; the constraint parameters are as follows:
Light wavelength: 1.31 micrometer
Si waveguide thickness: 0.22 micrometer
SiO2 top layer thickness: 0.7 micrometer
SiO2 BOX thickness: 2 micrometer
Poly-Si thickness: 0.15 micrometer
Polymer waveguide core thickness: 8 micrometer
Refractive index of Si(nSi): 3.5074
Refractive index of SiO2(nSiO2): 1.4468
Refractive index of polymer core(nco): 1.581
Refractive index of polymer cladding(ncl): 1.576
The grating period (Λ) and the height of the ridge in the grating (h) were set as the independent parameter.
In step S901, initial constraint parameters are set and an initial value of Λ is determined using the optical parameters in step S902. In step S903, the directionality D is set as the object function for maximization and the parameters h and Λ are scanned for the light wavelength λ.
In step S904, Λ and h are assumed for diffractive grating coupler in the RX direction and in step S905, the grating period Λ is further scanned so as to maximize the coupling efficiency η. Next, in step S906, the optimization of other parameters such as TIR angle θTIR and grating position, etc. In another embodiment, optimization of the grating pattern, for example, uneven period of the ridges and widths, may be incorporated into the grating pattern.
In step S907, a determination is performed as to whether or not the coupling efficiency is maximized. If maximized (yes), the process goes to step S908 to end. If not maximized (no), the process returns to step S904 to repeat steps S905-907 until the determination in the step S907 returns an affirmative result.
As the result of the present optimization on the example measurements previously given, a grating period Λ was determined to be 0.47 micrometers and the height of the grating ridge (h) was determined to be 0.19 micrometers.
In
In the example embodiment, if the diffraction angle θ is to be 6 degrees, then θTIR is determined to be 42 degree. In other embodiments, the slant angle θTIR may be changed depending on a particular construction of the semiconductor device.
The gap space may be filled with certain inert gas such as air, nitrogen, Ne, Ar, and the like. The via plug 1403 is formed by a photolithography and deposition process of an electric conductive material such as copper. Via plug 1403 may be used as an electric connection to Si-Ph chip 103.
As shown in
In
The use of both the diffractive grating coupler in conjunction with the angled TIR mirror provides several advantages, in varying embodiments, to a conventional diffractive grating coupling mechanism. One such advantage is large tolerances in light propagation direction and spacing of an existing gap. Another advantage is high process durability and process applicability allowing conventional flip chip bonding. Yet another advantage is that the simplified coupling structure allows for size reduction. All embodiments will not necessarily achieve such advantages.
In other embodiments, the structure of DGC 203 may be modified by placing reflectors on BOX 103b having an optimized BOX thickness for improving the directionality, and the poly-silicon overlay coating may be omitted.
In another embodiment, the diffractive grating may be optimized to provide a variable grating period and/or utilize other strategies so as to improve the directionality. Such optimization may be practiced as a part of the process in step S904.
The present invention has so far been described using practical embodiments; however, the present invention is not limited to the discussed and depicted embodiments in the drawings. A person of skill in the art will recognize that there may be other embodiments, additions, alternatives, and modifications to the described embodiments within the scope of the present invention.
Number | Date | Country | Kind |
---|---|---|---|
2014-131007 | Jun 2014 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
6331382 | Robertsson | Dec 2001 | B1 |
7162124 | Gunn, III et al. | Jan 2007 | B1 |
8625942 | Na et al. | Jan 2014 | B2 |
8644656 | Yanagisawa | Feb 2014 | B2 |
9201200 | Bowen | Dec 2015 | B2 |
20060140569 | McDonald | Jun 2006 | A1 |
20090003762 | Chiniwalla et al. | Jan 2009 | A1 |
20090220195 | Van Der Keur | Sep 2009 | A1 |
20090290837 | Chen et al. | Nov 2009 | A1 |
20100322555 | Vermeulen | Dec 2010 | A1 |
20110182548 | Kopp et al. | Jul 2011 | A1 |
20110188808 | Hofrichter et al. | Aug 2011 | A1 |
20130182998 | Andry et al. | Jul 2013 | A1 |
20130209026 | Doany et al. | Aug 2013 | A1 |
20140029888 | La Porta | Jan 2014 | A1 |
20140029894 | Bowen | Jan 2014 | A1 |
20150286008 | Shimizu et al. | Oct 2015 | A1 |
Number | Date | Country |
---|---|---|
S59-121008 | Jul 1984 | JP |
2000121854 | Apr 2000 | JP |
2002506227 | Feb 2002 | JP |
2004177730 | Jun 2004 | JP |
2013250436 | Dec 2013 | JP |
2014048493 | Mar 2014 | JP |
2015522854 | Aug 2015 | JP |
2014034458 | Mar 2014 | WO |
Entry |
---|
Roelkens et al., “High efficiency Silicon-on-Insulator grating coupler based on a poly-Silicon overlay”, Nov. 27, 2006 / vol. 14, No. 24 / Optics Express, pp. 11622-11630. |
Roelkens et al., “Interfacing optical fibers and high refractive index contrast waveguide circuits using diffractive grating couplers”, Proc. of SPIE vol. 7218, 721808—© 2009 SPIE—CCC code: 0277-786X/09, 10 pages, doi: 10.1117/12.808909. |
Shu et al., “Efficient coupler between chip-level and board-level optical waveguides”, Optics Letters / vol. 36, No. 18 / Sep. 15, 2011, pp. 3614-3616. |
Soganci et al., “Flip-chip optical couplers with scalable I/O count for silicon photonics'”, Jul. 1, 2013, vol. 21, No. 13, DOI:10.1364/OE.21.016075, Optics Express, pp. 16075-16085. |
Soganci et al., “Multichannel Optical Coupling to a Silicon Photonics Chip Using a Single-Step Bonding Process”, 2013 IEEE Photonics Conference (IPC), Sep. 8-12, 2013, Bellevue, WA, pp. 115-116, 978-1-4577-1506-8, DOI:10.1109/IPCon.2013.6656398. |
Japan Patent Application No. 2014-131007, entitled “Light Coupling Structure, Semiconductor Device, Optical Interconnect Structure for Multi-Chip Module and Production Method for Light Coupling Structure”, filed Jun. 26, 2014. |
“Super High Accuracy Flip Chip Bonder (for optical devices) OF2000”, Toray Engineering, url provided by inventors in post disclosure comments dated Feb. 24, 2014, <http://www.toray-eng.com/semicon/bonder/flip-lineup/of2000.html>, 4 pages. |
Number | Date | Country | |
---|---|---|---|
20150378095 A1 | Dec 2015 | US |