The present invention relates to a power conversion device.
A power conversion device in which an IGBT (Insulated Gate Bipolar Transistor or insulated gate semiconductor device: hereinafter, appropriately referred to as “IGBT” or “Si-IGBT”) using Si (silicon) for a semiconductor substrate and a Schottky barrier diode (hereinafter, appropriately referred to as “SiC-SBD”) using SiC (silicon carbide) for a semiconductor substrate are combined is described in PTL 1.
In PTL 1, technology of a converter circuit is disclosed as “[Problem] To provide a converter circuit of a type for improving weakness related to a known converter circuit. [Solution] The converter circuit includes at least one switching device (5 and 6) and a diode arranged to become conductive when the device is turned off and to become biased in a reverse direction when the device is turned on. This diode consists of silicon carbide (refer to Abstract)”.
PTL 1: JP 2006-149195 A
However, the technology disclosed in PTL 1 has the following problem.
In the converter circuit (power conversion device) according to the technology disclosed in PTL 1, there is a problem in that a voltage/current of each of the Si-IGBT and the SiC-SBD oscillates (transient oscillation) when the Si-IGBT is turned on.
The present invention has been devised in view of the above problem and an object thereof is to provide a power conversion device that can suppress voltage/current oscillations (transient oscillations) while using an SiC-SBD having characteristics of a high withstand voltage and a low recovery loss.
To solve the above problem and achieve the object of the present invention, the following configuration is taken.
That is, a power conversion device according to the present invention is a power conversion device including a switching element and a rectifier element connected in series with the switching element. The power conversion device has a configuration in which an external electric load is connected to a connection point of the switching element and the rectifier element, the switching element is composed of an insulated gate semiconductor element having a first gate terminal and a second gate terminal, the rectifier element is composed of a diode having a Schottky junction using silicon carbide as a semiconductor substrate, and different drive signals are applied to the first gate terminal and the second gate terminal, respectively.
In addition, other mechanisms will be described in embodiments of the present invention.
According to the present invention, it is possible to provide a power conversion device that can suppress voltage/current oscillations while using an SiC-SBD in a rectifier element having characteristics of a high withstand voltage and a low recovery loss.
Hereinafter, embodiments of the present invention will be described appropriately with reference to the drawings.
«First Embodiment: First Part»
A power conversion device according to a first embodiment of the present invention will be described with reference to
In
In addition, the power conversion device 100 has a configuration in which power is supplied from a voltage source 104 and the switching element 101 repeats turning-on and turning-off at a high speed to control power supplied to an electric load (inductive load) 103 connected in parallel with the rectifier element 102.
The electric load (inductive load) 103 is, for example, a motor to be an inductive load.
Before describing a detailed configuration and an operation and an effect of the power conversion device 100 shown in
Thereafter, returning to
<Comparative Example>
As described above, for the purpose of assisting the understanding of the object and the effect of the present invention, the reason why voltage/current oscillations occur is described by describing a configuration and an operation of a power conversion device according to the comparative example.
In
In the power conversion device 200, the switching element 201 repeats turning-on and turning-off at a high speed to control power supplied to an inductive load 203 connected in parallel with the rectifier element 202.
In the power conversion device 200 of
The SiC-SBD of the rectifier element 202 has a higher withstand voltage than an Si-pn diode using Si as a semiconductor substrate by using SiC as the semiconductor substrate and can realize an element having the same withstand voltage with a thickness of about 1/10. As a result, a conduction loss of the rectifier element 202 can be reduced.
Therefore, by using the SiC-SBD, the power conversion device 200 can suppress a recovery current generated in the rectifier element 202 when the switching element 201 is turned on, as compared with the case where the Si-pn diode is used as the semiconductor substrate in the rectifier element 202. As a result, a recovery loss of the rectifier element 202 and a turn-on loss of the switching element 201 can be reduced.
In the power conversion device of
A gate terminal of the switching element 201 is connected to a drive signal source 205. A potential Vg of the gate terminal based on the potential of an emitter terminal of the switching element 201 changes due to a voltage generated by the drive signal source 205.
When the potential (voltage) Vg is smaller than a threshold voltage Vth to be a voltage value peculiar to the switching element 201, the switching element 201 is turned off and a resistance value between a collector terminal and the emitter terminal thereof is large.
On the other hand, when the potential Vg is larger than the threshold voltage Vth, the switching element 201 is in an on state, and the resistance value between the collector terminal and the emitter terminal thereof is small.
«Voltage/Current Waveforms of Each Unit of Power Conversion Device According to Comparative Example»
In addition, in
At time t0, as shown in
Therefore, the current Is flowing through the switching element 201 is approximately zero as shown in
In addition, because a current I0 flowing through the inductive load 203 at the time t0 is returned through the rectifier element 202, the current Id flowing through the rectifier element 202 is approximately equal to I0 as shown in
At time t1, as shown in
According to this, although there is a slight time difference, the switching element 201 transits from an off state to an on state (that is, it is turned on) and the resistance between the collector terminal and the emitter terminal changes from a high resistance to a low resistance.
As a result, as shown in
As shown in
Due to waveform oscillations of Is, Vd, and Id, for example, a voltage exceeding the withstand voltage of the element may be generated to destroy the element.
In addition, the waveform oscillations may cause inductive disturbance to interfere with a normal operation of the power conversion device 200 of
«Factors of Waveform Oscillations»
Next, factors causing the waveform oscillations described above will be described with reference to
In
In addition, in
In addition, in
In addition, in
Although the actual parasitic inductance exists in the entire circuit in a distributed manner, in
As shown in
As described above, the resistance value of the variable resistor 403 changes from a high resistance to a low resistance according to turning-on of the switching element 201.
At this time, if a change speed is fast, oscillation energy transiently accumulated in the parasitic inductance 401 and the junction capacitance 402 cannot be immediately consumed by the variable resistor 403 and the voltage and the current oscillate (transient oscillations).
That is, the oscillation energy is gradually consumed by the variable resistor 403 while being repeatedly exchanged between the parasitic inductance 401 and the junction capacitance 402.
On the other hand, when the change speed is slow, the oscillation energy transiently accumulated in the parasitic inductance 401 and the junction capacitance 402 is successively consumed by the variable resistor 403 and the oscillation does not occur.
From the above, it is effective to delay the change speed of the resistance value of the switching element 201 to prevent the waveform oscillations when the switching element 201 is turned on.
When the switching element 201 (
The switching element 201 is an Si-IGBT and is an active semiconductor element including an insulated gate terminal of a MOS structure in a part thereof.
As such, because the IGBT has the MOS structure, the current change rate dI/dt of the switching element 201 is represented by a product of a transconductance gm of the switching element 201 and a time change rate dVg/dt of the gate voltage (potential) Vg.
From this, it can be seen that the transconductance gm of the switching element 201 may be reduced to reduce dI/dt.
From the above description, it is concluded that it is effective to reduce the transconductance gm of the switching element 201 to prevent the waveform oscillations when the switching element 201 is turned on, in the power conversion device 200 shown in
In view of this conclusion, the present invention specifically provides a structure and a drive method of a switching element capable of reducing the transconductance gm and provides a power conversion device that prevents waveform oscillations while using an SiC-SBD in a rectifier element, as characteristics thereof.
«First Embodiment: Second Part»
The description returns to the description of the first embodiment of the present invention. The power conversion device according to the first embodiment will be described in detail with reference to
«Circuit Configuration of Power Conversion Device»
As described above,
In
The switching element 101 and the rectifier element 102 are connected in series with each other and both ends thereof are connected to the voltage source 104. In addition, a connection point of the switching element 101 and the rectifier element 102 is connected to the electric load (inductive load) 103.
In addition, the power conversion device 100 has a configuration in which power is supplied from the voltage source 104 and the switching element 101 repeats turning-on and turning-off at a high speed to control power supplied to the electric load (inductive load) 103.
Although the “electric load (inductive load) 103” is expressed, an example suitable as the electric load 103 externally connected to the power conversion device according to the present invention is an inductive load such as a motor. However, the present invention is not limited to a configuration in which the inductive load is connected as the electric load 103 and a configuration in which other electric load (for example, a resistive load including an inductive component regardless of the magnitude thereof) including the inductive component is connected is also included in a range of the present invention.
In addition, the switching element 101 of
A potential Vg1 of the first gate terminal based on the potential of the emitter terminal of the switching element 101 and a potential Vg2 of the second gate terminal based on the potential of the emitter terminal of the switching element 101 are changed by the voltages generated by the drive signal sources 107 and 108, respectively.
When the potential Vg1 of the first gate terminal is smaller than a first threshold voltage Vth1 to be a voltage value peculiar to the switching element 101 and the potential Vg2 of the second gate terminal is smaller than a second threshold voltage Vth2 to be a voltage value peculiar to the switching element 101, the switching element 101 enters an off state (t0 to t1 in
In addition, when the potential Vg1 of the first gate terminal is larger than Vth1 and the potential Vg2 of the second gate terminal is smaller than Vth2, the switching element 101 enters a first on state (t1 to t2 in
In addition, when the potential Vg1 of the first gate terminal is larger than Vth1 and the potential Vg2 of the second gate terminal is larger than Vth2, the switching element 101 enters a second on state (at and after t2 in
<Cross-sectional Structure of IGBT having Two Gate Terminals>
In
A plurality of trenches 503 having a groove structure penetrating the channel layer 502 from a surface of the channel layer 502 not contacting the drift layer 501 and reaching the drift layer 501 are formed.
As shown in
In the trench 503, gate electrodes (insulated gate electrodes) 506 and 507 configured to include a conductor 504 formed in the trench 503 and an insulating film 505 formed around the conductor 504 are formed.
On the surface of the p-type channel layer 502 not contacting the drift layer 501, an n-type source region 513 (third semiconductor layer) is formed in an island shape to be adjacent to the insulating film 505.
On the surface of the p-type channel layer 502 not contacting the drift layer 501 and the surface of the n-type source region 513, an emitter electrode 511 is formed of a conductor.
A collector electrode 512 is formed on the surface of the p-type collector layer 510 not contacting the drift layer 501.
In addition, in
The first gate terminal 105 and the second gate terminal 106 are connected to the plurality of gate electrodes 506 and 507, respectively. That is, the first gate electrode 506 is connected to the first gate terminal 105 and the second gate electrode 507 is connected to the second gate terminal 106.
Connection of the first gate terminal 105 and the first gate electrode 506 and connection of the second gate terminal 106 and the second gate electrode 507 are schematically shown in
A practical structure of the connection of the first gate terminal 105 and the first gate electrode 506 and the connection of the second gate terminal 106 and the second gate electrode 507 will be described again in
To electrically separate the conductor for connecting the first gate terminal 105 and the first gate electrode 506 and connecting the second gate terminal 106 and the second gate electrode 507 and the emitter electrode 511, the insulating film 505 is formed to a height (the upper side of the plane of paper) at which the emitter electrode 511 is shown in
An example of a plan view when the side (lower side of the plane of paper) of the drift layer 501 is viewed from a cross-section taken along I-I in
«Voltage/Current Waveforms of Each Unit of Power Conversion Device According to First Embodiment»
In addition, in
At time t0, as shown in
That is, the switching element 101 (
In addition, because a current I0 flowing through the inductive load 103 at the time t0 is returned through the rectifier element 102, as shown in
At time t1, as shown in
As a result, as shown in
At time t2, as shown in
In addition, as shown in
In addition, as shown in
«Reason why Waveform Oscillations do not Occur in Power Conversion Device According to First Embodiment»
As described above, in the process shown in
In the power conversion device according to the first embodiment of the present invention, the reason why the waveform oscillations do not occur is described as follows.
As shown in
Therefore, when the switching element 101 is in the first on state, an inversion layer is formed only in a region included in the p-type channel layer 502 and located in the vicinity of the first gate electrode 506, whereas the inversion layer is not formed in a region included in the p-type channel layer 502 and located in the vicinity of the second gate electrode 507.
For example, when a ratio of the number of first gate electrodes 506 to the number of second gate electrodes 507 is 1:1, an area through which a current of the inversion layer formed when the switching element 101 is in the first on state flows is half an area through which the current of the inversion layer formed when the switching element 101 is in the second on state flows.
When the switching element 101 is in the first on state, electrons are injected into the n-type drift layer 501 from the n-type source region 513 (
Then, in response to the electrons, holes are injected into the n-type drift layer 501 from the p-type collector layer 510.
In this way, the electrons and the holes injected into the n-type drift layer 501 function as carriers, and the switching element 101 becomes conductive.
However, as described above, the area of the inversion layer formed when the switching element 101 is in the first on state is smaller than the area of the inversion layer formed when the switching element 101 is in the second on state. As a result, the current flowing when the switching element 101 is in the first on state becomes smaller than the current flowing when the switching element 101 is in the second on state.
That is, the transconductance gm1 when the switching element 101 transits from the off state to the first on state is smaller than the transconductance gm2 when the switching element 101 transits from the off state to the second on state.
Therefore, with the power conversion device according to the first embodiment of the present invention, it is possible to suppress the voltage/current oscillations while using the SiC-SBD in the rectifier element 102.
Because the transient changes in the voltage/current of the switching element 101 and the rectifier element 102 have already ended at time t2, the waveform oscillations do not occur even if the switching element 101 is transited from the first on state to the second on state at this point of time.
On the other hand, in the second on state, the amount of carriers injected into the n-type drift layer 501 is larger than that in the first on state and as a result, an on voltage of the switching element 101 is small.
Therefore, from the viewpoint of reducing a conduction loss of the switching element 101, if the transient changes of the voltage/current end after the switching element 101 is transited from the off state to the first on state at the time t1, it is desirable to promptly transit the state to the second on state.
<Effect of First Embodiment>
From the above, the power conversion device 100 according to the first embodiment becomes a power conversion device that can suppress the voltage/current oscillations (transient oscillations) while using the SiC-SBD in the rectifier element 102 having characteristics of a high withstand voltage and a low recovery loss.
That is, the power conversion device 100 becomes a power conversion device that has characteristics of a high withstand voltage and a low recovery loss.
«Second Embodiment»
A power conversion device according to a second embodiment of the present invention will be described with reference to
In
An interval (tS1) of two trenches belonging to the same set with the n-type source region 513 therebetween is smaller than an interval (tS2) of two trenches belonging to the sets of trenches adjacent to each other and not belonging to the same set.
In the two trenches belonging to the same set, a first gate electrode 506 is formed on one side and a second gate electrode 507 is formed on the other side. In addition, as described above, the n-type source region 513 is formed between the two trenches belonging to the same set.
A surface of a p-type channel layer 502 between the two trenches belonging to the sets of trenches adjacent to each other and adjacent to each other is covered by an insulating film 505.
An example of a plan view when the side (lower side of a plane of paper) of a drift layer 501 is viewed from a cross-section taken along II-II in
A structure of the switching element according to the second embodiment shown in
The reason is that a contact area between the p-type channel layer 502 and an emitter electrode 511 in
That is, holes injected into the n-type drift layer 501 from the p-type collector layer 510 at the time of conduction are discharged to the emitter electrode 511 via the p-type channel layer 502. At this time, in the structure shown in
«Third Embodiment»
A power conversion device according to a third embodiment of the present invention will be described with reference to
The structure shown in
In the structure of
In addition, in
As described above, one first gate electrode 506 and one second gate electrode 507 are formed to contact different sidewalls of the trench 503 with respect to one wide trench 503.
In addition, a bottom portion of the trench between the first gate electrode 506 and the second gate electrode 507 is covered by an insulating film 505.
Even in this (third) embodiment, as described above, there is a relation of (tSB<tWB) and similarly to the second embodiment, an contact area between the p-type channel layer 502 and an emitter electrode 511 is small. Therefore, it is possible to obtain an effect of reducing an on voltage.
Furthermore, in this (third) embodiment, an area in which the conductors 504 included in the gate electrodes 506 and 507 face a semiconductor layer including an n-type drift layer 501, the p-type channel layer 502, and the n-type source region 513 is small. As a result, it is possible to obtain an effect of reducing feedback capacitances of the gate terminals (105 and 106) with respect to the channel layer 502 and the source region 513.
«Fourth Embodiment»
A power conversion device according to a fourth embodiment of the present invention will be described with reference to
More specifically,
In
In
In the extension direction of the trench 503, a ratio of a length of the n-type source region 513 to a length of a repetition unit of the p-type channel layer 502 including the n-type source region 513 is defined as an intermittent ratio.
However, in
A length of the depth direction of the n-type source region 513 (third semiconductor layer) adjacent to the first gate electrode 506 (first gate terminal 105) is a1. In addition, a length of the repetition unit of the depth direction of the p-type channel layer 502 (second semiconductor layer) including the n-type source region 513 (third semiconductor layer) is b1. At this time, an intermittent ratio of the n-type source region 513 adjacent to the first gate electrode 506 (first gate terminal 105) is (a1/b1).
In addition, a length of the depth direction of the n-type source region 513 (third semiconductor layer) adjacent to the second gate electrode 507 (second gate terminal 106) is a2. In addition, a length of the repetition unit of the depth direction of the p-type channel layer 502 (second semiconductor layer) including the n-type source region 513 (third semiconductor layer) is b2. At this time, an intermittent ratio of the n-type source region 513 adjacent to the second gate electrode 507 (second gate terminal 106) is (a2/b2).
In
By the structure of
That is, in the switching element 101 according to this (fourth) embodiment, because the intermittent ratio of the n-type source region 513 adjacent to the first gate electrode 506 is small, an injection amount of electrons when the switching element 101 enters a first on state further decreases (as compared with the case of a1/b1=a2/b2).
As a result, a transconductance gm when the switching element 101 transits from an off state to the first on state becomes smaller and oscillations (transient oscillations) are difficult to occur.
«Fifth Embodiment»
A power conversion device according to a fifth embodiment of the present invention will be described with reference to
More specifically,
In
Even in
In addition, a length of the depth direction of the n-type source region 513 adjacent to a second gate electrode 507 (second gate terminal 106) is a2. In addition, a length of the repetition unit of the p-type channel layer 502 including the n-type source region 513 is b2. At this time, an intermittent ratio of the n-type source region 513 adjacent to the second gate electrode 507 (second gate terminal 106) is (a2/b2).
In
«Sixth Embodiment»
A power conversion device according to a sixth embodiment of the present invention will be described with reference to
More specifically,
In
In
Even in
In addition, a length of the depth direction of the n-type source region 513 adjacent to a second gate electrode 507 (second gate terminal 106) is a2. In addition, a length of a repetition unit of the depth direction of a p-type channel layer 502 including the n-type source region 513 is b2. At this time, an intermittent ratio of the n-type source region 513 adjacent to the second gate electrode 507 (second gate terminal 106) is (a2/b2).
In
«Seventh Embodiment»
A power conversion device according to a seventh embodiment of the present invention will be described with reference to
The seventh embodiment shown in
That is, the n-type source region 513 adjacent to the second gate electrode 507 is continuously arranged in an extension direction of a trench 503.
Even when the intermittent ratio of the n-type source region 513 adjacent to the second gate electrode 507 is equal to 1, while maintaining a voltage/current oscillation suppression effect to be a characteristic of this (seventh) embodiment, an injection amount of electrons when the switching element 101 enters a second on state can be increased and a conduction loss can be reduced.
Duplicate description of the description of the fourth to sixth embodiments is omitted.
«Eighth Embodiment»
A power conversion device according to an eighth embodiment of the present invention will be described with reference to
The eighth embodiment shown in
A plan view when the side (lower side of a plane of paper) of a drift layer 501 is viewed from a cross-section taken along IV-IV in
Next, a different point and a different effect between the eighth embodiment and the third embodiment will be described.
In
In this structure, conductors 504 of the two gate electrodes in one trench 503 are originally formed as one conductor and are then divided by etching. Therefore, as shown in
In addition, as shown in
«Ninth Embodiment»
A power conversion device according to a ninth embodiment of the present invention will be described with reference to
A power conversion device 300 according to the ninth embodiment shown in
In
The power conversion devices 100U1 and 100U2, the power conversion devices 100V1 and 100V2, and the power conversion devices 100W1 and 100W2, which are connected in series, are connected to a DC voltage source 151.
In the power conversion devices 100U1 and 100U2, to output a U phase of a three-phase AC from a connection point thereof, the power conversion device 100U1 is controlled by drive signal sources U11 and U12 and the power conversion device 100U2 is controlled by drive signal sources U21 and U22.
The reason why the power conversion device 100U1 is controlled by two signals of the drive signal sources U11 and U12 is the same as the reason described in the first embodiment of
In the power conversion devices 100V1 and 100V2, to output a V phase of the three-phase AC from a connection point thereof, the power conversion device 100V1 is controlled by drive signal sources V11 and V12 and the power conversion device 100V2 is controlled by drive signal sources V21 and V22.
In the power conversion devices 100W1 and 100W2, to output a W phase of the three-phase AC from a connection point thereof, the power conversion device 100W1 is controlled by drive signal sources W11 and W12 and the power conversion device 100W2 is controlled by drive signal sources W21 and W22.
With the above configuration, the power conversion device 300 functions as an inverter to convert a DC voltage (power) of the voltage source 151 into a three-phase AC voltage (power) of the U phase, the V phase, and the W phase and drives the three-phase AC motor 152.
Because the power conversion devices 100U1, 100U2, 100V1, 100V2, 100W1, and 100W2 are power conversion devices that can suppress voltage/current oscillations while using an SiC-SBD in a rectifier element having characteristics of a high withstand voltage and a low recovery loss, the power conversion device 300 configured using these power conversion devices becomes an inverter that has a high withstand voltage and a small power loss.
<Structure Example of SiC-SBD>
A structure of the SiC-SBD used in the rectifier element in the embodiments of the present invention is various and one example thereof is as follows.
In
A p-type semiconductor layer 604 is selectively formed on a surface of the low-concentration n-type semiconductor layer 602.
A cathode electrode 605 having an ohmic junction is formed on a second surface of the high-concentration n-type semiconductor layer 601 and an anode electrode 603 having a Schottky junction is formed on the surfaces of the low-concentration n-type semiconductor layer 602 and the p-type semiconductor layer 604.
SiC is used for a semiconductor substrate on which the high-concentration n-type semiconductor layer 601, the low-concentration n-type semiconductor layer 602, and the p-type semiconductor layer 604 are formed.
«Other Embodiments»
Although the present invention have been described specifically on the basis of the embodiments, the present invention is not limited to the embodiments and various changes can be made without departing from the scope thereof. The configurations of other embodiments can be added to the configurations of the certain embodiment. In addition, for a part of the configurations of the individual embodiments, addition/removal/replacement of other configurations can be performed.
Other embodiments and modifications will be further described below.
«Structure of Switching Element»
Although the trench structure has been described as the structure of the switching element 101 in
«Conductive Type of Semiconductor Substrate of Switching Element»
Although the drift layer 501 formed from the semiconductor substrate has been described as the n-type semiconductor layer in the structure of the switching element 101 in
«Type of IGBT of Switching Element»
Although the insulated gate semiconductor element (IGBT) has been described as the structure of the switching element 101 according to the first embodiment of the present invention, the semiconductor substrate represented by the drift layer 501 may be formed of Si or may be formed of SiC.
«Number of Gate Terminals of Switching Element»
Although the number of gate terminals of the switching element has been described as two in
«Circuit Configuration of Power Conversion Device»
Although an example of the inverter to convert a DC voltage (power) into a three-phase AC voltage (power), shown in
For example, the power conversion device of
In addition, the power conversion device of
Number | Date | Country | Kind |
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2015-206056 | Oct 2015 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2016/080650 | 10/17/2016 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
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WO2017/069073 | 4/27/2017 | WO | A |
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