Patent Grant
10564374
The present disclosure relates generally to coupling an optical fiber to a substrate, and more particularly to coupling the optical components to an optoelectronic integrated circuit (IC).
Communications systems and datacenters are required to handle massive amount of data at ever increasing speeds and ever decreasing costs. To meet these demands, optical fibers and optical ICs (such as, a photonic integrated circuit (PIC) or an integrated optical circuit) are used together with high speed electronic ICs. A PIC is a device that integrates multiple photonic functions (similar to an electronic IC or radio frequency (RF) IC). PICs are typically fabricated using indium phosphide or silicon oxide (SiO2), which allows for the integration of various optically active and passive functions on the same circuit.
The coupling of PICs to optical fibers is not as well advanced as the integration and/or coupling of electronic ICs. Specifically, the challenges facing optical connections are different and much more complex than connecting electronic ICs to, for example, a printed circuit board (PCB). Some difficulties are inherent in wavelength, signal losses, assembly tolerance, and polarization characteristics of optical packaging.
Existing solutions utilize various techniques for connecting optical fibers to PICs. One technique suggests using various types of butt connections to the edge and surface fiber connections a PIC. The butt of a fiber can be connected to a planar waveguide at the edge of a PIC. This technique is efficient only if the cross section of the propagating mode of the fiber and the waveguide areas of the fiber core and the waveguide are of similar size. In most cases, this technique suffers from poor assembly tolerance.
Another technique suggests laying a section of fiber on top of the surface of the PIC where the end of the fiber has been cut at an angle to form an angled tip. The angled tip has a flat surface which reflects a light beam down to a waveguide grating coupler disposed on the integrated circuit. The light beam is reflected off the reflective surface of the angled tip by total internal reflection. The waveguide grating coupler is designed to accept the slightly diverging light beam from the reflective surface of the angled tip of the fiber. The light beam can also propagate through the fiber to a chip coupler in the opposite direction, up from the substrate, through the waveguide grating and into an optical fiber after bouncing off the reflective surface of the angled tip. This technique further requires coating the exterior of the reflective surface with an Epoxy.
Among others, all of the above-noted techniques require precise alignment, and thus active positioning of the optical fiber to the PIC. As such, current techniques suffer from poor and very tight alignment tolerance to gain an efficient connectivity. For example, a misalignment between an optical fiber and a PIC of 1-2 microns (μm) would result in a signal loss of about −3 db. Furthermore, the alignment is now performed with expensive equipment or labor-intensive assembly solutions. As a result, mass production of PICs and/or optical couplers is not feasible.
The lack of a reliable and efficient solution for optical coupling of PICs also limits the ability of mass production for an electrical-optical interconnection platform that allows multiple-chip connections via electrical and optical connections.
As an example, one typical arrangement of electrical-optical interconnection platform is based on a silicon photonic interposer. Such an interposer may be utilized in a hybrid integration of photonics and electronics by face-to-face bonding (flip-chip assembly). In such arrangement the I/O fibers are connected to waveguides pre-designed in the silicon interposer. The silicon photonic interposer includes vias created through the silicon to provide the electrical path to/from the PCB substrate and the optoelectronic devices inside the silicon photonics die. The optical transmission is inside the silicon photonics die.
Another arrangement discussed in the related art, is a multi-substrate electro-optical structure. The structure includes a substrate mounted over a supporting PCB. The substrate interconnections between optical chips, mounted on the silicon photonic interposer, and IC chips.
The typical arrangements discussed above are based on a silicon photonic interposer. Such an interposer typically includes active and passive optical devices (e.g., photo-detectors, modulators, splitters, etc.). An “active” interposer is an expensive component manufactured using a complex process. Further, the optical source (e.g., laser light) is coupled to the silicon photonic interposer via an optical fiber and grating coupler, or via an edge-coupling or any other equivalent optical coupling. As noted above, such coupling techniques require precise alignment and active positioning of the optical source to the PIC or the interposer.
Another solution for electrical-optical interconnection platform includes assembling of discrete electrical and optical device on a silicon photonics substrate. The electrical connection is achieved using electrical pins formed using through glass vias (TGV) while optical connections are formed using optical pins. The optical pins are structured using optical grating couplers. As noted above, such couplers do not demonstrate good tolerance for misalignment. As a result, a mass production of PICs and/or optical couplers of the various electrical-optical interconnection platform solutions discussed in the related art may not be feasible.
It would therefore be advantageous to provide an efficient electrical-optical interconnection platform that would overcome the deficiencies of the existing solutions.
A summary of several example embodiments of the disclosure follows. This summary is provided for the convenience of the reader to provide a basic understanding of such embodiments and does not wholly define the breadth of the disclosure. This summary is not an extensive overview of all contemplated embodiments, and is intended to neither identify key or critical elements of all embodiments nor to delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later. For convenience, the term “some embodiments” may be used herein to refer to a single embodiment or multiple embodiments of the disclosure.
Some embodiments disclosed herein include an electro-optical interconnection platform comprises an interface medium; a plurality of optical pads; a plurality of electrical pads; and at least one beam coupler adapted to optically couple at least one pair of optical pads of the plurality of optical pads, wherein the at least one pair of optical pads are placed on opposite sides of the interface medium.
The subject matter disclosed herein is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the disclosed embodiments will be apparent from the following detailed description taken in conjunction with the accompanying drawings.
It is important to note that the embodiments disclosed herein are only examples of the many advantageous uses of the innovative teachings herein. In general, statements made in the specification of the present application do not necessarily limit any of the various claimed embodiments. Moreover, some statements may apply to some inventive features but not to others. In general, unless otherwise indicated, singular elements may be in plural and vice versa with no loss of generality. In the drawings, like numerals refer to like parts through several views.
By way of example to the various disclosed embodiments, a platform for electro-optical interconnection is provided. The arrangement of the disclosed platform allows efficient interconnection of, for example, different electronic integrated circuits (ICs) (e.g., electrical chips), photonic integrated circuits (PICs) (e.g., photonic chips), and other optical elements (e.g., fibers and lasers), while ensuring low signal losses and thermal stability.
To this end, the platform includes a passive interposer and a set of optical pads. That is, the interposer does not include any active components or devices, but merely serves as an interface media. The optical pads allow optical connectivity through an optical coupler (or a photonic plug). The optical coupler is designed to provide high tolerance alignment through passive positioning or assembling. Therefore, the disclosed electro-optical interconnection platform allows components assembling with standard packaging machinery, and therefore can enable high volume packaging. In an embodiment, a complete system that utilizes the disclosed platform can be fabricated using a wafer fabrication process, for example, a CMOS fabrication process. Thus, the disclosed embodiments can solve a long unmet need for using wafer fabrication processes in the manufacturing of silicon photonics based systems.
In an embodiment, each o-pad 110 is constructed as an optical element, such as curved (collimated) mirror, a titled flat mirror, or combination thereof. In an embodiment, the positioning and formation of the o-pads (curved mirror) is performed on the interface medium (not shown) using a photolithography process such as, but not limited to (e.g., grayscale lithography), a nanoimprint lithography process, and the like. In certain configurations, an o-pad 110 may also be constructed to include a tilted flat mirror and fiber trench (not shown in
A beam coupler 170 can be formed between two opposite o-pads 110. In an embodiment, the beam coupler 170 allows the optical coupling between an optical source and drain connected the respective o-pads 110. The structure of the o-pads 110 and the optical coupling formed by the platform 100 is disclosed in great detail below.
In an embodiment, the light beams travel through an interface medium (not shown). Such a medium is made of transparent and non-conductive material, such as glass, polydimethylsiloxane, or any other index matching materials. The dimensions of the interface medium determine, in part, the efficiency of the light beam (optical signal) that propagates through the interface medium. In one embodiment, the interface medium is realized as a passive interposer.
It should be noted the geometric of the vias 160 and/or beam couplers 170 shown in
It should be further noted the o-pads 110 and the e-pads 120 can be positioned at any location on the platform 100. However, to form a beam coupler between two o-pads 110, such o-pads should be opposite to each other when placed on the platform 100.
The e-pads 120 allow electrical connectivity to an electrical component 140. An electrical component 140 may include, for example, a driver, a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), an application-specific standard products (ASSP), a system-on-a-chip system (SOC), a general-purpose microprocessor, a microcontroller, a GPU, a digital signal processors (DSP), and the like, or any other analog or digital circuit. Furthermore, one or more of the e-pads 120 may provide connectivity with a PCB.
To o-pads 110 are connected or otherwise mounted optical components 150. An optical component 150 may include, for example, a PIC, a light source (e.g., laser), an optical fiber, a photo-detector, an optical splitter, an optical combiner, an optical tap, or any other passive or active optical component. In an embodiment, a PIC is mounted on the platform 100 and connected to an o-pad 110 using a flip-chip mounting technique. This would provide the mounted PIC electrical and optical connectivity required for its operation.
Thus, the platform 100 is designed to enable standard die stacking processes (e.g., pick-and-place assembly) of the electrical and optical components through connections to e-pads using a flip-chip mounting technique. As a result, an electro-optical system assembled on the disclosed platform can be manufactured, tested, and packaged using wafer level processes. Further, the disclosed platform can be utilized to provide chip-chip connectivity. For example, connections between two PICs or two ICs can be formed through the disclosed interconnection platform 100.
The design of the electro-optical interconnection platform 100 may be achieved by distribution of o-pads 110 and e-pads 120 throughout the platform 100. The characteristics of the o-pads 110 and e-pads 120 may be selected from design libraries included in a CAD design tool.
In certain configurations, the interface medium 200 may be adhered to a transparent glue layer (e.g., Epoxy). Such a layer may be placed between the interface medium 220 and the mirrors 210-1 and 210-2.
As noted above, the o-pads 210-1 and 210-2 are formed on the interface medium 220 using a photolithography, grayscale lithography, nanoimprint lithography process, and the like. Specifically, in an embodiment, the o-pads 210-1 and 210-2 are formed as curved, collimated mirrors. The o-pads (curved mirrors 210-1 and 210-2 are placed and created during fabrication, which ensures high accuracy positioning and accurate reflective mirrors. As a non-limiting example, the fabrication process utilized to create the mirrors may include a Silicon-On-Insulator (SOI), complementary metal-oxide semiconductor (CMOS), and the like.
In an embodiment, the o-pads 210-1 and 210-2 are fabricated using the same or a substantially similar grayscale lithography process. In another embodiment, the o-pads 210-1 and 220-2 may be fabricated using a plastic molding technique. Such fabrication techniques ensure high accuracy of the mirrors and their assembly to form a beam coupler.
Furthermore, by fabricating and placing the first and second curved mirrors 210-1 and 210-2 on the interface medium 220, thereby allowing relaxed alignment tolerances in 3-dimenstions. For example, if the o-pad 210-2 provides a connection to a light drain (e.g., PIC, not shown) and the o-pad 220-1 is connected to a light source (not shown), even if the o-pad 220-2 is not perfectly aligned with the o-pad 220-1, the optical signal is not significantly attenuated. It should be noted that in certain embodiments, the o-pads 210-1 and/or 210-2 can be also fabricated as a part of the interface medium 220.
The disclosed arrangement of the beam coupler 200 achieves high signal efficiency with a relaxed alignment between a light beam and/or drain due to the specific locations and shape of the curved mirrors (forming the o-pads) placed against each other. The locations of the o-pads 210-1 and 210-2 are determined at least with respect to the source/drain light beam. This allows the light beam to be reflected from the o-pads 210-1 and 220-2. Specifically, the curved mirrors of the o-pads 210-1 and 210-2 are shaped in such a way that all light beams from the source are reflected and collimated at a certain angle at a center of one o-pad and focused to a drain after reflecting from the second o-pad.
For example, as illustrated in
It should be noted that a typical application of the electro-optical interconnection platform 100 would include a plurality of beam couplers formed through a plurality of o-pads.
In certain embodiments, an o-pad can be constructed to further allow connectivity to an optical fiber (including, but not limited to, a single mode fiber). Such an o-pad may be integrated in an o-pad shaped as a curved mirror (e.g., o-pad 210-2) or serve as a stand-alone connection.
In the beam coupler 300, the tilted flat mirror of the o-pad 310 is utilized to direct a light beam from the optical fiber 320 to the o-pad 340 (having a curved mirror).
The tilted flat mirror of the o-pad 310 is fabricated in the interface medium 330 and can be formed by means of anisotropic grayscale etching and tilted at a predefined angle. The angle is determined based on the optical path between the optical fiber 320 and the titled mirror.
In an embodiment, the o-pad 310, its tilted flat mirror 311 and the fiber trenches are placed using the same lithography mask alignment accuracy. In another embodiment, the o-pad 310 and its tilted flat mirror 311 are placed using a first lithography mask alignment accuracy, and the fiber trenches are placed using a second lithography mask alignment accuracy.
It should be noted that in a typical arrangement, a plurality of o-pads 310 can be utilized to connect a plurality of optical fibers using a plurality of fiber trenches. Such an arrangement is further illustrated in
In an optional embodiment, illustrated in
It should be noted that only 2 optical fibers 430-3 and 430-4 are shown in
The process for creating a fiber trench 410 is further described with reference to
IC 630-1 is connected to the PCB 630-2, both including only electrical elements, are also coupled to the platform 610. The ICs 630-1 and 630-2 are coupled to the platform 610 using e-pads 640-1, and 640-2, respectively. The connection between the ICs 630-1 and 630-2 are through vias or wire bounding 650.
The connection of the PIC 610 to the platform 600 is by means of an o-pad 670-1. The connection of the optical fiber 660 to the platform 600 is by means of an o-pad 670-2. The o-pad 670-1 is structured using, for example, a curved mirror, while the o-pad 670-2 is structured to include a curved mirror, a tilted mirror, and a fiber trench as discussed in detail above.
The optical connection between the PIC 610 and an optical fiber 660 is through a beam coupler 601 which comprises the o-pads 670-1 and 670-2. In this arrangement, the light beam travels through the beam coupler 601 from the PIC 610 to the optical fiber 660 serving as a drain. The o-pad 670-2 reflects a diverging light beam from the PIC 610 into parallel light beams which reach the o-pad 670-1, which reflects a focused light beam to a titled mirror in the o-pad 670-2 to output the light to the optical fiber 660.
The various optical couplers have been discussed herein with a reference to a specific embodiment with curved mirrors utilized for propagating light beams. However, the disclosed embodiments can be realized using other reflective or focusing elements, such as optical lenses, zone plates (e.g., Fresnel zone plates), and the like.
It should be understood that any reference to an element herein using a designation such as “first,” “second,” and so forth does not generally limit the quantity or order of those elements. Rather, these designations are generally used herein as a convenient method of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements may be employed there or that the first element must precede the second element in some manner. Also, unless stated otherwise, a set of elements comprises one or more elements. In addition, terminology of the form “at least one of A, B, or C” or “one or more of A, B, or C” or “at least one of the group consisting of A, B, and C” or “at least one of A, B, and C” used in the description or the claims means “A or B or C or any combination of these elements.” For example, this terminology may include A, or B, or C, or A and B, or A and C, or A and B and C, or 2A, or 2B, or 2C, and so on.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the principles of the disclosed embodiments and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.
This application claims priority from U.S. Provisional Application No. 62/405,476 filed Oct. 7, 2016. This application is also a continuation-in-part of U.S. patent application Ser. No. 14/878,591 filed on Oct. 8, 2015, now pending, the contents of which are hereby incorporated by reference.
| Number | Name | Date | Kind |
|---|---|---|---|
| 4744618 | Mahlein | May 1988 | A |
| 5913002 | Jiang | Jun 1999 | A |
| 5939782 | Malladi | Aug 1999 | A |
| 6122417 | Jayaraman et al. | Sep 2000 | A |
| 6198864 | Lemoff et al. | Mar 2001 | B1 |
| 6271970 | Wade | Aug 2001 | B1 |
| 6600845 | Feldman et al. | Jul 2003 | B1 |
| 6832031 | Smaglinski | Dec 2004 | B2 |
| 6862092 | Ibsen et al. | Mar 2005 | B1 |
| 6888988 | Vancoille et al. | May 2005 | B2 |
| 6941047 | Capewell et al. | Sep 2005 | B2 |
| 7050304 | Hsu | May 2006 | B2 |
| 7058275 | Sezerman et al. | Jun 2006 | B2 |
| 7139448 | Jain | Nov 2006 | B2 |
| 7260328 | Kropp | Aug 2007 | B2 |
| 7288756 | Sheffer et al. | Oct 2007 | B2 |
| 7317746 | Ericson et al. | Jan 2008 | B2 |
| 7447404 | Miller | Nov 2008 | B2 |
| 7853101 | Carothers | Dec 2010 | B2 |
| 7970041 | Arimoto et al. | Jun 2011 | B2 |
| 8000565 | Liu | Aug 2011 | B2 |
| 8117982 | Gruber et al. | Feb 2012 | B2 |
| 8390806 | Subramanian | Mar 2013 | B1 |
| 8471467 | Boerner | Jun 2013 | B2 |
| 8582934 | Adler et al. | Nov 2013 | B2 |
| 8834146 | Saha et al. | Sep 2014 | B2 |
| 8836942 | Quan et al. | Sep 2014 | B2 |
| 8929693 | Shin et al. | Jan 2015 | B2 |
| 9099581 | Na et al. | Aug 2015 | B2 |
| 9429725 | Shao et al. | Aug 2016 | B2 |
| 9496248 | Lee | Nov 2016 | B2 |
| 20020118907 | Sugama et al. | Aug 2002 | A1 |
| 20020131180 | Goodman | Sep 2002 | A1 |
| 20020164129 | Jackson | Nov 2002 | A1 |
| 20030002809 | Jian | Jan 2003 | A1 |
| 20030043157 | Miles | Mar 2003 | A1 |
| 20030142896 | Kikuchi | Jul 2003 | A1 |
| 20040184704 | Bakir et al. | Sep 2004 | A1 |
| 20050025430 | Bhagavatula et al. | Feb 2005 | A1 |
| 20050276613 | Welch et al. | Dec 2005 | A1 |
| 20090178096 | Menn et al. | Jul 2009 | A1 |
| 20090262346 | Egloff et al. | Oct 2009 | A1 |
| 20100002987 | Hata et al. | Jan 2010 | A1 |
| 20110091167 | Nishimura | Apr 2011 | A1 |
| 20110280573 | Collings et al. | Nov 2011 | A1 |
| 20110293281 | Sakurai | Dec 2011 | A1 |
| 20120002284 | McColloch et al. | Jan 2012 | A1 |
| 20120063721 | Chen | Mar 2012 | A1 |
| 20130044977 | Amit | Feb 2013 | A1 |
| 20130109083 | Llobera | May 2013 | A1 |
| 20130129281 | Son et al. | May 2013 | A1 |
| 20140023098 | Clarkson et al. | Jan 2014 | A1 |
| 20140064559 | Sugasawa et al. | Mar 2014 | A1 |
| 20140226988 | Shao et al. | Aug 2014 | A1 |
| 20140363165 | Panotopoulos et al. | Dec 2014 | A1 |
| 20150050019 | Sengupta | Feb 2015 | A1 |
| 20150124336 | Kaufman | May 2015 | A1 |
| 20160161686 | Li | Jun 2016 | A1 |
| 20160195677 | Panotopoulos et al. | Jul 2016 | A1 |
| 20180031791 | Israel | Feb 2018 | A1 |
| Number | Date | Country |
|---|---|---|
| 2639978 | Sep 2013 | EP |
| 2438209 | Dec 2011 | RU |
| 2485688 | Jun 2013 | RU |
| 2577669 | Mar 2016 | RU |
| 2001067497 | Sep 2001 | WO |
| Entry |
|---|
| Foreign Office Action and Search Report for ROC (Taiwan) Patent Application No. 105121625 dated Sep. 5, 2017 from IPO (Intellectual Property Office) of Taiwan. |
| O'Brien, “Silicon Photonics Fiber Packaging Technology”, Photonics Packaging Group, Tyndall National Institute, Cork, Ireland, Sep. 2012. |
| Barwicz, et al., “Assembly of Mechanically Compliant Interfaces Between Optical Fibers and Nanophotonic Chips”, IEEE 64th Electronics Components and Technology Conference, Orlando, Fl., May 27-30, 2014. |
| Bogaerts, “Helios Lecture: Coupling Light To Silicon Photonic Circuits”, Silicon Photonics—PhD Course prepared within FP7-224312 Helios Project, Ghent University-IMECGhent, Belgium, Nov. 2009. |
| Chiral Photonics., “Fiber Coupler Overview”, Pinebrook, NJ, Jan. 2013. |
| Cunningham, et al., “Aligning Chips Face-to-Face for Dense Capacitive and Optical Communication”, IEEE Transactions on Advanced Packaging, vol. 33, No. 2, May 2010. |
| Hou, et al., “Physics of Elliptical Reflectors at Large Reflection and Divergence Angles I: Their Design for Nano-Photonic Integrated Circuits and Application to Low-loss Low-crosstalk Waveguide Crossing”, Northwestern University, Evanston, IL., Apr. 2012. |
| Kopp, et al., “Silicon Photonic Circuits: On-CMOS Integration, Fiber Optical Coupling, and Packaging”, IEEE Journal of Selected Topics in Quantum Electronics, Aug. 2010. |
| Kurata, et. al., “Prospect of Chip Scale Silicon Photonics Transceiver for High Density Multi-mode Wiring System”, Photonics Electronics Technology Research Association (PETRA), Japan, 2015, pp. 1-7. |
| Nguyen, et al., “Silicon-based Highly-efficient Fiber-to-waveguide Coupler for High Index Contrast Systems”, Applied Physics Letters, American Institute of Physics, downloaded Feb. 29, 2012, published online Feb. 24, 2006. |
| PCL Connections LLC, all rights reserved, “In-Line Coupling Element (ICE) for Bonded Grating Coupling to Silicon PICs”, Columbus, OH., May 2013. |
| The International Search Report and The Written Opinion for PCT/US2016/038047, ISA/RU, Moscow, Russia, dated Oct. 13, 2016. |
| Zimmerman, “State of the Art and Trends in Silicon Photonics Packaging”, Silicon Photonics Workshop, Technische Universitat Berlin, May 2011. |
| CAMAPA, CD-ROM, pp. 58, 59, 79, Russia, 2012. |
| The International Search Report and The Written Opinion for PCT/US2017/055146, ISA/RU, Moscow, Russia, dated Jan. 31, 2018. |
| The European Search Report for EP Application No. 16854021.9 dated Aug. 21, 2018, EPO, The Hague. |
| Notice of Deficiencies for EP Application No. 16854021.9 dated Jun. 24, 2019, EPO, Rijswijk, Netherlands. |
| The First Chinese Office Action for Chinese Patent Application No. 2016800557192, dated Aug. 22, 2019, China, CNIPA. |
| Number | Date | Country | |
|---|---|---|---|
| 20180031791 A1 | Feb 2018 | US |
| Number | Date | Country | |
|---|---|---|---|
| 62405476 | Oct 2016 | US |
| Number | Date | Country | |
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| Parent | 14878591 | Oct 2015 | US |
| Child | 15724966 | US |
