This non-provisional application claims priority to China patent application No.202010703582.5, filed 2020 Jul. 21, and incorporated herein by reference in its entirety.
The disclosure is related to an electronic device, and more particularly, an electronic device where a frequency signal is provided to a plurality of transistors of a driving circuit by providing the frequency signal to at least three nodes of a signal line through a plurality of transmission lines.
As the resolution of display panels continues to increase, the number and complexity of components inside the circuit also increase. In the wiring design of the circuit, there are a large number of crossovers and the line width is gradually reduced, causing the load of resistance and inductance to increase, which is not conducive to the driving of the panel circuit, and the control signal is also prone to be distorted due to delay.
However, there is still a lack of proper solution in this field to improve the circuit driving capability, while supporting high resolution, and meeting the specifications of products such as virtual reality devices.
An embodiment provides an electronic device including a driving circuit, an integrated circuit and a plurality of transmission lines. The driving circuit includes a plurality of transistors and a signal line. The plurality of transistors are each used to receive a frequency signal. The signal line is coupled to each of the transistors and includes a first node, a second node and a third node, where the second node is located between the first node and the third node, and each of the first node, the second node and the third node is configured to receive the frequency signal. The integrated circuit is used to transmit the frequency signal. The plurality of transmission lines are coupled between the integrated circuit and the signal line. The integrated circuit transmits the frequency signal to the first node, the second node and the third node of the signal line through the plurality of transmission lines.
These and other objectives of the present disclosure will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the embodiment that is illustrated in the various figures and drawings.
In order to improve the driving capability of the circuit,
Throughout the disclosure and the appended claims, certain words are used to refer to specific elements. Those skilled in the art should understand that electronic device manufacturers may refer to the same components by different names. This article does not intend to distinguish those elements with the same function but different names. In the following description and claims, words such as “have” and “include” are open-ended words, so they should be interpreted as meaning “including but not limited to”.
It should be understood that when an element or film layer is defined as being “on” or “connected to” another element or film layer, it can be directly on this another element or film layer or directly connected to the another element or layer; or it can be non-directly on this another element or film layer or non-directly connected to the another element or layer with another intervening element or film layer existing between the two element(s)/film layer(s). On the contrary, when an element is defined as being “directly on” or “directly connected to” another element or film layer, there is no intervening element or film layer between the two element(s)/film layer(s).
The term “approximate”, “equal”, “identical” or “substantially the same” usually means a range within 20% of a given value or range, or means a range within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.
In addition, the term “within the range from the first value to the second value” means that the range includes the first value, the second value, and other values in between.
Although terms such as first, second, third and so on can be used to describe different assembling elements, but these assembling elements are not limited by these terms. These terms are only used to distinguish an assembling element from another assembling element in the specification. In the claims, it is not limited to use the same terms, and the terms such as first, second, and third can be used to indicate the order of defining the elements. Therefore, in the following description, the first assembling element may be corresponding to the second assembling element in the claims.
It should be understood that the technical features of several different embodiments can be replaced, reorganized, and mixed to complete other embodiments without confliction or departing from the spirit of the disclosure.
As shown in
The driving circuit DC can include a plurality of transistors and signal lines, such as the transistor 110, the transistor 120, the transistor 130, the transistor 210, the transistor 220, the transistor 230, the transistor n10, the transistor n20, the transistor n30, the signal line L1, the signal line L2 and the signal line L3. The signal line L1 can be coupled to the control terminals of the transistor 110, the transistor 210 and the transistor n10. The signal line L2 can be coupled to the control terminals of the transistor 120, the transistor 220 and the transistor n20. The signal line L3 can be coupled to the control terminals of the transistor 130, the transistor 230 and the transistor n30.
As shown in
As shown in
The signal source S1, signal source S2 and signal source Sn can be located in the integrated circuit 155. The transmission line WS1, the transmission line WS2 and the transmission line WSn between the signal source S1, the signal source S2, the signal source Sn and the driving circuit DC can be connected and built by bonding.
As shown in
For example, the signal line DL11, the signal line DL12, the signal line DL13, the signal line DL21, the signal line DL22, the signal line DL23, the signal line DLn1, the signal line DLn2 and the signal line DLn3 can be used for providing signals to the display area AA of the display equipment.
The transistor 110 can receive the signals from the signal source S1 through the transmission line WS1 so as to transmit the signals to the display area AA for the display area AA to display accordingly.
Likewise, each of the transistor 120 and the transistor 130 can receive the signals from the signal source S1 through the transmission line WS1, and can transmit the signals to the display area AA through the signal line DL12 or the signal line DL13 for the display area AA to display accordingly.
Likewise, each of the transistor 210 to the transistor 230 can receive the signals from the signal source S1 through the transmission line WS2, and can transmit the signals to the display area AA through the signal line DL21, the signal line DL22 or the signal line DL23 for the display area AA to display accordingly.
Likewise, each of the transistor n10 to the transistor n30 can receive the signals from the signal source Sn through the transmission line WSn, and can transmit the signals to the display area AA through the signal line DLn1, the signal line DLn2 or the signal line DLn3 for the display area AA to display one pixel or a plurality of pixels accordingly.
As shown in
Here the transistor 110, the transistor 210, the transistor n10, the signal line L1, the transmission line W11, the transmission line W12 and the transmission line W13 are taken as an example to explain an embodiment.
Each of the transistor 110, the transistor 210, the transistor n10 has a control terminal used to receive the frequency signal CKH1. The signal line L1 is coupled to the control terminals of each of the transistor 110, the transistor 210, the transistor n10. The signal line L1 has a first node N1, a second node N2 and a third node N3, where the second node N2 is located between the first node N1 and the third node N3. The first node N1, the second node N2 and the third node N3 are used to receive the frequency signal CKH1. The integrated circuit is used to transmit the frequency signal CKH1. The transmission line W11, the transmission line W12 and the transmission line W13 are coupled between the integrated circuit 155 and the signal line L1. The integrated circuit 155 can transmit the frequency signal CKH1 to the first node N1, the second node N2 and the third node N3 of the signal line L1 through the transmission line W11, the transmission line W12 and the transmission line W13.
According to embodiments, the driving circuit DC can be a demultiplexer or a gate driver. The first node N1, the second node N2 and the third node N3 of the signal line L1 can be respectively corresponding to the first portion P1, the second portion P2 and the third portion P3 of the bonding portion 158. The second portion P2 can be located between the first portion P1 and the third portion P3. In this embodiment, the first portion P1 can be formed using a plurality of pads PAD11 coupled to at least the first node N1. Likewise, the second portion P2 can be formed using a plurality of pads PAD12 coupled to at least the second node N2, and the third portion P3 can be formed using a plurality of pads PAD13 coupled to at least the third node N3. If the signal line L1 has a fourth node N4 (as shown in
Likewise, the first node N21, the second node N22 and the third node N23 can be respectively corresponding to the first portion P1, the second portion P2 and the third portion P3 and be used to receive the frequency signal CKH2 to prevent the frequency signal CKH2 from being delayed and distorted in the second portion P2.
Likewise, the first node N31, the second node N32 and the third node N33 can be respectively corresponding to the first portion P1, the second portion P2 and the third portion P3 and be used to receive the frequency signal CKH3 to prevent the frequency signal CKH3 from being delayed and distorted in the second portion P2.
Because the frequency signal CKH1, the frequency signal CKH2 and the frequency signal CKH3 can be prevented from being delayed and distorted in the second portion P2, the driving capability and the operation accuracy of the driving circuit DC are improved.
According to embodiments, the signal line L1 can be placed along the first reference axis X, the plurality of transmission lines (such as the transmission line W12, the transmission line W22 and the transmission line W32) can be placed along the second reference axis Y, and the second reference axis Y can be substantially perpendicular to the first reference axis X. The first reference axis X and the second reference axis Y can be defined from a top view when performing the place-and-route of the circuit.
According to embodiments, in the driving circuit DC, the plurality of transmission lines (such as the transmission line W11 to the transmission line W33 shown in
As shown in
For example, as shown in
In other words, the integrated circuit 155 can include the conductive line W151, and a plurality of transmission lines (such as the transmission line W11, the transmission line W12 and the transmission line W13) can be electrically connected to one another through the conductive line W151. In
Likewise, the integrated circuit 155 can further include the conductive line W152, and the transmission line W21, the transmission line W22 and the transmission line W23 can be electrically connected to one another through the conductive line W152 to transmit the frequency signal CKH2.
Likewise, the integrated circuit 155 can further include the conductive line W153, and the transmission line W31, the transmission line W32 and the transmission line W33 can be electrically connected to one another through the conductive line W152 to transmit the frequency signal CKH3.
In
By means of the structure of
According to embodiments, the transmission line W12, the transmission line W22 and the transmission line W32 can be disposed in an area of the bonding portion where the density of bonding is lower so as to decrease the loading to another circuit. The density of bonding can be defined by the number of transmission lines in the same unit area.
As shown in
Taking the signal line L1 as an example, compared with
The electronic device can further include the electrostatic discharge region 430 located beside the driving circuit DC. Each of the transmission line W12, the transmission line W22 and the transmission line W32 can pass through the electrostatic discharge region 430 to be coupled between the integrated circuit 155 and the driving circuit DC. The electrostatic discharge region 430 can be set to avoid the accumulation of the electrical charges. Therefore, according to another embodiment, the transmission line W12, the transmission line W22 and the transmission line W32 can be coupled between the integrated circuit 155 and the driving circuit DC without passing through the electrostatic discharge region 430.
For the purpose of brevity, the bonding portion and the electrostatic discharge region 430 are omitted in
According to embodiments, the transmission line W12, the transmission line W22 and the transmission line W32 can be bridged by the conductive layer to transmit signals. Hereinafter, the transmission line W12 in
The transmission line W12 can be used to transfer each of the frequency signal CKH1 to the frequency signal CKH3. Since the transmission line W12 is only used for short-distance transferring, the thickness of the transmission line W12 can be smaller to reduce the manufacture risk of climbing. The transmission line W12 can be disposed under a planar layer to decrease the loading.
In
In the bonding portion 42 and the driving circuit DC, there can be the insulating layer 550, the planar layer 555, the dielectric layer 560, the gate dielectric layer 565, the buffer layer 570, the substrate 575, the source terminal ST, the drain terminal DT, the gate terminal GT1, the gate terminal GT2, the doped area DR1, the doped area DR2, the transparent thin film conductive layer TL1 and the transparent thin film conductive layer TL2. The buffer layer 570 is disposed on the substrate 575. The gate dielectric layer 565, the doped area DR1 and the doped area DR2 are disposed on the buffer layer 570. The dielectric layer 560 covers the gate dielectric layer 565 which covers the doped area DR1 and the doped area DR2. The source terminal ST and the drain terminal DT pass through the dielectric layer 560 and the gate dielectric layer 565 to be electrically connected to the doped area DR1 and the doped area DR2. The gate terminal GT1 and the gate terminal GT2 are disposed on the gate dielectric layer 565 to form the transistor 110 in
Taking
In summary, in an electronic device, the frequency signal can be prevented from attenuation, distortion and waveform deterioration, and the operation accuracy can also be improved by transmitting the frequency signal to at least three nodes of the signal through a plurality of transmission lines and further providing the frequency signal to a plurality of transistors of the driving circuit. Therefore, the difficulties in the field can be overcome.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the disclosure. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Number | Date | Country | Kind |
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202010703582.5 | Jul 2020 | CN | national |