Patent Application
20060060937
The present invention relates generally to an embedded passive component. In particular, the invention relates to passive components embedded within an interconnect layer.
As the functionality, speed and portability of consumer electronics increases, so does the need for more circuitry to be packed into smaller spaces. The latest cell phone not only communicating voice but also interfacing with a computer to provide real-time information, and handheld devices being provided with wireless communication interfaces are examples of constant functionality increment that causes the quantity requirement of integrated circuits (IC) and passive components to increase dramatically. Furthermore, as operating speed increases, capacitors are required to be closer to the I.C. to avoid parasitic inductance effects. All this leads to the fact that the size of a device is now becoming more often a function of the circuit board or module size than anything else. In order to achieve size reduction of multi-featured products, passive components on the surface of the circuit need to be eliminated by burying them within the inner layers of the printed wiring board.
Embedded passives are passive components placed between the interconnecting substrates of a printed wiring board. With embedded passives, components such as resistors, capacitors and inductors are embedded into the body of a printed wiring board.
Implementation of embedded passives reduces space requirements and enables more silicon devices to be placed on the same sized substrate, thereby allowing functional potential of small electronic devices to increase. There are many other potential advantages to embedding passives in printed wiring boards for many types of applications. Capacitors could be placed directly underneath the active component they support, thereby reducing the number of layers and interconnecting vias. This would simplify board construction thereby, reducing costs and lower parasitic inductance and cross talk.
A capacitor dielectric placed between the power and ground plane would lower noise and provide blocking capacitors for filtering applications. Resistors are embeddable, providing similar advantages. Additional advantages gained would include a large reduction in the number of solder joints leading to improved reliability.
However, additional steps are conventionally required for embedding passive components within the interconnect layer between substrates. The orientations of passive components, for example a capacitor, between interconnects increases the thickness of the dielectric insulating material between the interconnect layers and presents a bulge in the dielectric insulating material deposited on top of the capacitor. Therefore, extra effort time and processing steps are required for performing planarisation steps to achieve a substantial planarity.
U.S. Pat. No. 6,417,556 (Long) describes an integrated circuit wherein a de-coupling capacitor is formed within an interconnect layer. U.S. Pat. No. 6,504,202 BI (Allman) describes an integrated circuit having a metal-insulator-metal (MIM) capacitor embedded within an interconnect layer. However, each of Long and Allman presents a solution wherein the interconnect layer(s) are stratified over the passive component (the capacitor), thereby requiring complicated interconnect layer forming steps. Furthermore, the interconnect layer has to be formed not only to accommodate the embedded passive but also to facilitate interfacing with a substrate.
Hence, this clearly affirms a need for an improved embedded passive component.
In accordance with a first aspect of the invention, there is disclosed an embedded passive component comprising:
In accordance with a second aspect of the invention, there is disclosed an embedded passive component comprising:
In accordance with a third aspect of the invention, there is disclosed an embedded passive component comprising:
Embodiments of the invention are described hereinafter with reference to the following drawings, in which:
An embedded passive component is described hereinafter for addressing the foregoing problems.
A first embodiment of the invention, an embedded passive component 20 is described with reference to
As shown in
Each of the first pillars 26 extends from the mounting face 30 of the substrate 22 and terminates at a free-end 32. A portion of the pattern 22 interfaces each of the first pillars 26 and the substrate 22 for forming electrical communication with the first pillars 26. Alternatively, only a portion of the first pillars 26 is in electrical communication with the pattern 22.
The passive structure 28 is preferably for functioning as an electrically passive element and comprises second pillars 34 extending from the mounting face 30 of the substrate 22. The first pillars 26 and the second pillars 34 are formed substantially perpendicular to the substrate 22. A portion of the pattern 22 also interfaces a portion of the first pillars 26 and the substrate 22 for forming electrical communication between a portion of the first pillars 26 and a portion of the second pillars 24.
The first pillars 26 and the second pillars 34 form free-standing structures on the substrate 22. However, at least a portion of the first group 26 of pillars is for coupling to a carrier 36 having a circuitry 38. When at least one of the first pillars 26 is coupled to the carrier 36, the at least one of the first pillars 26 structurally inter-couples and spatially inter-displaces the substrate 22 and the carrier 36 to thereby electrically communicate the passive structure formed 28 by the second pillars 34 with the circuitry 38 formed on the carrier 36.
At least one of the first pillars 26 has a solder bump 40 formed at free-end 32 thereof. The solder bump 40 facilitates coupling of the corresponding first pillars 26 to the circuitry 38 via re-flow processes. Alternatively as shown in
Again, the solder portion 42a each of the first pillars 2634 is attached to the carrier 36 by re-flow processes. The first pillars 26 preferably have one of a rectangular or square shaped cross-section (not shown) but can alternatively assume other geometric shapes and elongated shapes.
The electrically conductive material of the base portion 42a of each of the first pillars 26 is preferably copper. In addition, the first pillars 26 can be further coated with one of oxide, chromium or nickel. The solder portion 42b of each of the first 26 pillars 34 preferably has a material composition of one of 63% tin and 37% lead, 99% tin and 1% silver, and 100% tin. Alternatively, the solder portion 42b of each of the first pillars 26 is preferably of tin and lead composition with a tin concentration of within a range of 60% to 70%.
Each adjacent pair of at least a portion of the second pillars 34 is inter-abutting. The second pillars 34 comprise a first connector pillar 44 and a second connector pillar 46. Each of the first connector pillar 44 and the second connector pillar 46 is electrically connected to the pattern 24 formed on the substrate 22.
The second pillars 34 are arranged to form a wall 48 as shown in
Therefore, when the embedded passive component 20 is attached to the carrier 36, the passive structure 28 functions as a resistor, a passive element, to the circuitry 38 thereof.
Additionally, an insulating layer 49 is preferably formed over the passive structure 28 for encapsulating the passive structure 28 as shown in
A second embodiment of the invention, an embedded passive component 50 as seen in
In the second embodiment, the second pillars 34 are arranged to form a wall 52. The first connector pillar 44 and the second connector pillar 46 constitute two ends of the wall 52. The wall 52 is shaped as in inward spiral to form a duct 54 between two adjacent portions of the walls 52. Dielectric material 56 is deposited within the duct 54 to provide inductance across the first connector pillar 44 and the second connector pillar 46.
Therefore, when the embedded passive component 50 is attached to the carrier 36, the passive structure 28 functions as an inductor, a passive element, to the circuitry 38 thereof.
A third embodiment of the invention, an embedded passive component 60 as seen in
In the third embodiment, the second pillars 34 is arranged to form a first wall 62 and a second wall 64. The first wall 62 is parallel to and spaced apart from the second wall 64 on the substrate 22. The first connector pillar 44 constitutes one end of the first wall 62 and the second connector pillar 46 constitutes one end of the second wall 64. Both the first wall 62 and the second wall 64 are planarly shaped and formed perpendicular to the substrate 22.
A duct 66 is formed between the first wall 62 and the second wall 64. Dielectric material 68 is deposited within the duct 66 to provide capacitance across the first connector pillar 44 and the second connector pillar 46.
Therefore, when the embedded passive component 60 is attached to the carrier 36, the passive structure 28 functions as a capacitor, a passive element, to the circuitry 38 thereof.
A fourth embodiment of the invention, an embedded passive component 70 as seen in
In the fourth embodiment, the second pillars 34 is arranged to form a first comb structure 72 and a second comb structure 74. The first comb structure 72 is spaced apart from the second comb structure 74 on the substrate 22. The first connector pillar 44 constitutes one portion of the first comb structure 72 and the second connector pillar 46 constitutes a portion of the second comb structure 74. As shown in
The partitions 78a/78b is substantially perpendicular to the wall 76a/76b and the substrate 22. The partitions 78a/78b and the wall 76a/76b of the first comb structure 72 and the second comb structure 74 are substantially planar. The partitions 78a of the first comb structure 72 interleaves the partitions 78b of the second comb structure 74 to form a duct 80 between adjacent portions thereof.
Dielectric material 82 is preferably deposited within the duct 80 to provide capacitance across the first connector pillar 44 and the second connector pillar 46. Therefore, when the embedded passive component 70 is attached to the carrier 36, the passive structure 28 functions as a capacitor, a passive element, to the circuitry 38 thereof.
The dielectric material 56/68/82 used in the corresponding second, third and fourth embodiments of the invention is preferably low-K dielectric material for reducing capacitance parasitics. Alternatively, the dielectric material 68/82 used in the third and fourth embodiments of the invention is high-K dielectric material for establishing a high capacitance capacitor.
A fifth embodiment of the invention, an embedded passive component 80 as seen in
In the fifth embodiment, each of the first pillars 26 is formed without a solder ball or the like solder-based feature thereon. Instead, each of the first pillars 26 extends from the mounting face 30 of the substrate 22 and terminates cleanly at the free end 32 thereof with the free end 32 being uncovered. The free end 32 of at least one of the first pillars 26 is subsequently coupleable to the circuitry 38 via conventional inter-connector bonding methods and processes.
In the foregoing manner, an embedded passive component is described according to five embodiments of the invention for addressing the foregoing disadvantages of passive components. Although only five embodiments of the invention are disclosed, it will be apparent to one skilled in the art in view of this disclosure that numerous changes and/or modification can be made without departing from the scope and spirit of the invention.
