Claims
- 1. A method for making monolithic semiconductor devices comprising the steps of:
- Providing a semiconductor substrate of one conductivity type,
- introducing two impurities of different diffusion rates and of the other conductivity type into said substrate through each of a plurality of desired surface locations,
- the concentration of the impurity having the lower diffusion rate being greater than the concentration of the impurity having the higher diffusion rate,
- forming an epitaxial layer of semiconductor material on said substrate and over said locations, said expitaxial layer being of the same conductivity type as said substrate,
- heating said epitaxial layer and said substrate to outdiffuse said higher diffusion rate impurity completely through said epitaxial layer to reach the surface of said epitaxial layer opposite the interface between said epitaxial layer and said substrate,
- forming at one of said desired surface locations a bipolar transistor wholly within the region of said epitaxial layer through which said higher diffusion rate impurity has outdiffused completely through said expitaxial layer to reach said surface of said epitaxial layer opposite said interface,
- said higher diffusion rate impurity forming the collector of said bipolar transistor and the other of said impurities forming the subcollector of said bipolar transistor, and
- forming an insulated gate field effect transistor in said epitaxial layer outside said region.
- 2. The method defined in claim 1 wherein said field effect transistor is formed in said epitaxial layer between said desired locations.
- 3. The method defined in claim 1 wherein said introducing step is a diffusion step.
- 4. The method defined in claim 3 wherein said impurities are arsenic and phosphorus.
- 5. A method of making monolithic semiconductor devices comprising the steps of:
- providing a semiconductor substrate of one conductivity type,
- introducing two impurities of different diffusion rates and of the other conductivity type into said substrate through each of a plurality of desired surface locations,
- the concentration of the impurity of having the lower diffusion rate being greater than the concentration of the impurity having the higher diffusion rate,
- forming an epitaxial layer of semiconductor material on said substrate and over said locations, said epitaxial layer being of the same conductivity type as said substrate,
- heating said epitaxial layer and said substrate to outdiffuse said higher diffusion rate impurity completely through said epitaxial layer to reach the surface of said epitaxial layer opposite the interface between said epitaxial layer and said substrate,
- forming at respective ones of said desired locations a bipolar transistor and an insulated gate field effect transistor wholly within the region of said epitaxial layer through which said higher diffusion rate impurity has outdiffused completely through said epitaxial layer to reach said surface of said epitaxial layer opposite said interface,
- said higher diffusion rate impurity forming the collector of said bipolar transistor and the other of said impurities forming the subcollector of said bipolar transistor, and
- forming another insulated gate field effect transistor in said epitaxial layer between said desired locations.
- 6. The method defined in claim 5 wherein said bipolar transistor and said field effect transistors are formed by diffusion,
- the base of said bipolar transistor and the source and drain of one of said field effect transistors being diffused simultaneously, and
- the emitter of said bipolar transistor and the source and drain of another of said field effect transistors being diffused simultaneously.
- 7. The method defined in claim 6 wherein arsenic is used for the diffusion of said emitter.
Parent Case Info
This is a continuation of application Ser. No. 138,161 filed Apr. 28, 1971, now abandoned,
US Referenced Citations (6)
Foreign Referenced Citations (1)
Number |
Date |
Country |
1,237,712 |
Jun 1971 |
UK |
Continuations (1)
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Number |
Date |
Country |
Parent |
138161 |
Apr 1971 |
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