1. Field
The present technology relates to fabrication of semiconductor devices.
2. Description of Related Art
The strong growth in demand for portable consumer electronics is driving the need for high-capacity storage devices. Non-volatile semiconductor memory devices, such as flash memory storage cards, are becoming widely used to meet the ever-growing demands on digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, have made such memory devices ideal for use in a wide variety of electronic devices, including for example digital cameras, digital music players, video game consoles, PDAs and cellular telephones.
A semiconductor memory device typically consists of a substrate, such as a printed circuit board, which is etched to include a conductance pattern having contact pads and electrical traces. A large number of semiconductor die are formed together on a semiconductor wafer, and then diced into individual semiconductor die. One or more semiconductor die are then bonded to the substrate and electrical connections are made between die bond pads on the one or more semiconductor die and the contact pads of the substrate. The signals may then be transferred between the one or more semiconductor die and an external host device via the conductance pattern.
Die attach films (DAF) are typically used to bond the semiconductor die to the substrate. Typically, DAF is attached to the back (inactive) side of an entire semiconductor wafer prior to dicing of the individual semiconductor die. A dicing tape is then applied over the DAF to hold the respective die together after dicing. After the DAF and dicing tape are applied, the wafer may be cut, for example with a dicing saw. During the cutting process, issues such as a DAF burring, or anchor effect, may occur. An anchor effect is a phenomenon where the DAF bites into the dicing tape where the DAF is cut by the blade. The DAF anchor effect can increase the load required to pick up the die after dicing and that may lead to die breakage or defective pick-up.
Embodiments will now be described with reference to
The terms “top,” “bottom,” “upper,” “lower,” “vertical” and/or “horizontal” are used herein for convenience and illustrative purposes only, and are not meant to limit the description of the invention inasmuch as the referenced item can be exchanged in position.
A process for forming semiconductor die for use with the present system will now be described with reference to the flowchart of
The formation of the integrated circuit may include the formation of die bond pads 104 (one of which is labeled in
In step 204, the top (active) surface of the wafer 100 including the integrated circuits is taped for a backgrind process. In step 206, the taped surface may be supported on a chuck and the backgrind process may be performed on the back (inactive) surface of wafer 100 as is known in the art to thin the die 102 to the desired thickness. In step 210, the die 102 on wafer 100 may be tested for functional defects. Such tests include for example wafer final test, electronic die sort and circuit probe.
In step 212, the wafer may be transferred from the backgrind chuck, and a dicing tape may be applied to the inactive surface of the wafer 100. In step 216, the back surface of the die may be supported on a chuck, and each of the die 102 may be diced from the wafer. The dicing process may involve a first set of vertical cuts (from the perspective of
The flowchart of
Each substrate 112 may be formed of a core having top and/or bottom conductive layers. The core may be formed of various dielectric materials such as for example, polyimide laminates, epoxy resins including FR4 and FR5, bismaleimide triazine (BT), and the like. Although not critical to the present invention, the core may have a thickness of between 40 microns (μm) to 200 μm, although the thickness of the core may vary outside of that range in alternative embodiments. The core may be ceramic or organic in alternative embodiments.
The conductive layer(s) surrounding the core may be formed of copper or copper alloys, plated copper or plated copper alloys, copper plated steel, or other metals and materials known for use on substrate panels. The conductive layers may have a thickness of about 10 μm to 25 μm, although the thickness of the layers may vary outside of that range in alternative embodiments.
In step 220, one or both of the conductive layers on the core may be etched into a conductance pattern as is known for communicating signals between the semiconductor die 102 and an external device (not shown). The etched conductance pattern may include electrical traces 116 and contact pads 120 on an upper surface of the substrate 112. As is known, vias 124 may also be provided for communicating signals to different layers of the substrate 112. Where the semiconductor device is a land grid array (LGA) package, contact fingers (not shown) may also be defined on a lower surface of the substrate 112. As is known in the art, a layer of solder mask may be applied to the top or bottom surfaces of substrate 112, and the contact pads 120 and/or contact fingers may be plated with one or more gold layers, for example in an electroplating process.
In step 224, surface mounted components may be soldered to the contact pads 120 of the substrate 112. The surface mounted components may include passive devices such as resistors, capacitors and/or inductors. The solder may be reflowed in a known reflow process in step 228.
In step 230, a layer of die attach epoxy may be sprayed onto each substrate 112 on panel 110. Further details of step 230 are explained with reference to the flowchart of
In embodiments, there may be a single column of windows 138 in window section 132, and the number of windows 138 may match the number of substrates 112 in a column on the panel 110. In the embodiment shown, there are four substrates 112 in a column on panel 110, and there are four windows 138 on the window clamp 130. It is understood that there may be greater or fewer substrates 112 in a column on panel 110, and a corresponding greater or fewer windows 138 on window clamp 130. It is further understood that there may be a larger or smaller number of substrates 112 in a column on panel 110 than there are in a column of windows 138 on clamp 130. Moreover, as explained below, there may be multiple columns of windows 138 on clamp 130 to match the number of columns, or a portion of the number of columns, of substrates 112 on panel 110.
In embodiments, each of the windows 138 may be the same size and shape as the semiconductor die 102 to be mounted on the substrate 112 as explained below. The windows 138 may correspond in length and width to any length and width of die 102 that may be used. The windows are also oriented in the same orientation that die 102 are to be mounted on the substrate 112. Each window 138 is similarly spaced from each other a distance corresponding to the positions of the semiconductor die 102 that get mounted to a column of substrates 112.
In embodiments, each window 138 is defined by sidewalls that are perpendicular to the major planar surfaces of window section 132. The thickness of the window section 132 at the windows 138 may for example be 0.4 mm. It is understood that the angle of the sidewalls between the major planar surface of the window section 132 may be less than or greater than 90° in further embodiments. In such embodiments, the size of the window 138 may correspond to the size of the die 102 at the top surface of window section 132 or at the bottom surface of window section 132.
In step 274, the window clamp 130 is aligned over the substrate panel 110. For example, at the start of the epoxy spray process, the window clamp 130 may be aligned over the first (leftmost) column of substrates 112 on panel 110 shown in
In embodiments, the substrate panel 110 may be held stationary while the window clamp 130 moves, or the substrate panel 110 may move, while the window clamp 130 is held stationary. This process may be repeated until liquid epoxy is applied to each substrate 112 on the panel 110.
The window clamp 130 may be aligned at the desired positions over the substrate panel 110 by a variety of alignment schemes, including optically. In an optical alignment embodiment, an emitter and receiver may be used to find fiducial holes and/or reference markers in the substrate panel 110 and on the window clamp 130 to indicate when the panel and clamp are aligned. Additionally or alternatively, a camera or other imaging device may be used which images the substrate panel 110 and/or window clamp 130 as it moves to facilitate alignment of the panel and clamp.
In embodiments, the window clamp 130 may be supported by a pair of holders (not shown) that engage the flanges 134, 136. As seen for example in
The vertical offset of the flanges 134, 136 from the window section 132 allows the window clamp 130 to be supported and/or translated while the window section 132 lies flat against the substrate panel 110. In embodiments, the window section 132 may lie flush against the substrate panel 110 during the epoxy spaying process or the window section 132 may be slightly spaced from the substrate panel 110.
The epoxy 144 may be applied as an A-stage liquid from spray head 140. As explained below, the epoxy may subsequently undergo UV and/or thermal heating to cure the epoxy to one or more intermediate B-stages, and then ultimately to a fully-cured C-stage. When applied as an A-stage liquid, the epoxy 144 may have a viscosity from 1,000 to 10,000 cP at 5 rpm, with the spray head 140 maintained at a temperature of 60° C. It is understood that these parameters are by way of example only, and each may vary in further embodiments. The epoxy may be sprayed onto the substrate 112 through window 138 to a thickness of approximately between 5 μm to 50 μm, though the thickness may vary above or below this range in further embodiments.
As indicated in
The embodiments described above relate to window clamp having windows arranged in a column to match a column of substrates on the substrate panel. In an alternative embodiment, the window clamp may have windows arranged in a row to match a row of substrates on the substrate panel.
As the spray head traverses the column of windows 138 in window section 132, the sprayed epoxy may accumulate on the window section 132 in the spaces between and around the windows 138. Over time, this buildup of epoxy may affect application of the epoxy through the windows 138. Therefore, in one embodiment, the present system may remove the epoxy 144 which is sprayed onto the window section 132 in a step 280. One mechanism for removing the epoxy 144 is shown in
The base of clean-up follower 150 may be supported to translate, or follow, the spray head 140 as it traverses the column of windows 138. The clean-up follower 150 may for example be mounted to the same translation mechanism advancing the spray head along the y-direction, or the clean-up follower 150 may be mounted on a separate translation mechanism from the spray head 140. The spray head 140 may spray epoxy to the edge 130a of the window clamp 130, whereupon it stops spraying, but it may continue to translate in the y-direction to allow the clean-up follower 150 to reach and clean to the edge 130a of the window clamp 130.
In embodiments, the towel 160 may be an absorbent fiber cloth. The support shafts 158 position the rollers 154a, 154b adjacent the surface of the window section 132, so that the towel 160 contacts the surface of the window section 132 as it translates to absorb and remove epoxy that has been sprayed onto the window section 132.
It is understood that clean-up follower 150 may have a wide variety of other configurations for driving a towel across the surface of window section 132 to remove epoxy that has been sprayed onto the window section 132. In one alternative, the clean-up follower may include a single roller 154. Other mechanisms are contemplated. Moreover, in a further embodiment, the clean-up follower 150 may be omitted altogether. In such embodiments, the window clamp 130 may be changed periodically to prevent excessive buildup of epoxy on the surface of the clamp 130.
While the clean-up follower 150 can remove epoxy from a top surface of window clamp 130, epoxy may also accumulate on the sidewalls of windows 138. Therefore, in embodiments, a window cleaning step 286 may periodically be performed.
Window-cleaning mechanism 164 may clean windows 138 of window clamp 130 when the window clamp 130 is separated from a substrate panel 110 (either in the same tool where the epoxy 144 is sprayed or in a separate tool). The window-cleaning mechanism 164 further includes a plunger 180, which is formed of a size and shape approximating that of a window 138. The plunger 180 may be slightly smaller than a window 138 to leave space for the towel between the sidewalls of a window 138 and plunger 180.
In operation, the window clamp 130 may be supported over the window cleaning mechanism 164, with a window 138 aligned over the plunger 180. The plunger may then be driven upward, through the aligned window 138, so that the towel 168 is forced up through the window. The towel 168 contacts the sidewalls of the window to absorb and remove epoxy which may have deposited on the sidewalls. The plunger may then be removed, the window clamp 130 is moved to align with the next window 138 to be cleaned over the plunger 180, and the process is repeated in succession until each window 138 is cleaned. This operation may be performed periodically, for example after epoxy 144 is applied to an entire panel 110. It may also be performed after epoxy is applied to one or more columns of substrates on panel 110. It may be performed at other intervals in further embodiments. Moreover, in a further embodiment, the window-cleaning mechanism 164 may be omitted altogether. In such embodiments, the window clamp 130 may be changed periodically to prevent excessive buildup of epoxy within the sidewalls of windows 138.
Returning now to the flowchart of
In step 240, the die 102 may be wire bonded to the substrate 112, by connecting a conductive wire between die bond pads 104 on die 102 and contact pads 120 on substrate 112. It is contemplated that one or more additional die may be mounted on top of die 102.
If additional die are mounted, these die may also be wire bonded to the substrate in step 240.
In step 242, after the die 102 and any additional die on the stack are wire bonded to the substrate 112, the die stack may be encased within the molding compound 188 in step 242. Molding compound 188 may be a known epoxy resin such as for example available from Sumitomo Corp. and Nitto Denko Corp., both having headquarters in Japan.
As noted above in step 236, after the die 102 are mounted on the substrate 112, the epoxy 144 may be only partially cured. If so, after the encapsulation step 242, a final curing step 244 may be performed to complete curing of the epoxy 144 to a C-stage epoxy, where it is set. If the complete C-stage epoxy cure was performed earlier in step 236, step 244 may be omitted.
The encapsulated and cured devices may then be singulated from the substrate panel in step 248 to form finished semiconductor devices 190 seen in
The window clamp 130 described above may include a single column of windows 138. As noted, there may alternatively be more than one column of windows 138. Such an embodiment is shown in
In
Up to this point, window 138 has been described as being a unitary opening. It need not be in further embodiments.
In embodiments, the semiconductor die 102 may be one or more flash memory chips so that, with controller die 184, the device 190 may be used as a flash memory device.
It is understood that the device 190 may include semiconductor die configured to perform other functions in further embodiments of the present system. The device 190 may be used in a plurality of standard memory cards, including without limitation a CompactFlash card, a SmartMedia card, a Memory Stick, a Secure Digital card, a miniSD card, a microSD card, a USB memory card and others.
In summary, in embodiments, the present technology relates to a substrate panel, comprising: a plurality of substrates; and a plurality of discrete areas of die attach epoxy applied without a semiconductor die onto the substrate.
In further embodiments, the present technology relates to a system for forming a substrate panel, comprising: a panel including plurality of substrates, the substrates each including an area for receiving a semiconductor die; and a window clamp, capable of being received over the panel, and including one or more windows through which epoxy is applied to the areas on the substrate for receiving a semiconductor die.
In further embodiments, the present technology relates to a method of fabricating a semiconductor panel, comprising the steps of: (a) defining a plurality of substrates on the panel, each substrate including a conductance pattern and an area for receiving a semiconductor die; and (b) applying a liquid epoxy to the area of each substrate for receiving a semiconductor die.
In still further embodiments, the present technology relates to a method of fabricating a semiconductor device, comprising the steps of: (a) defining a plurality of substrates on the panel, each substrate including a conductance pattern and an area for receiving a semiconductor die; (b) positioning a window clamp over at least a portion of the substrate panel, the window clamp including at least one of a column and a row of windows; (c) spraying a liquid epoxy through the at least one column and row of windows onto the areas of the substrates for receiving a semiconductor die; and (d) mounting semiconductor die on the areas of the substrate that received the liquid epoxy in said step (c).
The foregoing detailed description of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the invention and its practical application to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto.
This application is a continuation of U.S. patent application Ser. No. 13/257,285 filed on Sep. 16, 2011 entitled EPOXY COATING ON SUBSTRATE FOR DIE ATTACH, which application is a 371 of International Application No. PCT/CN2011/073688 filed on May 5, 2011 entitled EPOXY COATING ON SUBSTRATE FOR DIE ATTACH, which applications are incorporated herein by reference in their entirety.
Number | Date | Country | |
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Parent | 13257285 | Sep 2011 | US |
Child | 14682871 | US |