Claims
- 1. Process for fabrication of an EPROM semiconductor device erasable with ultraviolet rays including a semiconductor chip placed inside of a container characterized in that said container consists of a hollow body of plastic material opaque to ultraviolet rays having a window overlying said semiconductor chip and in that the interior space of the container is filled with plastic material transparent to ultraviolet rays, said process comprising the prearrangement of a metal frame formed of a central pad and side leads, the application of an insulating frame and an insulating layer over and under said frame respectively, application of a semiconductor chip over said pad and electrical connection thereof to said leads, formation of a mass of transparent plastic material over said chip and the electrical connection thereof to said leads inside said insulating frame, and formation of a container of opaque plastic material around said mass, said chip and said frame with an open window formed in said container over said mass and said chip, wherein the process further comprises forming an upper projection on said mass of transparent plastic material and using said upper projection for the purposes of forming a barrier preventing the opaque plastic material from extending over the chip and centering the container during subsequent formation thereof.
- 2. Process for the fabrication of an EPROM semiconductor device erasable with ultraviolet rays including a semiconductor chip placed inside of a container characterized in that said container consists of a hollow body of plastic material opaque to ultraviolet rays having a window overlying said semiconductor chip and in that the interior space of the container is filled with plastic material transparent to ultraviolet rays, said process comprising prearrangement of a metal frame formed of a central pad, side leads, an internal frame and an external frame, application of a semiconductor chip over said pad and electrical connection thereof to said leads, formation of a mass of transparent plastic material over said chip and the electrical connection thereof to said leads inside said internal frame, and formation of a container of opaque plastic material around said mass, said chip and said frame with an open window formed in said container over said mass and said chip wherein the process further comprises forming an upper projection on said mass of transparent plastic material and using said upper projection for the purposes of forming a barrier preventing the opaque plastic material from extending over the chip and centering the container during subsequent formation thereof.
Priority Claims (1)
Number |
Date |
Country |
Kind |
23335 A/85 |
Dec 1985 |
ITX |
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Parent Case Info
This application is a divisional of Ser. No. 939,098, filed 12/8/86, now abandoned.
US Referenced Citations (8)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0076867 |
May 1982 |
JPX |
0034934 |
Mar 1983 |
JPX |
Divisions (1)
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Number |
Date |
Country |
Parent |
939098 |
Dec 1986 |
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