Claims
- 1. A semiconductor integrated circuit device comprising:(a) a gate insulating film formed over a main face of a semiconductor substrate; and (b) a gate electrode formed over the gate insulating film, wherein the semiconductor substrate has been subjected to a plasma processing in an atmosphere of a mixed gas of a first gas hardly reactive to Ge and a second gas having a function of etching Si, after forming the gate electrode, wherein the gate electrode includes an SiGe layer and a polycrystal silicon layer formed at a layer upward therefrom, and wherein a side etching amount at two side faces of the gate electrode is equal to or smaller than 40% of a length in a channel length direction of the polycrystal silicon layer constituting the gate electrode.
- 2. A semiconductor integrated circuit device comprising:(a) a gate insulating film formed over a main face of a semiconductor substrate; and (b) a gate electrode formed over the gate insulating film, wherein the semiconductor substrate has been subjected to a plasma processing in an atmosphere of a mixed gas of a first gas hardly reactive to Ge and a second gas having a function of etching Si, wherein the gate electrode includes an SiGe layer and a polycrystal silicon layer formed at a layer upward therefrom, and wherein a length in a channel length direction of the gate electrode at the SiGe layer, is equal to a length in the channel length direction of the polycrystal silicon layer constituting the gate electrode.
- 3. A semiconductor integrated circuit device comprising:(a) a gate insulating film formed over a main face of a semiconductor substrate; and (b) a gate electrode formed over the gate insulating film, wherein the semiconductor substrate has been subjected to a plasma processing in an atmosphere of a mixed gas of a first gas hardly reactive to Ge and a second gas having a function of etching Si, after forming the gate electrode, wherein the gate electrode includes an SiGe layer and a metal layer formed at a layer upward therefrom, and wherein a side etching amount at two sides faces of the gate electrode is equal to or smaller than 40% of a length in a channel length direction of the metal layer constituting the gate electrode.
- 4. A semiconductor integrated circuit device comprising:(a) a gate insulating film formed over a main face of a semiconductor substrate; and (b) a gate electrode formed over the gate insulating film, wherein the semiconductor substrate has been subjected to a plasma processing in an atmosphere of a mixed gas of a first gas hardly reactive to Ge and a second gas having a function of etching Si, after forming the gate electrode, and wherein a length in a channel length direction of the gate electrode at an SiGe layer, is equal to a length in the channel length direction of a metal layer constituting the gate electrode.
Priority Claims (1)
Number |
Date |
Country |
Kind |
2000-094986 |
Mar 2000 |
JP |
|
Parent Case Info
This application is a divisional application of U.S. Ser. No. 09/810,577, filed Mar. 19, 2001 now U.S. Pat. No. 6,479,392.
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FR |
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Non-Patent Literature Citations (2)
Entry |
Polysilicon-Germanium Gate Patterning Studies in a High Density Plasma Helicon Source, 1997 American Vacuum Society, pp. 1874-1880.* |
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